Abstract: The present disclosure provides a compensation control method and a display device. The method includes in a standstill phase, controlling the display panel to stand still; after the standstill phase ends, sensing, by the timing controller, characteristic values of each row of the pixel circuits in the display panel in a time division manner by controlling the gate driver and the source driver; setting a black insertion time period between time periods for sensing characteristic values of different rows of pixel circuits, during the black insertion time period, controlling, by the timing controller, the gate driver and the source driver, to display a black picture on the display panel.

Abstract: The present application discloses a display panel and a display device. The display panel includes a plurality of multiplexing drive modules, a plurality of drive branches and M drive buses. By electrically connecting one drive bus to N drive branches, the number of used drive buses can be reduced, thereby reducing the number of output channels of a drive signal source. Sine the number of used drive buses is reduced, the multiplexing drive modules can complete transmission of a frame of data signals using a less number of times of time-divisional parts for switching on transistors.

Abstract: The electronic display board system with a modified Ethernet network according to the present invention comprises a main controller 1 provided with a main Ethernet switch 10 comprising a first main port 101 and a second main port 102; and first to Nth display units D1, D2, . . . , DN (N is an integer of 2 or more) sequentially connected with each other by an Ethernet network to receive image data transmitted from the main controller 1 to output the data on a display module 21 or transmit the data to a neighboring display unit or the main controller 1, wherein the first to Nth display units D1, D2, . . . , DN each comprise a first sub-port 201 and a second sub-port 202 to receive a first image data transmitted from the second main port 102 to transmit the data in a forward direction and to receive a second image data transmitted from the first main port 101 to transmit the data in a reverse direction.

Abstract: Disclosed are a source driver for sensing the degree of deterioration in pixels in some regions of a display panel and compensating for the deterioration in the display panel based on the sensed degree, by considering a characteristic in which pixels included in each display panel similarly deteriorate, and a display device including the same. The display device may include a display panel including pixels, a sensing circuit configured to provide sensing data by sensing the degree of deterioration in pixels in at least one first region of the display panel, and a compensation circuit configured to calculate an amount of compensation of each of the pixels in the first region using the sensing data and compensate for the deterioration in the pixels in the first region and pixels in a second region whose degree of deterioration is not sensed, based on the amount of compensation.

Abstract: A pixel circuit can include a driving element connected to a first node, a second node and a third node; a first switch element supplying an initialization voltage to the second node; a second switch element supplying a data voltage to a fourth node; and a capacitor connected between the third node and the fourth node. Also, the pixel circuit can further include a third switch element supplying a reference voltage to the third node; a fourth switch element supplying a pixel driving voltage to the first node; a fifth switch element electrically connecting the fourth node with the second node; a light emitting element driven to emit light based on a current supplied through the driving element; and a sixth switch element configured to electrically connect the third node with a fifth node connected to an anode electrode of the light emitting element.

Abstract: Provided are display panel and display device. Display panel includes first substrate, second substrate, bank layer on side of first substrate facing second substrate, color resistance layer on side of first substrate facing second substrate, and light-emitting elements. Bank layer includes bank structures defining bank openings. Color resistance layer includes color resistance modules spaced apart. Color resistance modules is disposed in correspondence to bank openings and include blue color resistance module. Light-emitting elements is disposed in correspondence to bank openings. Projection of light-emitting element on first substrate does not overlap projection of bank structure on first substrate. Bank structures include first bank structure and second bank structure. Blue color resistance module adjacent to at least one first bank structure. Width of the first bank structure is greater than width of the second bank structure.

Abstract: Disclosed herein are system, method, and device embodiments for ATM access during a power outage. In an example embodiment, an automated teller machine (ATM) may receive power from a mobile device including a banking application, send the power to a rechargeable battery of the ATM, and enter a reduced power mode, wherein the ATM is powered by the rechargeable battery. Further, the ATM may receive a transaction request including an authentication credential from the banking application, determine an account associated with the authentication credential, determine an authorization result indicating whether to perform the transaction request, and generate recordation information corresponding to the authorization result.

Abstract: A display device can include a display panel including a plurality of pixels configured to be driven in one of a driving period and a blank period, a timing controller configured to output a variable refresh rate (VRR) signal determining a refresh rate of the plurality of pixels and a video data signal, and a data driver configured to supply a data voltage to the plurality of pixels through a plurality of data lines, according to the VRR signal and the video data signal. The plurality of pixels can be driven at a first refresh rate or a second refresh rate which is lower than the first refresh rate, according to the VRR signal. Further, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the output luminance of each of the plurality of pixels can be reduced during the blank period.

Abstract: Embodiments relate to a foveated display, in which a display device receives image data to be displayed that comprises a plurality of display regions associated with different image resolutions, and metadata that is indicative of locations of the plurality of display regions associated with different image resolutions. A display driver integrated circuit (DDIC) of the display device comprises an expander circuit configured to determine locations of one or more macropixels to be displayed by the display area based on the received metadata, wherein each macropixel corresponds to a grouping of native pixels of the display area onto which image data is loaded to concurrently.

Abstract: The application discloses a display panel. The display panel includes: a dataline black matrix less (DBS) common electrode trace arranged in a routing area; a plurality of clock signal traces arranged in a first wiring area along a first direction; and a plurality of clock signal transfer lines connected to the plurality of clock signal traces in a one-to-one correspondence, wherein each of the clock signal transfer lines passes through the routing area and extends to a gate driver on array (GOA) unit area along the first direction, and at least one of the clock signal transfer lines is bent and arranged in the routing area.

Abstract: A touch sensing device for preventing occurrence of electromagnetic interference (EMI) due to a clock includes a touch controller configured to operate in a write mode during a display period and operate in a read request mode or a read operation mode during a touch sensing period, and a touch driver configured to receive touch sensing data from a touch sensor during the touch sensing period and transmit the touch sensing data to the touch controller through a first bus and a second bus. The first bus is used for clock transmission in the write mode and the read request mode and is used for data transmission in the read operation mode. The second bus is used for data transmission in the write mode, the read request mode, and the read operation mode.

Abstract: A display substrate, a method for driving the same, a display device, and a fine metal mask are provided, and a display area of the display substrate includes a first display sub-area in which pixels are distributed at a high density, and a second display sub-area in which pixels are distributed at a low density.

Abstract: In a display device, a pixel circuit includes a light-emitting element, a drive transistor, a write control transistor provided between a data line and a first conductive terminal of the drive transistor and having a control terminal connected to a scanning line, a threshold compensation transistor provided between the drive transistor's control terminal and second conductive terminal and having a control terminal connected to the scanning line, and an initialization transistor having a first conductive terminal connected to the control terminal of the drive transistor, a second conductive terminal to which an initialization voltage is applied, and a control terminal connected to the control line. A scanning line driver circuit selectively performs operations of selecting the scanning lines in a predetermined order and in a reverse order and, for each scanning signal line, selects the control line that corresponds to the scanning line one horizontal period before the selection of the scanning line.

Abstract: A display device includes a display panel comprising subpixels, data lines, and driving transistors, a data driving circuit configured to convert image data into data voltages and apply the data voltages to the data lines, and a timing the controller configured to control the data driving circuit and switch between a first compensation mode and a second compensation mode responsive to a driving frequency variation of the display device during exceeding a reference value, wherein, in the first compensation mode, the data voltages of the driving transistors in an entire area of the display panel are compensated through a real-time sensing process of characteristic values of the driving transistors during a blank period, and in the second compensation mode, the data voltages of the driving transistors in at least a partial area of the display panel are compensated according to a temperature value of the display panel.

Abstract: A display panel has a display area and a non-display area surrounding the display area, and includes photosensitive components and a photosensitive driving circuit. The photosensitive components are used to sense ambient light, and the photosensitive driving circuit is connected to the photosensitive components to drive the photosensitive components. The photosensitive driving circuit is disposed in the non-display area, and at least a part of the photosensitive components is disposed in the non-display area.

Abstract: The disclosure provides a display panel, a method of manufacturing the same, a display device, and an electronic apparatus. The display panel includes a display area and a non-display area, where the display panel further includes: at least one signal bus located in and across the display area; a plurality of metal wires located in the display area and each having an end electrically coupled to the at least one signal bus; and a control circuit located in the non-display area and electrically coupled to another end of each metal wire.

Abstract: A display panel and a display device are provided. The display panel includes a main display region, a sub display region, a plurality of first pixel repeating units disposed in the main display region, and a plurality of second pixel repeating units disposed in the sub display region. A bend line boundary is firmed between the main display region and the sub display region. The bend line boundary includes a plurality of bending units. Each bending unit corresponds to at least one second pixel repeating unit, so that the pixel repeating units of the sub display region are consistent with the pixel repeating units at its edge, and a display difference is reduced.

Abstract: The present disclosure provides a pixel driving circuit, a driving method thereof, and a display device. In the pixel driving circuit, a first terminal of a first storage sub-circuit is connected to a control terminal; a power control sub-circuit is connected to a light-emitting control signal line, a first power line and a first terminal of the driving sub-circuit; a compensation sub-circuit is connected to a first gate line, a control terminal and a first terminal of the driving sub-circuit; a data writing-in sub-circuit is connected to a second terminal of the first storage sub-circuit; a first reset sub-circuit is connected to a reset signal line, a first power line and the control terminal of the driving sub-circuit; a first control sub-circuit is connected to the first gate line, an initialization signal line and the second terminal of the driving sub-circuit.

Abstract: An electronic device may have a display with pixels configured to display an image. The pixels may be overlapped by a cover layer. The display may have peripheral edges with curved cross-sectional profiles. An inactive area in the display may be formed along a peripheral edge of the display or may be surrounded by the pixels. Electrical components such as optical components may be located in the inactive area. An image transport layer may be formed from a coherent fiber bundle or Anderson localization material. The image transport layer may overlap the pixels, may have an opening that overlaps portions of the inactive area, may have an output surface that overlap portions of the inactive area, and/or may convey light associated with optical components in the electronic device.

Abstract: To improve display quality in a case where pixels are driven by using a ramp wave voltage.

Abstract: Disclosed are a display panel and a display. The display panel includes a pixel array and a compensation unit, and the pixel array is connected with a plurality of common electrode wires, the compensation unit includes a detection terminal and a feedback terminal; the one or more common electrode wires are provided with a first connecting wire, and the one or more electrode wires are provided with a second connecting wire, the first connecting wire is connected with the test terminal and the second connecting wire is connected with the feedback terminal, both the first connecting wire and the second connecting wire are provided with a configuration section; when the configuration section is provided with the connector, a connecting wire corresponding to the configuration section is in an on-state; when the configuration section is provided without a connector, a connecting wire corresponding to the configuration section is in an off-state.

Abstract: A display driver that includes image processing circuitry and a source driver. The image processing circuitry is configured to perform a burn-in compensation to determine a first compensated luminance value for a first pixel in a first area of a display panel based at least in part on a first accumulated luminance value for the first pixel. The first area has a first pixel layout. The image processing circuitry is further configured to scale a second accumulated luminance value for a second pixel in a second area of the display panel to determine a scaled accumulated luminance value. The second area has a second pixel layout different from the first pixel layout. The image processing circuitry is further configured to perform a burn-in compensation to determine a second compensated luminance value for the second pixel based at least in part on the scaled accumulated luminance value.

Abstract: A dot-matrix display device includes a display, a converter circuit, and a control circuit. The display includes multiple gate signal lines, multiple source signal lines, and multiple pixel circuits arranged at intersections of the multiple gate signal lines and source signal lines. The converter circuit obtains a serial signal SI in synchronization with a first clock signal SCK input from outside and converts the obtained serial signal to a parallel signal. The serial signal is input from outside serially. The serial signal includes address data for specifying, of the multiple pixel circuits, a pixel circuit to undergo a refresh of image data, and the image data to be provided to the specified pixel circuit. The control circuit generates, based on a second clock signal ENB_V having a lower frequency than the first clock signal, a control signal for controlling timing of serial-to-parallel conversion performed by the converter circuit.

Abstract: The present invention relates to the technical field of smart lighting, in particular to a method for controlling intelligent adjustment of brightness, color and color temperature of lamps. The method periodically stores the total running time of a lamp from the current power-on to the present at each power-on stage by switching on and off; and matches the running time data of the device powered on in different periods with the predetermined logic of dimming, color tuning, or color temperature tuning. Once there is a successful matching, the device enters a mode of automatically cycling dimming, color turning or color temperature tuning. Users may select their favorite brightness, color or color temperature by powering off when lamps automatically switch to the brightness, color or color temperature.

Abstract: A display device can include a display panel having plurality of pixels, each including sub pixels having different colors; a data driver to supply a data voltage to the pixels by using a plurality of data lines; and a gate driver to supply a gate signal to the pixels using a plurality of gate lines. Also, each of the data lines is divided into a plurality of sub data lines, and each of the sub data lines is connected to sub pixels having the same color, sub pixels having the same color are disposed in a same column, and the sub pixels in the same column are connected to each of the sub data lines, and the number of sub data lines branching from one of a data line has the same number of gate lines which is connected to the plurality of pixels in a same row.

Abstract: Provided is a pixel circuit configured to drive, in an Xth frame period, a light emitting device to emit light. The Xth frame period includes Y data writing stages and Z light emitting stages, in which a yth data writing stage includes a first sub-stage to a third sub-stage. The pixel circuit includes: a driving transistor; a first reset module configured to transmit, in the first sub-stage, a first initialization signal to the driving transistor in response to a first scanning signal; a gating module configured to perform, in the second sub-stage, a threshold compensation on the driving transistor in response to a second scanning signal; and an input module configured to transmit, in the third sub-stage, a data signal to the driving transistor in response to a third scanning signal. X, Y, Z and y are positive integers, y?Y, and Y?Z.

Abstract: A self-monitoring method of a display and a display are disclosed. The self-monitoring method of a display includes: inputting a first image test signal including a predetermined image test signal, in which the first image test signal includes playing signals of at least two frames of test image that are played in turn by switching; acquiring a display parameter of the predetermined image test signal; dividing at least two frames of image outputted into a plurality of areas, in which the areas include a predetermined area and a remaining area; acquiring a first display parameter of the predetermined area; determining whether or not an image displayed is matched with the first image test signal to acquire a first match result; and determining whether or not display abnormality presents in the display based on the first match result. The method can determine whether or not display abnormality presents in the display.

Abstract: A display device is provided. The display device includes a clock control chip configured to transmit display signals and a data driving chip connected to the clock control chip. The data driving chip is configured to adjust a phase of the clock signal output by the data driving chip based on the display signal.

Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.

Abstract: The present disclosure provides a line drive signal enhancement circuit, a shift register unit, and a display panel, and relates to the technical field of display. The line drive signal enhancement circuit includes a control unit, an inverter unit, a first output unit and a second output unit. The control unit has a first peripheral control terminal and a second peripheral control terminal respectively loaded with two inverted signals, and the input terminal is electrically connected with the first power supply lead. The first output unit and the second output unit both have two input terminals. The two input terminals are respectively electrically connected with the first power supply lead and the second power supply lead. The output terminal of the control unit is electrically connected with the control terminal of the first output unit and/or the control terminal of the second output unit.

Abstract: The present disclosure relates to an image scaling method and an apparatus thereof. The method includes: for at least one interpolation pixel in a source image, grouping at least two adjacent pixels of the interpolation pixel to obtain adjacent pixel sets; no intersection existing between the adjacent pixel sets; determining, based on position relationships between the interpolation pixel and regions formed by the adjacent pixel sets, virtual interpolation pixels corresponding to the interpolation pixel in the regions formed by the adjacent pixel sets respectively; calculating corresponding pixel sampling values of the virtual interpolation pixels in the source image according to a preset bilinear interpolation algorithm respectively; and generating theoretical pixel values corresponding to the interpolation pixel based on the pixel sampling values corresponding to the virtual interpolation pixels; the theoretical pixel values being configured to perform image scaling on the source image.

Abstract: An embodiment provides a latch circuit which outputs, to a digital analog converter (DAC), a digital signal including grayscale data, the latch circuit including a first latch configured to store the digital signal and a second latch configured to output the digital signal by controlling first timing at which a level of a first signal included in the digital signal becomes an enable level, based on a center grayscale. The grayscale data includes first grayscale data and second grayscale data.

Abstract: A display device includes a substrate including a first region, a second region, and a bending region between the first region and the second region, a protective substrate disposed below the substrate in the first region, the second region, and the bending region, a cushion layer disposed below the protective substrate in the first region and the second region, a pixel layer disposed on the substrate in the second region, and a drive chip disposed on the substrate in the first region. The substrate is bent at the bending region such that the first region overlaps the second region.

Abstract: In a pixel circuit including a first capacitance element and a second capacitance element, in a writing sub-frame, a voltage corresponding to a gray scale level is held in a first capacitance element, a plurality of OLEDs are off in a vertical scanning line flyback period after the writing sub-frame, and in a light-emitting sub-frame after the vertical scanning line flyback period, a current corresponding to the voltage held in the first capacitance element is supplied to the OLED, and the voltage corresponding to the gray scale level is held in the second capacitance element. In an optical path shifting element, an optical path is shifted in the vertical scanning line flyback period, and in the light-emitting sub-frame, the optical path is stabilized.

Abstract: Provided is a liquid crystal handwriting board. The liquid crystal handwriting board includes: a liquid crystal panel, and a drive assembly electrically connected to the liquid crystal panel; wherein the liquid crystal panel includes: a first substrate and a second substrate that are opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate; and the drive assembly is configured to apply, based on position information of a region to be erased, a pixel voltage to a pixel electrode in the region to be erased in the case that the liquid crystal handwriting board is in an erasing mode, such that a voltage difference is developed between the pixel electrode in the region to be erased and the common electrode.

Abstract: A GOA circuit and a display panel are proposed. An inverting control module controls the voltage level of the first node to be opposite to the voltage level of the second node under the control of an (n+1)th-stage clock signal, so that a DC path between a constant high voltage terminal and a first constant low voltage terminal is not formed. When a first node is at the low voltage level, the voltage applied on the second node transitions from the low voltage level to high voltage level. Accordingly, the second node is constantly at the high voltage level at the pull-down maintenance stage in the GOA circuit, and the nth-stage gate-driven signal terminal is still at the low voltage level. In this way, the GOA circuit will not become ineffective.

Abstract: A display module includes a display panel, a power management circuit, a source driving circuit, and a signal processing circuit. The display panel includes a plurality of pixel units. The power management circuit generates a first signal. The source driving circuit is electrically connected to the plurality of pixel units. The signal processing circuit, electrically connected between the source driving circuit and the power management circuit, is configured to process the first signal into a second signal and load the second signal to the source driving circuit. An energy of the second signal is different from an energy of the first signal.

Abstract: A display device may include a substrate including a circular display area and a non-display area, a plurality of pixels including a first pixel and a second pixel disposed on the display area of the substrate, a first sub-demux circuit connected to the first pixel and disposed on the non-display area, a second sub-demux circuit connected to the second pixel and disposed on the non-display area, a first connection line connected to the first sub-demux circuit and the second sub-demux circuit and disposed on the non-display area to transfer first and second data input signals to the first and second sub-demux circuits, and a plurality of gate stages connected to the pixels and disposed on the non-display area to transfer gate signals to the pixels. Some of the gate stages are disposed between the first sub-demux circuit and the second sub-demux circuit.

Abstract: The present disclosure provides methods and apparatus for configuring an image data transfer time for sending image data from a processor to a display panel along a display path. One method includes receiving, by the processor from the display panel, a display panel refresh interval indication indicating a display panel refresh interval of the display panel. The display panel refresh interval of the display panel corresponds to a time duration of a display period of the display panel. The display panel is configured to refresh each display period. The image data transfer time is computed based on the display panel refresh interval. One or more components of the display path are configured to support the computed image data transfer time.

Abstract: The present disclosure provides a display substrate, in which power lines and compensation detection lines are alternately arranged at intervals, and two columns of pixel driving circuits extending along a second direction are arranged between any one of the power lines and one adjacent compensation detection line; and for any one of a plurality of pixel driving circuits, a power input terminal of the pixel driving circuit is electrically connected to the power line closest to the pixel driving circuit, and a compensation detection signal terminal of the pixel driving circuit is electrically connected to the compensation detection line closest to the pixel driving circuit. The present disclosure further provides a display device.

Abstract: A display device includes a display panel, controller configured to generate a second data enable signal and second image data based on a first data enable signal and first image data, and generate an output data enable signal and output image data by performing a black data insertion operation, and data driver configured to provide data signals based on the output data enable signal and the output image data, where the controller obtains a delay time between the first data enable signal and the second data enable signal or the first image data and the second image data, determines a number of subsequent pulses of the output data enable signal during a period from one time point within a frame period to an end time point of the frame period, and adjusts a cycle of the subsequent pulses based on the delay time and the number of the subsequent pulses.

Abstract: A partitioned display structure includes a plurality of direct current (DC) voltage electrodes, each of the DC voltage electrodes is connected to a plurality of light-emitting units; a plurality of input voltage sources, the input voltage sources are connected to the DC voltage electrodes in a one-to-one manner, and are configured to transmit input signals to the plurality of light-emitting units for emitting light for displaying images; and a plurality of switches. Each of the switches is connected between two adjacent DC voltage electrodes to control a connection between the two adjacent DC voltage electrodes, the plurality of DC voltage electrodes are connected with each other in response to the plurality of switches in a turned-on state, and the plurality of DC voltage electrodes are insulated from each other in response to the plurality of switches in a turned-off state.

Abstract: Provided is a display device comprising at least one sensing pixel including a sensing pixel circuit, a sensing unit including sensing circuit, and a temperature output unit to calculate a temperature of the display panel based on the sensing data. The sensing data is generated from a sensing pixel including a driving transistor in which a current generated according to temperature varies, and a temperature is measured from the sensing data.

Abstract: Display elements, each having anode and cathode terminals, are arranged into rows and columns. Each row has an anode-line coupled to the anode terminals for its display elements. Each column has a cathode-line coupled to the cathode terminals for its display elements. A switch for each anode-line selectively couples that anode-line to a storage capacitor, and a switch for each cathode-line selectively couples that cathode-line to the storage capacitor. A display driver activates the row driver for a given row and the column driver for a given column. A switch driver closes the switch for the cathode-line for the given column, then opens the switch for that cathode-line. The display driver deactivates the row driver for the given row, after closing the switch for the cathode-line for the given column. The switch driver closes the switch for the anode-line for the given row.

Abstract: A display device includes a display panel including a first data line, a second data line, and a pixel, the pixel including a first sub-pixel coupled to the first data line, and a second sub-pixel coupled to the second data line, a light stress compensator configured to generate a first data voltage control signal for the first sub-pixel based on a second data value of input image data for the second sub-pixel, in response to a first data value of input image data for the first sub-pixel being equal to or less than a first reference value, and a data driver configured to generate a first data signal based on the first data value for the first sub-pixel, to provide a first data voltage to the first data line, and to vary the first data voltage based on the first data voltage control signal.

Abstract: A method for projecting image contents onto a user's retina using an optical system. A light beam is first projected onto a diverting unit of the optical system using a projector unit of the optical system. The light beam is subsequently diverted to the position of the user's eye. An ascertained deviation of an actual state of the projected light beam diverted by the diverting unit from a desired state is stored using memory unit. Second image data are generated using an image-processing device based on the stored and ascertained deviation of the actual state of the projected light beam from the desired state. The second image data are received using the projector unit. The received second image data are projected at successive second time intervals using the projector unit. At least two of the second time intervals differ from one another in terms of time.

Abstract: Systems and methods for backlight dimming via buck-boost conversion in an information handling system (IHS) are described. In some embodiments, an IHS may include an embedded controller (EC), and a memory coupled to the EC, the memory having program instructions stored thereon that, upon execution, cause the EC to: determine a characteristic of a display having a backlight; and dim the display by controlling a buck-boost converter to reduce a voltage applied to the backlight.

Abstract: An LCD display, comprising an active display area, a backlight to illuminate the active display area, and an LCD display stack. The LCD display stack may comprise a substrate, a liquid crystal layer over the substrate, and liquid crystal cover layer. The substrate, the liquid crystal layer, and the liquid crystal cover layer define a liquid crystal cell. The LCD display stack has an edge seal extending between the substrate and the liquid cover layer, and extends over the active display area and beyond the active display area to bend around an edge of the backlight, such that the edge seal lies beyond the active display area.

Abstract: An array substrate and a display device. The array substrate includes a base substrate, a plurality of pixel electrodes, a plurality of first common electrodes, a first-common-signal line and a connection line, that are disposed on the base substrate. The first common electrode is a common electrode of the array substrate. The connection line is connected between the first-common-signal line and the first common electrode, enabling a voltage from the first-common-signal line to be output to the first common electrode through the connection line. The array substrate also includes a detection line, the detection line and the first-common-signal line are insulated from each other, and an orthographic projection of the detection line on the base substrate and an orthographic projection of the first-common-signal line on the base substrate have at least one intersection point. The detection line is also arranged to be extended outside the base substrate.

Abstract: Disclosed are a driving circuit, a driving method, and a display panel. The method includes: turning on the first thin film transistor to control the voltage of the first node to be an initialization voltage; then controlling the voltage of the second node to be a threshold voltage based on the respective voltage difference between the initialization voltage and the turned-on second and the fourth thin film transistor; turning on the third thin film transistor to compensate the threshold voltage to obtain a driving voltage; turning on the fifth thin film transistor to access the driving current by the driving voltage, the driving current is controlled to pass through the turned-on sixth thin film transistor to drive the light-emitting diode.