Memory Addressing Patents (Class 345/686)
  • Patent number: 11790873
    Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.
    Type: Grant
    Filed: August 12, 2022
    Date of Patent: October 17, 2023
    Assignee: Apple Inc.
    Inventors: Stanley Bo-Ting Wang, Derek Keith Shaeffer, Ivan Knez, Jose Antonio Dominguez-Caballero, Tien-Chien Kuo
  • Patent number: 11417298
    Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: August 16, 2022
    Assignee: Apple Inc.
    Inventors: Stanley Bo-Ting Wang, Derek Keith Shaeffer, Ivan Knez, Jose Antonio Dominguez-Caballero, Tien-Chien Kuo
  • Patent number: 10978028
    Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 13, 2021
    Assignee: Apple Inc.
    Inventors: Stanley Bo-Ting Wang, Derek Keith Shaeffer, Ivan Knez, Jose Antonio Dominguez-Caballero, Tien-Chien Kuo
  • Patent number: 10241263
    Abstract: One embodiment is directed to a compact system for scanning electromagnetic imaging radiation, comprising a first waveguide and a second waveguide, each of which is operatively coupled to at least one electromagnetic radiation source and configured such that output from the first and second waveguides is luminance modulated and scanned along one or more axes to form at least a portion of an image.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 26, 2019
    Assignee: Magic Leap, Inc.
    Inventors: Brian T. Schowengerdt, Matthew D. Watson
  • Patent number: 9823831
    Abstract: An electronic device displays a first application view at a first size. The first application view corresponds to a first application in a plurality of concurrently open applications. The device detects a first input; and, in response, enters an application view selection mode for selecting one of the concurrently open applications, and displays images of open applications. Each image is displayed at a second size that is smaller than the first size, a corresponding open application icon is concurrently displayed with each image, and the images and corresponding open application icons correspond to at least some of the plurality of concurrently open applications. The device detects a selection gesture on a respective image of an open application; and, in response, displays a respective application view at the first size for a corresponding application; ceases to display the images and corresponding open application icons; and exits the application view selection mode.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: November 21, 2017
    Assignee: APPLE INC.
    Inventor: Imran Chaudhri
  • Patent number: 9519379
    Abstract: A projector provides plural display areas on a screen and respectively displays input images input from plural image sources in the respective display areas by a projection unit, and includes a location detection unit that detects a pointed location of a pointing tool on the screen, and an image processing unit that executes processing over the plural display areas according to the detected pointed location.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: December 13, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Hiroyuki Ichieda
  • Patent number: 8952982
    Abstract: To provide an image display device for displaying, when displaying a plurality of display targets while scrolling, the respective display targets in a manner that takes into consideration the sizes and scroll directions of the respective display targets. An image display device places a plurality of display targets on a virtual plane, instructs the size of a display area defined on a part of the virtual plane, displays an image showing a picture inside the display area, and moves at least either one of the display targets and display area along a predetermined direction set on the virtual plane, relative to the virtual plane, in which the respective display targets are placed so as to be included in an area which is a band area extending in the predetermined direction on the virtual plane, having a width corresponding to the instructed size of the display area, and partially overlapping the display area.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: February 10, 2015
    Assignees: Sony Corporation, Sony Computer Entertainment Inc.
    Inventor: Munetaka Tsuda
  • Patent number: 8947447
    Abstract: A new hardware architecture defines an indexing and encoding method for accelerating incoherent ray traversal. Accelerating multiple ray traversal may be accomplished by organizing the rays for minimal movement of data, hiding latency due to external memory access, and performing adaptive binning. Rays may be binned into coarse grain and fine grain spatial bins, independent of direction.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: February 3, 2015
    Assignee: Raycast Systems, Inc.
    Inventor: Alvin D. Zimmerman
  • Patent number: 8922555
    Abstract: One embodiment of the present invention sets forth a technique for storing only the enabled components for each enabled vector and writing only enabled components to one or more specified render targets. A shader program header (SPH) file provides per-component mask bits for each render target. Each enabled mask bit indicates that the pixel shader generates the corresponding component as an output to the raster operations unit. In the hardware, the per-component mask bits are combined with the applications programming interface (API)-level per-component write masks to determine the components that are updated by the shader program. The combined mask is used as the write enable bits for components in one or more render targets. One advantage of the combined mask is that the components that are not updated are not forwarded from the pixel shader to the ROP, thereby saving bandwidth between those processing units.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: December 30, 2014
    Assignee: NVIDIA Corporation
    Inventors: Jerome F. Duluk, Jr., Jesse David Hall, Patrick R. Brown, Mark Dennis Stadler
  • Patent number: 8754828
    Abstract: In an embodiment, a display apparatus includes multiple physical interface circuits (PHYs) couple to respective displays. In a mirror mode, the PHYs may operate as masters. A primary master PHY may control a synchronization interface to one or more secondary master PHYs. The synchronization interface may include a start of frame signal that the primary master PHY may generate to indicate the beginning of a new frame. The secondary master PHYs may be configured to generate internal start of frame signals while independently processing the same display data as the primary master. If the internally-generated start of frame and the received start of frame occur within a window of tolerance of each other, then the secondary masters may continue to process the display data stream independently. A secondary master that detects the start of frames occur outside of the window of tolerance may resynchronize.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: June 17, 2014
    Assignee: Apple Inc.
    Inventors: Wolfgang Roethig, Michael Frank
  • Patent number: 8681165
    Abstract: Provided is an image rotation method and apparatus for rotating an original image of 2nĂ—2n pixels when n is a natural number greater than 1, including loading each row of pixels of the original image into a corresponding load memory vector; and, after the load step, for at least one iteration, performing a transposition operation for each matched load memory vector after matching the load memory vectors and, for zero or more iterations, an interleaving operation between each matched load memory vector after matching the load memory vectors, while the transposition step and the interleaving step are performed a total of n iterations.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: March 25, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jae Yong Choi, Byong Suk Jeon, Bum Suk Kim
  • Patent number: 8647204
    Abstract: A video game program and a video game device are disclosed. If there is no move instruction from the player through a touch panel, the game image displayed on the display screen is scrolled if the position indicated by an input position from the touch panel is included within a first peripheral area along the periphery of the display screen. If there is a move instruction from the player through the touch panel, the game image displayed on the display screen is scrolled if the position indicated by the input position from the touch panel is included within a second peripheral area, larger than the first peripheral area, along the periphery of the display screen. Thus, in a video game device using a touch panel, an appropriate scroll process according to the status of the game is established, thereby improving the operability of the device.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: February 11, 2014
    Assignee: Nintendo Co., Ltd.
    Inventor: Yuuji Kando
  • Patent number: 8314752
    Abstract: In a method for driving a display device, an address counter is used for generating a plurality of address variables corresponding to data of a scan line. Next, an address mapping circuit generates a first target address by data-mapping an address variable, and generates a second target address by data mapping data stored in an address look-up table memory. Subsequently, a row buffer memory accesses data corresponding to a first scan line based on the first target address, and accesses data corresponding to a second scan line based on the second target address.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: November 20, 2012
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Hsiao-Ming Huang, Chun-Lung Wang, Yi-Lin Yeh
  • Patent number: 8279470
    Abstract: To reduce a load required for data transfer and data processing to improve processing speed of those. A display data memory stores as display data a configuration image simulating an overall configuration of a combination of a main body and an attachment. An image display device provided on either one of the main body and the attachment includes a display screen having a display area divided into a plurality of divisional areas for displaying the configuration image. A CPU determines displaying and non-displaying on each of the plurality of divisional areas, and controls the image display device to allow a part of the configuration image to be displayed on a divisional area which is determined to be displayed in accordance with display data, and to allow an other part of the configuration image not to be displayed to on a divisional area which is determined not to be displayed.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: October 2, 2012
    Assignee: Kyocera Mita Corporation
    Inventors: Yoshiteru Nishikawa, Makoto Ochi
  • Patent number: 8245152
    Abstract: Methods and apparatuses to accelerate scrolling for buffered windows. In one aspect of the invention, a method to scroll a buffered window on a data processing system includes: determining a second region of a second pixel image of a window in a frame buffer, which corresponds to a first region of a first pixel image of the window buffered in a window buffer that is scrolled from a first position to a second position in the first pixel image of the window in the window buffer; and scrolling the second region in the frame buffer to synchronize the second pixel image in the frame buffer with the first pixel image in the window buffer. In one example according to this aspect, the second region in the frame buffer is scrolled using graphics hardware; the frame buffer is located inside a video memory under control of the graphics hardware.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: August 14, 2012
    Assignee: Apple Inc.
    Inventors: Ralph T. Brunner, Haroon Sheikh, Peter Graffagnino
  • Patent number: 8223161
    Abstract: An image generation apparatus provides correction for color offsets. Color offsets may be caused by misalignments in laser diodes or optics assemblies in a laser projector. The offsets may be measured during or after manufacture of the laser projector. An image buffer is responsive to the offset data to translate each color plane separately. The image buffer may include separately addressable portions for each color. Further, variable delay elements on the output of the image buffer may provide color offset correction. Interpolation provides further offset correction.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: July 17, 2012
    Assignee: Microvision, Inc.
    Inventors: Margaret K. Brown, Mark O. Freeman, Mark Champion, Shawn M. Swilley, Maciej A. Jakuc
  • Patent number: 8137196
    Abstract: A video game program and a video game device are disclosed. If there is no move instruction from the player through a touch panel, the game image displayed on the display screen is scrolled if the position indicated by an input position from the touch panel is included within a first peripheral area along the periphery of the display screen. If there is a move instruction from the player through the touch panel, the game image displayed on the display screen is scrolled if the position indicated by the input position from the touch panel is included within a second peripheral area, larger than the first peripheral area, along the periphery of the display screen. Thus, in a video game device using a touch panel, an appropriate scroll process according to the status of the game is established, thereby improving the operability of the device.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: March 20, 2012
    Assignee: Nintendo Co., Ltd.
    Inventor: Yuuji Kando
  • Patent number: 7911484
    Abstract: A source driver comprising a frame memory, a first line buffer, and a second line buffer. The frame memory stores bits of pixel values of an image. The first line buffer then sequentially latches the bits of the pixel values from the frame memory with a first address index. The second line buffer then sequentially latch the bits of the pixel values from the first line buffer with a second address index, which is different from the first address index, and writes the bits of the pixel values back to the frame memory, such that the image is scrolled. The present invention also provides a method of refreshing the frame memory in a source driver.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: March 22, 2011
    Assignee: Himax Technologies Limited
    Inventors: Tian-Hau Chen, Chih-Heng Chu
  • Publication number: 20100302283
    Abstract: When a user carries out a specific operation at high speed in a conventional display device and the like, information stored in advance at a memory is not sufficient to display but it is necessary to acquire the information required for displaying from a server on a network, an external electronic apparatus, such as an HD, or an internal long term memory device of a display device every time it happens. Because of this, a user is kept waiting until desired information is displayed, so that it is hard to smoothly reflect a high speed operation on a graphic display. In order to solve the problem, the present invention proposes a display device characterized in caching graphic information that has the possibility to be used for display in the future in response to a user's operation history of graphics.
    Type: Application
    Filed: April 18, 2008
    Publication date: December 2, 2010
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Jun Sasaki, Hiroyuki Nakamura, Kenji Sakamoto, Satoshi Matsuyama, Ryusuke Watanabe, Akio Uemichi
  • Patent number: 7802196
    Abstract: Methods and apparatuses to accelerate scrolling for buffered windows. In one aspect of the invention, a method to scroll a buffered window on a data processing system includes: determining a second region of a second pixel image of a window in a frame buffer, which corresponds to a first region of a first pixel image of the window buffered in a window buffer that is scrolled from a first position to a second position in the first pixel image of the window in the window buffer; and scrolling the second region in the frame buffer to synchronize the second pixel image in the frame buffer with the first pixel image in the window buffer. In one example according to this aspect, the second region in the frame buffer is scrolled using graphics hardware; the frame buffer is located inside a video memory under control of the graphics hardware.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: September 21, 2010
    Assignee: Apple Inc.
    Inventors: Ralph T. Brunner, Haroon Sheikh, Peter Graffagnino
  • Patent number: 7796142
    Abstract: The invention concerns a method for displaying a document on a display screen capable of being subjected to a scroll procedure, involving the following steps: providing the document with an amount of graphic memory to create a buffer memory of the visible part of the document and zones nearest to said visible part; calculating and cutting out into pixmaps said memory; relatively positioning said pixmaps with respect to the entire document and its visible part; filling up the content of the pixmaps, when the document is subjected to a display or scroll procedure, recopying the pixmap content in the display window; and repeating the relative positioning of the pixmaps with respect to the document.
    Type: Grant
    Filed: October 13, 2003
    Date of Patent: September 14, 2010
    Assignee: Thomson Licensing S.A.
    Inventor: Jean-Stéphane Villers
  • Patent number: 7768518
    Abstract: Embodiments described herein disclose a system for enabling emulation of a MIMD ISA extension which supports user-level sequencer management and control, and a set of privileged code executed by both operating system managed sequencers and application managed sequencers, including different sets of persistent per-CPU and per-thread data. In one embodiment, a lightweight code layer executes beneath the operating system. This code layer is invoked in response to particular monitored events, such as the need for communication between an operating system managed sequencer and an application managed sequencer. Control is transferred to this code layer, for execution of special operations, after which control returns back to originally executing code. The code layer is normally dormant and can be invoked at any time when either a user application or the operating system is executing.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: August 3, 2010
    Assignee: Intel Corporation
    Inventors: Jamison Collins, Perry Wang, Bernard Lint, Koichi Yamada, Asit Mallick, Richard A. Hankins, Gautham Chinya
  • Patent number: 7523189
    Abstract: Methods and computer readable media for generating displays of user-defined blocks of networking addresses on a map of an associated address space are provided. Each block of networking addresses is described in a user-defined table with a start address and a map size. The display for each block of network addresses may be rendered on the map at a location based on the relative position of the start address within the associated address space and of a size based on the mask size in relation to the associated address space.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: April 21, 2009
    Assignee: Internet Associates, LLC
    Inventors: Dennis Joseph Boylan, Kenneth Douglas Burroughs, Sean Ming Drun, John Leland Lee, Angela Kristine Schneider
  • Patent number: 7230600
    Abstract: A display system includes a repairable memory that re-routes data when a defect exists in the memory. A significant bit in the display memory that would otherwise be corrupted by a bad memory cell is re-routed to a least significant bit position in the memory, and the least significant information is discarded. The repairable memory includes a memory device and two repair routers. One repair router is on the input of the memory, and one repair router is on the output of the memory. One or more least significant bits can be sacrificed to preserve more significant bit information.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: June 12, 2007
    Assignee: Intel Corporation
    Inventor: Samson X. Huang
  • Patent number: 7154515
    Abstract: A method and apparatus for eliminating artifacts in images formed using more than one image segment. A buffer region associated with two adjacent image segments is defined wherein the intensity levels of the pixels are attenuated. When image segments substantially overlap in the buffer region, the intensity in the buffer region substantially sums to full scale. The intensity of the pixels in the buffer region is preferably attenuated using a device to modulate the intensity of the source of radiation.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: December 26, 2006
    Assignee: PerkinElmer, Inc.
    Inventors: Joseph P. Donahue, William A. Hart
  • Patent number: 6996279
    Abstract: Storing of data items in a memory (31) is provided wherein the data items are divided into successive data pieces of decreasing significance, and the data pieces are stored in respective parts of the memory (31), and when applying a data piece to the memory (31) in case all candidate memory parts are assigned to other data pieces: if the significance of the applied data piece is lower than a lowest significance of the other data pieces, discarding the applied data piece; if the significance of the applied data piece in one of the candidate memory parts at expense of a given other data piece which has a lower significance that the significance of the applied data piece, wherein the significance value of a data piece is based on a total or absolute distortion value of the data item. Advantageous use of the invention is made in applications using a device of fixed storage capacity for storing a flexible number of compressible data items, such as video, images, audio, speech.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: February 7, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Renatus Josephus Van Der Vleuten
  • Patent number: 6828978
    Abstract: Graphical memory access requests are routed to a plurality of bucket buffers. Filled bucket write buffers and empty bucket read buffers are efficiently emptied and filled respectively via a wide memory bus. The bucket sorting apparatus and method is used to increase the locality of memory references and pixel operations within a graphical rendering system. The increased locality increases graphical rendering performance and facilitates the usage of smaller z-buffers, larger tiles, and low-cost dynamic RAM within a graphics pipeline.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: December 7, 2004
    Inventor: David B. Buehler
  • Publication number: 20040233204
    Abstract: A method and apparatus for sharing the video memory of a graphic chip includes the steps as follows: when the destination block of a frame buffer executes color expansion, storing a color LUT to a memory shared by both pattern and color LUT in a video memory, so as to provide color expansion; and when the graphic engine accesses a pattern memory, storing a pattern block to the memory shared by both pattern and color LUT for the access of a graphic engine. By the above-mentioned sharing mechanism, the physical layout area of the graphic chip is reduced and the cost also drops.
    Type: Application
    Filed: May 24, 2004
    Publication date: November 25, 2004
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Roger Lin, Hill Cho
  • Patent number: 6731808
    Abstract: Storing of data items in a memory (31) is provided wherein the data items are divided into successive data pieces of decreasing significance, and the data pieces are stored in respective parts of the memory (31), and when applying a data piece to the memory (31) in case all candidate memory parts are assigned to other data pieces: if the significance of the applied data piece is lower than a lowest significance of the other data pieces, discarding the applied data piece; if the significance of the applied data piece is higher than the lowest significance, storing the applied data piece in one of the candidate memory parts at expense of a given other data piece which has a lower significance than the significance of the applied data piece. Advantageous use of the invention is made in applications using a device of fixed storage capacity for storing compressible data, such as video, images, audio, speech.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: May 4, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Renatus Josephus Van Der Vleuten, Richard Petrus Kleihorst
  • Patent number: 6570562
    Abstract: A method for rendering patterned lines in an environment that need not support rendering of patterned lines through a standard viewing mechanism, but that does support the rendering of graphical primitives in an off-screen imaging area. A solid line is rendered in the off-screen imaging area that has been filled with a background color by turning the pixels corresponding to the solid line from the background color to a line color. A pattern is next applied to the solid line to render a patterned line by use of a filtering mechanism that filters out pixels that correspond to off-segments of the pattern. The patterned line is next transferred from the off-screen imaging area to a viewing device where it is displayed.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: May 27, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Dan Myers
  • Patent number: 6411274
    Abstract: A digital map display zooming method for continuously enlarging and reducing a displayed portion of a digital map as map information in digital form within a display screen is provided which comprises the steps of displaying the displayed portion of the digital map at the display screen, displaying a scroll part within the display screen for shifting the displayed portion, making the scroll part function as a scale setting part for carrying out enlarging and reducing operations of the displayed portion of the digital map within the display screen, and carrying out enlarging and reducing operations of the displayed portion of the digital map within the display screen by shifting a shifting operation part of the scale setting part.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: June 25, 2002
    Assignee: Sony Corporation
    Inventors: Ryuichi Watanabe, Masafumi Minami, Hiroto Narioka
  • Patent number: 6313850
    Abstract: In a display system having a predefined number, n, of pixel types, a display processor, such as a digital versatile disc (DVD) display processor, includes a color palette which can store more than n color/contrast values and a subpicture bitmap composed of subpicture pixel values, each of which corresponds to one of the n pixel types. In a DVD display system, for example, the DVD subpicture pixel types are: Background, Pattern, Emphasis 1, and Emphasis 2. Each subpicture pixel value is, in turn, related to a color/contrast combination by the color palette, with each pixel value corresponding to the address of a palette location. The corresponding palette location contains the color/contrast value for the related subpicture pixel type. To modify the color/contrast value of a selected group of the pixels having one of the four DVD subpicture pixel types, the display processor updates the color palette, associating new color/contrast values with previously “unused” palette locations.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: November 6, 2001
    Assignee: Oak Technology, Inc.
    Inventor: Brian M. Czako
  • Publication number: 20010024209
    Abstract: In image processing computer system for a photogrammetric analytical measurement in which a survey map is produced on the basis of plural pairs of pictures photographed at different positions, each picture features a photographed target. Plural frames of image data for producing the pictures are stored in a memory, and the frames of image data are read from the memory in a given order such that two consecutive frames of image data are handled as a pair of pictures. A monitor displays two pictures side by side, which are rearranged until two pictures displayed side by side form a proper pair for producing a survey map section. It is determined whether respective two pictures displayed side by side are defined as left-hand and right-hand pictures or right-hand and left-hand pictures with respect to the targets photographed thereon, whereby respective left-hand and right-hand pictures in each pair are displayed at left and right sides on the monitor.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 27, 2001
    Applicant: ASAHI KOGAKU KOGYO KABUSHIKI KAISHA
    Inventors: Shigeru Wakashiro, Toshihiro Nakayama