Abstract: Display data of a first type for a first display device is fetched from a first portion of a first buffer memory and display data of a second type is fetched from a first portion of a second buffer memory at a first time according to an arbitration control signal and then combined into display data for the first display device. Display data of the first type for the second display device is fetched from a second portion of the first buffer memory and display data of the second type for the second display device is fetched from a second portion of the second buffer memory at a second time according to the arbitration control signal, and then combined into display data for the second display device, which is multiplexed with the combined display data for the first display device into a single display data stream and output.

Abstract: A device that stabilizes video timing signals from an analog video signal is provided. In one embodiment, such a device includes a video PLL controller and a vertical synchronization (Vsync) signal generator. The device output a clock for digital video data, where the clock follows the Vsync signal from the analog video but within the jitter requirements for the clock.

Abstract: A method and device for processing a video image are provided. The method comprises: receiving an original video image; adjusting a signal clock frequency of the original video image to acquire a processed video image; after a command signal input by a user is received, capturing the processed video image according to a preset size to acquire a video image corresponding to a display window of the preset size; and encoding the video image corresponding to the display window of the preset size to acquire an encoded video image.

Abstract: A display apparatus, a remote controller and a method for controlling applied thereto are provided. The display apparatus receives direction information regarding an orientation of the remote controller from the remote controller, and selects an area to be controlled by the remote controller from among a first area and a second area of a screen according to the direction information received from the remote controller. As a result, user is enabled to control different areas on the screen by appropriately moving the remote controller between different orientations.

Abstract: The present invention is applicable to the field of multi-screen display technologies. The method includes: detecting a sliding track of a user on the primary screen display device, where the sliding track includes a sliding direction, and an initial position and a real-time position of sliding; determining, according to the initial position and the real-time position of the sliding, a display area of a screen of the secondary screen display device after the sliding by using the sliding direction as a reference direction; tailoring currently displayed content of the primary screen display device according to the display area, to obtain tailored content; and sending the tailored content and the display area to the secondary screen display device, so that the secondary screen display device displays the tailored content on the display area.

Abstract: An automatic tracking camera system includes: a rotating unit for panning and tilting an image pickup unit including a lens apparatus and an image pickup apparatus; a tracking object detector; a motion vector detector for detecting a motion vector of the object to be tracked; a capture position setting unit for setting a capture position of the object to be tracked in the picked up image; and a controller for controlling drive of the rotating unit. The controller controls the rotating unit in a capture mode to capture the object to be tracked at the capture position based on the motion vector detected by the motion vector detector after the tracking object detector has detected the object to be tracked in the picked up image, and a maintenance mode to continuously capture the object to be tracked at the capture position after the capture mode.

Abstract: The present invention ensures the visibility of a character or a drawing displayed on a screen. The illuminance of one or more partial areas forming a display unit is measured, and a video display position is set to an area except for the partial area where the illuminance is a reference value or more.

Abstract: A method for detecting motion in video fields of video data, comprises the steps of: calculating texture information for a pixel in the video fields; determining a threshold value as a function of the calculated texture information; calculating a differential value for the pixel; and detecting motion in the video fields as a function of the determined threshold value and the calculated differential value.

Abstract: A video sequence control system 100 comprising: a video frame sequence component 102 for providing video frames 104 for display by a projector 108, the video frames having a sequence 110 of at least one crosstalk reduction frame 112 followed a n image frames 114; and a synchronization control component 118, the synchronization control component 118 communicatively coupled to an image capture device 120 the synchronization control component providing a timing signal 122 to synchronize image capture with the occurrence of the at least one crosstalk reduction frame in the video frame sequence.

Abstract: A display apparatus capable of moving an image and a control method thereof are provided. The display apparatus includes a display unit, an interface which receives image coordinate information and image source information from an external device that displays the image, and a controller which controls the display unit to display the image using the image coordinate information and image source information. Therefore, the image can continue to move between display apparatuses while being displayed, thereby increasing user convenience.

Abstract: There is provided a display apparatus which includes a signal processing part which processes a video signal including at a peripheral area thereof a position determining pattern having a plurality of characteristics; a display part which displays a picture on the basis of the video signal processed by the signal processing part; a sensing part which senses the position determining pattern which is included in the video signal; and a control part which controls the signal processing part to adjust a position of the picture displayed on the display part, on the basis of a shift between a characteristic sensed by the sensing part among the plurality of characteristics of the position determining pattern and a predetermined reference characteristic. The position determining pattern has a face shape. Accordingly, the position of the picture can be quickly determined and adjusted.

Abstract: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

Abstract: A digital video editing and playback system and methods of editing and playing back digital video are provided. The system includes a video processor adapted to receive video segments from multiple sources. The video segments include synchronization information. The video processor includes software instructions adapted to be executed by the video processor. The software instructions are adapted to evaluate the synchronization information from various video segments and to form associations between video segments from different sources that correspond to a common event.

Abstract: This invention relates to an ambience lighting system for use in conjunction with a display device including an image display region. A central control receives an incoming audio video stream (AVS) and to determines color information at the periphery of the image to be displayed. Light sources are disposed in a pre-fixed arrangement in relation to the periphery of the image display region, and local control units are coupled to open or more light sources selected from the multiple light sources for locally operating the at least one coupled light source. The central control unit is adapted to transmit the determined color information as a stream to each respective local control unit, which use a portion of the received color information to operate the at least one coupled light source, the portion being determined based on the position of the at least one coupled light source within the pre-fixed arrangement.

Abstract: A multimedia processor includes an audio processor configured to process an audio input signal to generate an audio output signal and an assistant signal, and a video processor coupled with the audio processor and configured to process video input signal and the assistant signal to generate a video output signal simultaneously according to the video input signal and the assistant signal. Provided with the assistant signal, the video processor acquires more video processing-related information for rendering video content in a more realistic manner. Mal-motion detection can thus be prevented, and video quality can be improved.

Abstract: A pose of an object is determine by acquiring sets of images of the object by a camera, wherein the object has a thread arranged on a surface such that a local region of the object appears substantially spherical, wherein the camera is at a different point of view for each set, and wherein each image in each set is acquired while the scene is illuminated from a different direction. A set of features is extracted from each image, wherein the features correspond to points on the surface having normals towards the camera. A parametric line is fitted to the points for each image, wherein the line lies on a plane joining a center of the camera and an axis of the object. Then, geometric constraints are applied to lines to determine the pose of the object.

Abstract: A video output supervisor includes a test region indicator for verifying that the commanded output to specific areas of a display is valid. Areas reserved displaying safety-critical data in the data frame to be displayed can be supervised for the presence and status of display indicators of the safety-critical data. The confidence of the supervision can be increased by measuring other display and frame parameters in conjunction with supervising the indicators of the safety-critical data.

Abstract: An image processor includes a video input unit that counts the number of input pixel data and a command fetch/issue unit calculates, when a command including information concerning a relative position register in which a delay amount from input of pixel data until execution of a command is stored is fetched, a pixel position of processing target pixel data based on the delay amount and a count result and determines, based on the calculated pixel position, whether signal processing should be performed or specifies an operand used in arithmetic operation.

Abstract: An apparatus and method of automatically digitizing analog video and stroke and with size and positioning information. This is accomplished using signal characteristics of the deflection waveforms and video signals together with the video synchronization and blanking timing. This allows analog real time positioning and scaling by synchronizing the video data and deflection information. The deflection information in the form of signals either or both horizontal or X axis and vertical or Y axis characteristics such as amplitude, peak or peak to peak, and zero crossing, can be used to determine the size or scaling for each axis independently.

Abstract: A video signal processing apparatus is provided with a first clock generation circuit for generating a first clock synchronized with an input signal; a second clock generation circuit for receiving a set value to be a reference of an output frequency, adding the set value for every reference clock, extracting data according to the cumulative value, converting the data into an analog signal, reducing quantization noise, and multiplying the analog signal, thereby to obtain a second clock; and a clock switch circuit for generating a sync signal that is switched to the second clock, by using a sync signal generated with the first clock; and video signal processing is carried out using the second clock that is generated according to the resolution of a pixel display.

Abstract: A method of displaying an image with a display device including a plurality of display pixels includes receiving image data for the image, the image data including individual pixels of the image; buffering the image data and creating a frame of the image, the frame of the image including a plurality of columns and a plurality of rows of the pixels of the image; defining a first sub-frame and at least a second sub-frame for the frame of the image, image data of the second sub-frame being offset from image data of the first sub-frame by an offset distance of at least one pixel; and displaying the first sub-frame with a first plurality of the display pixels and displaying the second sub-frame with a second plurality of the display pixels offset from the first plurality of the display pixels by the offset distance.

Abstract: A singular point removing unit (12) removes a singular point as invisible high-frequency component noise from a degraded video signal and a reference video signal. A pixel value correcting unit (13) removes pixel-value bias added to the degraded video signal. The singular point removing unit (12) transforms the video signal into a spatial frequency, removes a high-frequency component, and restores the video signal by inverse transformation, or removes a singular point by using an averaging filter or a median filter. The pixel value correcting unit (13) obtains the correlation between the pixel values of the reference video signal and the corresponding pixel values of the degraded video signal, and corrects the pixel values of the reference video signal or the degraded video signal so as to match the pixel values of the degraded video signal with the pixel values of the reference video signal.

Abstract: In one embodiment, a method can include: receiving a synchronization signal in a digital media receiver coupled to a network and a video wall; receiving media content in the digital media receiver; receiving a configuration signal via the network in the digital media receiver; and displaying a designated portion of the media content on the video wall in response to the configuration signal and the synchronization signal.

Abstract: An apparatus and a method for overlaying parts of a displayed presentation of a video by using graphic content rendered by a receiving device such as a set top box or television to complete a displayed presentation of the video. The apparatus receiving frame synchronizing information from a content provider and then conveying the frame synchronizing information as a graphic overlay to the video. The frame synchronizing information comprises frame starting identifier data, frame ending identifier and positional information for describing frame locations and frame timing for overlaying the graphic content and positional information to indicate where to place the graphic content to be overlaid. The frame synchronizing information provides the information necessary to place graphic content, such as a graphic image or graphic animation, at specified positions that are synchronized to the displayed presentation. The same method also enables audio information to be synchronized.

Abstract: Disclosed is an apparatus for preventing image sticking of a video display appliance and method thereof that can effectively remove a black display region appearing on a border part of a display screen of the video display appliance when an image sticking function is performed. The apparatus includes a control unit for outputting a control signal for zooming an input video signal at a predetermined zooming rate and performing the image-sticking prevention function if an image-sticking prevention mode is set, and a video processing unit for zooming the video signal at the predetermined zooming rate and processing the zoomed video signal to display the zoomed video signal on a display screen according to the control signal from the control unit.

Abstract: A method of displaying an image may include receiving image data for the image, and defining first and second sub-frames of the image. The first and second sub-frames may have corresponding pluralities of image elements, with each image element of the second sub-frame spatially offset an offset distance from a corresponding image element of the first sub-frame. The first sub-frame may be displayed in a first position, and the second sub-frame may be displayed in a second position. Each displayed image element of the second sub-frame may be spatially offset substantially the offset distance from the corresponding displayed image element of the first sub-frame.

Abstract: A pixel clock frequency is adjusted in response to periodically monitoring the relative positions between a video signal to be displayed and a video signal captured. Image shear of the display signal may be avoided quickly. Adjustments are made to the color burst signal where dramatic changes in the pixel clock frequency result.

Abstract: A method and system are disclosed for vertically phase shifting fields of at least one interlaced frame of video into at least two vertically aligned frames of video. The at least two vertically aligned frames of video are compressed, transmitted or stored, decompressed, and phase shifted a second time to generate at least one interlaced frame of video.

Abstract: A method for centering and dimensioning an image on a cathode ray tube receiving display signals supplied by a display calculator includes measuring durations of vertical black edges of the image, and modifying adjustment values for a horizontal centering of the image to obtain equal lateral vertical edges. The method further includes measuring the durations of the vertical black edges of the image to calculate adjustment values for a horizontal dimension of the image to cause the vertical black edges to disappear. Durations of the horizontal black edges of the image are measured to calculate adjustment values of a vertical dimension of the image, and to calculate adjustment values of a vertical centering of the image to cause the horizontal black edges to disappear for centering the image vertically. The adjustment values obtained are recorded in a memory of the display calculator.

Abstract: The present invention provides a display controller for scaling an input source image. The display controller dynamically adjusts the output clock so line buffer requirement is reduced to a minimum to balance input and output image timing for image scaling or non-scaling to destination devices. The present invention supports up-scaling and down-scaling or bypass. The blocks of the line buffer operates in a continuous and cyclical manner according to the status signal generated by the line buffer status detector and the output clock. As a result, any buffer overrun or underrun condition will be immediately corrected by the timing and therefore the number of blocks of line buffer are greatly reduced.

Abstract: A false DE rejection system is described. DEs are ignored during a programmable vertical lockout period. Internal timing is used during the vertical lockout period to count the number of vertical lines to ignore. The first DE received after the vertical lockout period signifies the start of the next graphics frame. Default video is output during the vertical lockout period. The TCON is synchronized to the start of the graphics frame. A horizontal line length timer measures the timing for the horizontal line length. The horizontal line length timer may also keep a moving average of all of the lines that it has measured. This helps to ensure that the TCON does not get out-of-sync with the input stream during the vertical blanking periods. The DE rejection system includes automatic blanking detection that ignores DEs that occur after the end of a predetermined graphics frame. The vertical lockout does not occur until there has been no DE for an entire line.

Abstract: A mask circuit masks a digital video signal so that a video signal of an analog video signal is not outputted for a predetermined period after the start of output of a horizontal synchronizing signal of the analog video signal. A period of masking the digital video signal by the mask circuit is set in a control register, and the control register transmits the masking period to the mask circuit. A digital video signal to analog video signal converting unit converts the digital video signal masked and outputted from the mask circuit into an analog video signal. Thus, by setting in the control register the period of masking the digital video signal until the video signal of the analog video signal is stabilized, a digital video encoder can output a stable video signal.

Abstract: A method of displaying an image with a display device including a plurality of display pixels includes receiving image data for the image, the image data including individual pixels of the image; buffering the image data and creating a frame of the image, the frame of the image including a plurality of columns and a plurality of rows of the pixels of the image; defining a first sub-frame and at least a second sub-frame for the frame of the image, image data of the second sub-frame being offset from image data of the first sub-frame by an offset distance of at least one pixel; and displaying the first sub-frame with a first plurality of the display pixels and displaying the second sub-frame with a second plurality of the display pixels offset from the first plurality of the display pixels by the offset distance.

Abstract: A method and apparatus for automatically tuning the output line rate thereof and a display controller provided with the same. The display controller of the present invention provides a display controller having a line buffer, an input means, an output means, a status detector, and an auto-tune control means. The input means is employed to write line data into the line buffer at an input line rate, and the output means is employed to read the written line data from the line buffer at an output line rate. The status detector is coupled to the input means and the output means for generating a status signal indicating whether the input line rate and the output line rate are unbalanced. The auto-tune control means is used to adjust the output line rate in response to the status signal so as to balance the input line rate and the output line rate.

Abstract: A pixel clock frequency is adjusted in response to periodically monitoring the relative positions between a video signal to be displayed and a video signal captured. Image shear of the display signal may be avoided quickly. Adjustments are made to the color burst signal where dramatic changes in the pixel clock frequency result.

Abstract: A picture display apparatus for displaying a picture in response to inputted picture signals of an arbitrary format. The apparatus includes a picture display unit having an arranged matrix of dots for picture display, a picture display unit drive for converting inputted picture signals into display picture signals adapted for display on the picture display unit and generating drive timing signals for driving the picture display unit, the picture display unit driver including a picture memory for storing picture signals inputted into the picture memory, a display position detector for detecting a picture display position on the picture display unit based on the display picture signals and the drive timing signals, and a display position controller for controlling a timing of admission of the inputted picture signals to the picture memory of the picture display unit driver, based on the detected display position data from the display position detector.

Abstract: A display device includes a display screen, and horizontal and vertical display signals. The horizontal and vertical display signals are to render an image on the display screen. A first and second accelerometers are directly coupled to the display screen. First and second compensation circuits convert acceleration in horizontal and vertical directions respectively to x- and y-compensation signals. First and second adders combine the x- and y-compensation signals with the horizontal and vertical display signals to dynamically adjust a location of the image on the display screen while the display device is subject to movement.

Abstract: The present invention intends to provide a display position control apparatus which can prevent a position control signal to control a display position of an image from being unstable and can display the image with high image quality. A delay signal having a phase difference in a match state with reference to a vertical sync signal is generated. Whether a phase relation between the vertical sync signal and a horizontal sync signal is in a mismatch state is detected. When it is detected that the phase relation is in the mismatch state, a display position control signal is generated on the basis of the vertical sync signal and the delay signal. When it is not detected that the phase relation is in the mismatch state, the display position control signal is generated on the basis of the vertical sync signal and the horizontal sync signal.

Abstract: A method and a circuit arrangement for picture-in-picture insertion are described, in which, in order to prevent a write operation from being overtaken by a read operation and also to avoid the associated picture disturbances, a field is stored under an address which precedes a previous field by a number of N lines. A read address is then shifted to the same line of the older field in the event of a minimum distance to a write address being undershot.

Abstract: A method for picture-in-picture insertion is described, which is distinguished in particular by the fact that the inset pictures are written to a memory device (2) in a circulating manner under continuously incremented write addresses, the first and last address of each written-in inset picture is stored, an overtake signal is formed by comparing the instantaneous address with the previously stored address, said signal indicating whether a previous address has been reached again and, consequently, the corresponding picture content has been overwritten, by evaluation of the overtake signal, the current or preceding segment is selected for read-out depending on whether or not overtaking took place before the start of the read-out, and the inset picture stored in the selected segment is read out with continuously incremented read addresses and is inserted into the main picture. A corresponding circuit arrangement is also described.

Abstract: A picture frame generating circuit has: a coordinate value calculation processor that calculates frame start position (X, Y), picture end position (X, Y), frame end position (X, Y) using calculation start signal as activation signal, based on picture position (X, Y) registers, picture size (X, Y) registers and frame size register which are written through a data bus, the processor allowing frame color data to be written into frame color register to designate the color of frame through the data bus: and a selection circuit of frame and picture to which the frame start position (X, Y), picture end position (X, Y), frame end position (X, Y), picture position (X, Y) registers, frame color data, picture data, horizontal display position and vertical display position are input, the circuit selecting the picture data or frame color data and outputs the selected one as display data.

Abstract: A video display appliance capable of adjusting a sub-picture independent from a main picture using an on-screen display menu in PIP mode and a method thereof are disclosed.

Abstract: A horizontal automatic frequency control (AFC) used in a display having a display device such as a cathode ray tube (CRT) is provided. The AFC circuit reduces a horizontal distortion and horizontal jitter on the CRT. The AFC circuit includes a video signal processor for demodulating and converting an input video signal into a desired signal such as a YUV signal or an RGB signal, a synchronous separator for separating a synchronizing signal from the video signal, a dual-port line memory, an Hout generator for generating a horizontal driving pulse which drives a horizontal deflection yoke, a read clock generator for generating a read clock (RCK) signal which is synchronized in phase with a flyback pulse, and a horizontal deflection driver for controlling horizontal deflection of the CRT and generating the flyback pulse. The line memory absorbs a horizontal position change of a displayed image caused by a temperature change or a load change in the horizontal deflection driver.

Abstract: An apparatus for adjusting a horizontal position of a video display appliance in which a display image is put in the center of a monitor screen. The apparatus includes a comparative circuit, a horizontal correction circuit and a deflection circuit. The comparative circuit detects an overlap signal representing that a horizontal flyback pulse and a video signal are overlapped. The horizontal correction circuit calculates a mean value of first and second horizontal values and transmits the mean value to the deflection circuit. The deflection circuit adjusts the horizontal position using the mean value as an adjustment value to put the display image in the middle of the monitor screen.

Abstract: The steps of the process comprise:

Abstract: An image display is operable with video signals having a plurality of scanning frequencies and comprises a cathode ray tube for the display of ones of the video signals. A deflection coil is mounted on the cathode ray tube and a horizontal deflection amplifier is coupled to the deflection coil and generates a deflection current therein. A plurality of retrace capacitors are controllably coupled to the horizontal deflection amplifier in response to a selected scanning frequency to maintain a substantially constant active picture display area with the ones of the video signals having the plurality of scanning frequencies.

Abstract: A signal mixing circuit for mixing synchronizing signals and video signals without attenuating these signals, comprising a first semiconductor device for inputting and outputting synchronizing signals and a second semiconductor device for inputting and outputting video signals, wherein said first and second semiconductor devices operate as a buffer amplifier of input signals and said synchronizing signals and video signals are mixed after passing said first and second semiconductor devices respectively.

Abstract: The present invention provides a display controller for scaling an input source image. The display controller dynamically adjusts the output clock so line buffer requirement is reduced to a minimum to balance input and output image timing for image scaling or non-scaling to destination devices. The present invention supports up-scaling and down-scaling or bypass. The blocks of the line buffer operates in a continuous and cyclical manner according to the status signal generated by the line buffer status detector and the output clock. As a result, any buffer overrun or underrun condition will be immediately corrected by the timing and therefore the number of blocks of line buffer are greatly reduced.

Abstract: A method and system are disclosed for vertically phase shifting fields of at least one interlaced frame of video into at least two vertically aligned frames of video. The at least two vertically aligned frames of video are compressed, transmitted or stored, decompressed, and phase shifted a second time to generate at least one interlaced frame of video.

Abstract: A Circuit for conditioning sync signals for devices for the line-by-line Display of video signals includes, a first input for horizontal sync signals (H1sync, H2sync), a second input for vertical sync signals (Vsync), and a delay stage. The delay stage outputs a signal (Vshift) which is delayed relative to the vertical sync signal (Vsync) by a specific delay time (reg). The circuit determines the timing of the horizontal sync signals (H1sync, H2sync) relative to the vertical sync signal (Vsync) and/or relative to the delayed signal (Vshift). The delay stage is designed in such a way that the delay time (reg) is adjustable.