Including Dither Patents (Class 348/574)
  • Patent number: 10347319
    Abstract: Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The apparatus comprises: a voltage reference generator to generate a voltage reference; and a dynamic voltage reference control unit, coupled with the voltage reference generator, to dynamically adjust a level of the voltage reference in response to an event. The apparatus is used to perform the method comprising: generating a voltage reference for an input/output (I/O) system; determining a worst case voltage level of the voltage reference; dynamically adjusting, via a dynamic voltage reference control unit, the voltage reference level based on determining the worst case voltage level; and computing a center of an asymmetrical eye based on the dynamically adjusted voltage reference level.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Christopher P. Mozak, Kevin B. Moore, John V. Lovelace, Theodore Z. Schoenborn, Bryan L. Spry, Christopher E. Yunker
  • Patent number: 9584703
    Abstract: A method, apparatus, and computer program product storing pre-calculated quantization error data relating to a data quantization process. After receiving data to be quantized, quantizing the data to reduce the number of significant bits present therein. Finally, a quantization error is determined for the quantized data from the pre-calculated quantization error data.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: February 28, 2017
    Assignee: Nokia Technologies Oy
    Inventor: Anton Obzhirov
  • Patent number: 8860750
    Abstract: Devices and methods for dynamic dithering are provided. For example, an electronic device according to an embodiment may include image processing circuitry that operates on higher-bit-depth image data and a display panel that displays lower-bit-depth image data. To obtain the lower-bit-depth image data, the image processing circuitry may perform dynamic dithering on the higher-bit-depth image data. Such dynamic dithering may involve dithering frames of the higher-bit-depth image data based at least in part on respective rounding threshold values.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: October 14, 2014
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Michael Frank
  • Patent number: 8773455
    Abstract: A display controller may include an RGB Interface module and a display port module, which may both use a target-master interface, in which the data receiving module pops pixels from the data sourcing module, and generates the HSync, VSync, and VBI timing signals. A dither module may be instantiated between the RGB interface module and display port module to perform dithering. The dither module may use a source-master interface, in which data signals and data valid signals are issued by the data sourcing module. In order to avoid having to use a large storage capacity FIFO with the dither module, a control unit may issue interface signals to the RGB Interface module and display port module, and clock-gate the dither module, to allow the data signals and data valid signals to properly interface with the RBG interface module and display port module, and provide data flow from the RGB interface module to the dither module to the display port module.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: July 8, 2014
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Nitin Bhargava
  • Patent number: 8711173
    Abstract: A display pipe unit for processing pixels of video and/or image frames may be injected with dither-noise during processing of the pixels. A random noise generator implemented using Linear Feedback Shift Registers (LFSRs) produces pseudo-random numbers that are injected into the display pipe as dither-noise. Typically, such LFSRs shift freely during operation and the values of the LFSRs are used as needed. By shifting the LFSRs when the values are used to inject noise into newly received data, and not shifting the LFSRs when no new data is received, variations in the delays of receiving the data do not affect the pattern of noise applied to the frames. Therefore, dither-noise can be deterministically injected into the display pipe during testing/debug operation. By updating the LFSRs when new pixel data is available from the host interface instead of updating the LFSRs every cycle, the same dither-noise can be injected for the same received data.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: April 29, 2014
    Assignee: Apple Inc.
    Inventors: Joseph P. Bratt, Peter F. Holland
  • Patent number: 8502720
    Abstract: A digital to analog conversion apparatus includes a plurality of gain/phase adjusters configured to receive a digital signal and to output a plurality of adjusted digital input signals, a plurality of digital to analog converters coupled to respective ones of the plurality of gain/phase adjusters and configured to receive the adjusted digital input signals and to generate respective analog signals representative of the adjusted digital input signals, a plurality of phase shift elements coupled to respective ones of the plurality of digital to analog converters and configured to shift the phases of the analog signals generated by the digital to analog converters, and a combiner coupled to the outputs of the plurality of digital to analog converters and configured to combine the respective phase-shifted analog signals to form an analog output signal.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: August 6, 2013
    Assignee: Telefonaktiebolaget L M Ericsson
    Inventor: Mark Wyville
  • Patent number: 8451288
    Abstract: The present invention relates to an image signal processing apparatus capable of reproducing the appearance of an image that is displayed on a PDP. In an image processing unit 1, as a process for an image signal so that an image obtained when the image signal is displayed on a display apparatus of a display type other than that of a PDP can look like an image displayed on a PDP display apparatus, at least one of reproducing color shift caused by a moving image which is produced because lighting of RGB is turned on in this order, reproducing a dither pattern to be applied in a space direction, reproducing a dither pattern to be applied in a time direction, reproducing a space between pixel pitches, and reproducing a stripe array is performed. The present invention can be applied to a case where, for example, an image that can look like an image displayed on a PDP is to be displayed on an LCD.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: May 28, 2013
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Tomohiro Yasuoka
  • Patent number: 8310595
    Abstract: A method, and apparatus, and logic encoded in one or more computer-readable media to carry out a method. The method is to sample analog video at a sample clock rate and at a phase selected from a set of phases based on a quality measure determined from the sampled video. The quality measure is based on statistics of pixel to pixel differences in a coordinate of the generated digital video that have a magnitude exceeding a pre-determined threshold.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: November 13, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: Maurice J. Buttimer, Andrew P. Weir, Michael A. Arnao
  • Patent number: 8253756
    Abstract: A circuit dithers pixel data on a display, and includes a lookup table module, a dithering parameter decoder, a first adder, a second adder, and an overflow handling module. A lookup table of the lookup table module stores dithering parameters generated by encoding odd and even pixel dithering parameters. The dithering parameter decoder generates second and third dithering parameters corresponding to odd and even pixels from a first dithering parameter. The first adder generates a dithered odd pixel parameter according to the odd pixel parameter and the second dithering parameter. The second adder generates a dithered even pixel parameter according to the even pixel parameter and the third dithering parameter. The overflow handling module checks for overflow, and generates an output odd pixel parameter according to the dithered odd pixel parameter, and generates an output even pixel parameter according to the dithered even pixel parameter.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: August 28, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Yu-Ju Lee, Tzu-Chiang Shen
  • Patent number: 8243093
    Abstract: Aspects of the present invention relate to creation, modification and implementation of dither pattern structures applied to an image to diminish contouring artifacts. Some aspects relate to dither pattern structures with pixel values in a first color channel pattern that are spatially dispersed from pixel values in a corresponding pattern in a second color channel. Some aspects relate to application. Some aspects relate to systems and apparatus for creation and application of these dither pattern structures comprising pixel values dispersed across color channels.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: August 14, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Xiao-Fan Feng, Scott J. Daly
  • Patent number: 8189017
    Abstract: An apparatus and method for controlling picture quality of a flat panel display. The apparatus for controlling picture quality of the flat panel display includes a position determining unit which determines a display position of digital video data; a gray-level determining unit which determines a gray-level value of the digital video data; and a frame rate control unit that disperses a plurality of dither patterns determined by a compensation value for compensating for brightness in a boundary between the panel defect region and the non-defect region during a plurality of frame periods and controls data, which will be displayed in the boundary, by the compensation value, if the digital video data is determined to the data which will be displayed in the boundary between the panel defect region and the non-defect region according to the determined result of the position determining unit.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: May 29, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: In Jae Chung, Ji Kyoung Kim, Jong Hee Hwang
  • Patent number: 8179401
    Abstract: Methods, systems, and apparatus, including computer program products, for reducing artifacts in a color sequential display system. A frame of a digital image is displayed by receiving frame data, determining dither patterns, applying the dither patterns to the data, and displaying the dithered data. Each pixel of a frame of a digital image is displayed by receiving pixel data, grouping the pixel data for the color channels of the image into a plurality of sub-groups of pixel data; and displaying the pixel according to a sequence that separates each pair of sub-groups for a color channel by a sub-group for another color channel. Modified pixel data can be generated by replacing parent bits in the pixel data with corresponding pluralities of divided child bits, where all the child bits for a given parent bit have a divided weight that adds up to the parent bit's weight.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: May 15, 2012
    Assignee: Spatial Photonics, Inc.
    Inventor: Takatoshi Ishii
  • Patent number: 7973801
    Abstract: A method for processing video data for display on a display device having a plurality of luminous elements comprising: applying a dithering function based on single ones of said luminous elements to at least part of said video data to refine the grey scale portrayal of video pictures of said video data, computing at least one motion vector from said video data, and changing at least one of the phase, amplitude, spatial resolution and temporal resolution of said dithering function in accordance with said at least one motion vector when applying the dithering function to said video data.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: July 5, 2011
    Assignee: Thomson Licensing
    Inventors: Sébastien Weitbruch, Cédric Thebault, Didier Doyen
  • Publication number: 20110141365
    Abstract: A method for displaying a video which is dithered using related masks and a video display apparatus applying the same, the video display apparatus dithering a video signal using a first mask, performing color-processing with respect to the video signal, and dithering the color-processed video signal using a second mask which is related to the first mask. Accordingly, dithering is performed using related masks, thus preventing poor gradation of video signal.
    Type: Application
    Filed: July 14, 2010
    Publication date: June 16, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-yong PARK, Sang-kyun IM, Nam-kyun BEON
  • Patent number: 7940281
    Abstract: A dithering method includes: utilizing a plurality of large dithering masks to perform dithering on a first set of Least Significant Bits (LSBs) of M-bit video data, utilizing a plurality of small dithering masks to perform dithering on a second set of LSBs of the M-bit video data, and adjusting the content of at least one of the plurality of large dithering masks and/or the content of at least one of the plurality of small dithering masks on a frame-by-frame basis. Each of the plurality of large dithering masks includes a plurality of sub-dithering masks. Each of the plurality of sub-dithering masks includes a plurality of dithering thresholds. Each of the plurality of small dithering masks includes a plurality of dithering thresholds.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 10, 2011
    Assignee: MStar Semiconductor, Inc.
    Inventors: Shih-Chung Wang, Yun-Hung Shen
  • Patent number: 7903123
    Abstract: A programmable system for dithering video data. The system is operable in at least two user-selectable modes which can include a small kernel mode and a large kernel mode. In some embodiments, the system is operable in at least one mode in which it applies two or more kernels (each from a different kernel sequence) to each block of video words. Each kernel sequence repeats after a programmable number of the blocks (e.g., a programmable number of frames containing the blocks) have been dithered. The period of repetition is preferably programmable independently for each kernel sequence. The system preferably includes a frame counter for each kernel sequence. Each counter generates an interrupt when the number of frames of data dithered by kernels of the sequence has reached a predetermined value. In response to the interrupt, software can change the kernel sequence being applied. Typically, the system performs both truncation and dithering on words of video data.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: March 8, 2011
    Assignee: NVIDIA Corporation
    Inventors: Jonah M. Alben, Stephen Lew
  • Patent number: 7710440
    Abstract: A video signal is processed using dither coefficients. Dither coefficients pattern signals are generated. Each pattern signal carries positive and negative dither coefficients arranged in an (n×m) matrix where “n” and “m” being positive integers larger than zero, the sum total of the coefficients being zero. One of the pattern signal is selected for each predetermined unit of picture carried by the video signal. Or, it is selected according to locations of dither coefficients on pixels arranged on a display panel. Dither coefficients of the selected pattern signal are added to an input video signal, thus outputting a video signal to be supplied to the display panel. Instead of the dither coefficients pattern signals, dither pattern signals can be generated, each carrying positional data indicating locations of dither coefficients on the pixels on the display panel.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: May 4, 2010
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Shigehiro Masuji, Hideki Aiba
  • Patent number: 7483039
    Abstract: A programmable system for dithering video data. The system is operable in at least two user-selectable modes which can include a small kernel mode and a large kernel mode. In some embodiments, the system is operable in at least one mode in which it applies two or more kernels (each from a different kernel sequence) to each block of video words. Each kernel sequence repeats after a programmable number of the blocks (e.g., a programmable number of frames containing the blocks) have been dithered. The period of repetition is preferably programmable independently for each kernel sequence. The system preferably includes a frame counter for each kernel sequence. Each counter generates an interrupt when the number of frames of data dithered by kernels of the sequence has reached a predetermined value. In response to the interrupt, software can change the kernel sequence being applied. Typically, the system performs both truncation and dithering on words of video data.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: January 27, 2009
    Assignee: NVIDIA Corporation
    Inventors: Jonah M. Alben, Stephen Lew
  • Patent number: 7453469
    Abstract: Embodiments of the invention provide an image display mode for displays, such as a television, that do not use the entire display field for displaying an image. A user selectable modification of the image display is provided, where the image may be stepped a predefined column of pixels, or predefined row of pixels, depending on viewing format, at a time at a very slow rate. The image may be stepped a predefined column of pixels per predefined time period until it is entirely to one side of the display, at which point it may be slowly stepped back to the other side of the display.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: November 18, 2008
    Assignee: Intel Corporation
    Inventors: Paul E. Stevenson, Richard A. Klinger
  • Patent number: 7161634
    Abstract: An error diffusion system in accordance with an embodiment of the present invention adjusts the color depth of an RGB signal using error diffusion without the using an expensive frame buffer. Specifically, a color depth adjustment unit in accordance with the present invention can perform error diffusion on an RGB signal using two error buffers, which are smaller in memory size than typical line buffers that would be used for the video stream.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: January 9, 2007
    Assignee: Huaya Microelectronics, Ltd.
    Inventor: Wai Khaun Long
  • Patent number: 7038702
    Abstract: A frame memory 105 stores the original image data received from a higher-level device 102 via an interface 103. Color reduction processing means receives color reduction rate data through a transfer from an upper-level device 102 or manual setting means such as a switch or jumper settings. Based on this color reduction rate data, the number of colors in the gradation data of the original image is reduced, and the color count of the original image is simulated using the reduced color count. Also included are a timing generating circuit 106 and a gradation voltage generating circuit 107. A gradation voltage selector 108 performs a partial halting of driver operations based on the color reduction rate.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: May 2, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Yasuyuki Kudo, Akihito Akai, Kazuo Okado, Toshimitsu Matsudo, Atsuhiro Higa
  • Patent number: 6950048
    Abstract: A dither system for a quantizing device, such as a multi-stage pipelined analog-to-digital converter (ADC), derives a dither signal from a clock signal having a sample frequency, the dither signal having a frequency that is one-third of the sample frequency. The dither signal is easily converted to analog and added at the input of the quantizing device to an analog signal to be digitized. A cancellation signal circuit generates a cosine-wave signal from a digital version of the dither signal and programmable coefficients that are a function of amplitude and phase. The cosine-wave signal is combined with the digital output signal from the quantizing device to produce a corrected digital output signal having reduced quantization distortion.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: September 27, 2005
    Assignee: Tektronix, Inc.
    Inventor: Keith R. Slavin
  • Patent number: 6724437
    Abstract: In a display driving method, noise is added (NG, AD) to a video signal before the video signal is subjected to a dithering operation (DC). The invention is preferably applied to render non-moving dither patterns invisible in a plasma display panel driving method in which the display signal is subjected to a (Floyd-Steinberg) dithering.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: April 20, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric P. Funke, Jeroen H. C. J. Stessen, Age J. Van Dalfsen
  • Patent number: 6490005
    Abstract: An analog-to-digital converter (ADC) (112) for sampling high speed video signals includes Pre-amplifiers (502, 504, 506) electrically coupled to Post-amplifiers (508, 510, 512) that are electrically coupled to output latches (514, 517, 519, 521, 523, 525, and 527). A sampling clock signal (116) clocks the output latches (514, 517, 519, 521, 523, 525, and 527) to sample an input analog electronic signal to provide a digital representation thereof. The ADC (112) includes an auto-zeroing function to cancel bias voltages at the Post-amplifiers (508, 510, 512) during a video signal horizontal blanking time period. The ADC (112) includes a bit dithering function by alternating sets of reference voltages into the Pre-amplifiers (502, 504, 506) increasing bit resolution. The ADC (112) includes wired interconnect interpolation between the Pre-amplifiers (502, 504, 506) and Post-amplifiers (508, 510, 512) and between the Post-amplifiers (508, 510, 512) and the output latches (514, 517, 519, 521, 523, 525, and 527).
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics, Inc.
    Inventors: Günter W. Steinbach, James Chow, Kenny Wen, Khin Lay
  • Patent number: 6473525
    Abstract: A method for detecting an image edge within a dithered image. A pixel within a support region is selected for processing. The differences between pixel values in the region and the selected pixel are computed to form a current difference map. Whether the selected pixel in the region differ by no more than one resolution level from any other pixel of the region is determined from the current difference map. An edge is determined not to exist within the region if the difference map for a region contains no values differing by more than one resolution level. An edge is determined to exist within a region if the difference map for the selected pixel and region contain values differing by more than one resolution level. Alternatively, a difference map for the selected region of support is determined and compared to a table of all possible valid difference maps. If a corresponding difference map is found within the table then an edge does not exist within the presently processed region of support.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: October 29, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Shiufun Cheung, Robert A. Ulichney, Robert MacNamara, Giridharan Iyengar
  • Patent number: 6397276
    Abstract: The present invention provides for the compression of digital and analog data for storage and transmission. Analog data in the form of an analog signal is converted into a digital signal by an analog-to-digital converter. The digital signal is then converted into an analog signal having an alternating frequency by a first converter processor and an alternating frequency generator according to a predetermined conversion table. To reproduce the original analog signal, the analog signal having an alternating frequency is first converted back into a digital signal by an alternating frequency measurement means connected to a second converter processor, also in accordance with the predetermined conversion table. The digital signal is then converted to the original analog signal by a digital-to-analog converter.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: May 28, 2002
    Inventor: Eugene Rzyski
  • Patent number: 6147671
    Abstract: A set different dither matrices is employed in a repetitive manner to accomplish elimination of contouring while at the same time not adding typical "dither graininess" to a digital video image. The matrices are specially chosen to result in a time-averaged zero dithering bias when applied frame-by-frame in a long sequence of frames.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: November 14, 2000
    Assignee: Intel Corporation
    Inventor: Rohit Agarwal
  • Patent number: 6040876
    Abstract: A method and system for reducing the effects of false contouring and reducing color shading artifacts. An image signal 102 is dithered by the addition of a small noise signal from a noise generator 500. The added noise signal breaks up the edges of homogenous blocks of pixels, causing the created image to appear to have a smooth transition from one region to the next. The image dithering is especially useful in digital color image displays where processing performed on the chrominance portion of the image signal often causes quantization errors which lead to sharp transitions between similar shades when the input image included a smooth transition.
    Type: Grant
    Filed: October 11, 1996
    Date of Patent: March 21, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Gregory S. Pettitt, Vishal Markandey
  • Patent number: 5982446
    Abstract: In a single-chip multistandard video modulator arrangement in which audio signals for transmission with video signals are first modulated onto a subcarrier and then combined with the video signals for modulation onto a VHF or UHF main carrier, the modulated subcarrier signals are passed through a high-pass filter before being combined with the video signals in order to reduce the amplitude of any audio frequency components, and the resulting variations in main carrier amplitude, which tend to produce "sound in vision" effects.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: November 9, 1999
    Assignee: Mitel Semiconductor
    Inventor: Stuart J Millard
  • Patent number: 5940138
    Abstract: The present invention provides distortion compensating of an analog signal which is quantized by an A/D converter. A dither device processes a clock signal from a clock signal generator to provide an output signal with a known dither pattern. The output signal with the dither pattern has a plurality of different frequencies that are periodically repeated. In addition, the same frequency of respective cycles of the dither pattern has different phases. The dither signal is superimposed on the analog signal, thus, distortion of the analog signal is compensated or reduced subsequent to A/D conversion. In particular, this dithered analog signal may be converted into a digital signal in response to the clock signal which is used to generate the dither so that the digital signal approximates to the analog signal much more closely than if the equivalent digital signal were obtained by conventional analog to digital conversion.
    Type: Grant
    Filed: October 14, 1992
    Date of Patent: August 17, 1999
    Assignee: J. Carl Cooper
    Inventor: Virgil Lowe
  • Patent number: 5835158
    Abstract: The present invention provides distortion compensating of an analog signal. A dither device processes a clock signal from a clock signal generator to provide an output signal with a dither pattern. The output signal with the dither pattern has a plurality of different frequencies that are periodically repeated. In addition, the same frequency of respective cycles of the dither pattern has different phases. The dither signal is further superimposed on the analog signal. Thus, distortion of the composite analog signal is compensated. In particular, this dither analog signal may be converted into a digital signal in response to the clock signal so that the digital signal approximates to the analog signal much more than the digital signal obtained by conventional analog to digital converting.
    Type: Grant
    Filed: August 4, 1992
    Date of Patent: November 10, 1998
    Assignee: J. Carl Cooper
    Inventor: Virgil Lowe
  • Patent number: 5652624
    Abstract: Recording of the stream of very coarse samples with which a preferred multiphase dither-quantizer sends compressed television permits multiple playback modes for reconstructing an archival TV picture with different tradeoffs between contrast resolution and blurring due to image motion. A real-time receiver can be arranged to change mode automatically pel-by-pel, thereby adapting locally to rates of change in the picture detail. For better resolution of contrast in combination with spatial resolution, both transmitter and receiver can be modified so that only a stipple component is averaged to recover decimated gray levels and a major fraction of the gray scale is refreshed every frame.
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: July 29, 1997
    Inventor: Bernard Lippel
  • Patent number: 5561714
    Abstract: An improved scrambler for serial digital video that is compatible with SMPTE Standard 259M inserts a detector/dithering circuit between the input serial digital signal and a scrambler. The scrambler's statistics are observed by a pair of up/down counters. One counter monitors the scrambled data prior to NRZI encoding to determine transition density, and the other monitors the NRZI encoder output to determine the relative density of "ones" and "zeros" in the scrambled output signal. A pseudorandom generator generates a dither signal which is combined with the least significant bit of selected video words of the input serial digital signal when enabled by the terminal count output from either counter. A complementary descrambler has a similar detector/dithering circuit at its output to restore the original least significant bit of the selected video words. The improved scrambler/descrambler may be implemented in either the serial or the parallel domain.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: October 1, 1996
    Assignee: Tektronix, Inc.
    Inventor: David L. Hershberger
  • Patent number: 5525984
    Abstract: When processing video television information the low frequency band is inherently of primary interest due to the natural averaging properties of the human eye, combined with the limited frequency response of video display elements such as phosphorus and liquid crystal displays. Noise is generated and observed in the low frequency region of digitized analog video signals due to nonlinearities inherent in the digitization process. This invention reduces the noise measured in the low frequency region by shifting the noise upband and out of the frequencies of interest by adding a dither signal to the analog input signal and employing a 2X decimation digital filter to remove the unwanted dither and spurious intermodulation signals. The disclosed invention allows for a simple and inexpensive means for removal of the dither signal without having to resort to complex dither subtraction techniques employed in the prior art.
    Type: Grant
    Filed: August 6, 1993
    Date of Patent: June 11, 1996
    Assignee: ADC Telecommunications, Inc.
    Inventor: Norman S. Bunker
  • Patent number: 5495346
    Abstract: An element generator for a dither matrix comprises a logic device which receives a row address and a column address and performs a logic operation thereon so as to produce a dither element corresponding to the row address and the column address, which is implemented at low cost and has an advantage in that the processing speed is increased. The dithering apparatus comprises a dither-matrix element generator, a comparator, an adder and a selector. The comparator compares the output of the dither-matrix element generator with lower-bit data of the original image data. The adder adds a predetermined number to upper-bit data of the original image data. The selector selects one between the upper-bit data and the adder output, in accordance with the output of the comparator, so as to produce the selected one as the dithered image data. Dithering is thereby performed via hardware, which leads to an increased processing speed.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: February 27, 1996
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-kyun Choi, Kil-su Eo, Dae-hyun Jin
  • Patent number: 5404176
    Abstract: The present invention relates to a method of enhancing a digital color video image comprised of separating a source pixel into individual component parts, for each component part, generating a random number having the same length as the corresponding component part, adding each random number to its corresponding component part to form resultant component parts, and combining the resultant component parts to form a destination pixel.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: April 4, 1995
    Assignee: ATI Technologies Inc.
    Inventor: Sanford S. Lum
  • Patent number: 5351084
    Abstract: A system and method for increasing the color or luminance gray scale levels from, for example 16 to 32, without increasing the transmission bit rate to produce sharper images with less band width requirement. An error level or pedestal is added to the analog signal of each pixel or every other video unit, such as a line. After decompression, the digital signals of one unit are added to those of the adjacent unit--pixel by corresponding pixel--to yield double the gray scale levels but for a signal twice the proper value. The signal value is then divided by two, yielding a signal of the proper value but at twice the number of possible gray scale levels. In 4-bit video, the result is to convey 5-bit video with the use of two adjacent transmitted 4-bit words and to generate the 5-bit word in the post processor after decompression.
    Type: Grant
    Filed: July 2, 1992
    Date of Patent: September 27, 1994
    Assignee: Global Telecommunications Industries, Inc.
    Inventor: Bruce A. Blair