A/d Converters Patents (Class 348/572)
  • Patent number: 9905158
    Abstract: A display device and a power control device capable of preventing the degradation of image quality that may occur unexpectedly by performing the sub-pixel luminance deviation compensation. The display device can include an analog-to-digital converter, a timing controller, a power generator, and a power controller, among other components. The power control device can include a power generator and a power controller, among other components.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: February 27, 2018
    Assignee: LG Display Co., Ltd.
    Inventor: MyungJin Pyeon
  • Patent number: 9491538
    Abstract: An adaptive gain control system and related operating method for digital audio samples is provided. The method is suitable for use with a digital media encoding system that transmits encoded media streams to a remotely-located presentation device such as a media player. The method begins by initializing the processing of a media stream. Then, the method adjusts the gain of a first set of digital audio samples in the media stream using a fast gain adaptation scheme, resulting in a first group of gain-adjusted digital audio samples having normalized volume during presentation. The method continues by adjusting the gain of a second set of digital audio samples in the media stream using a steady state gain adaptation scheme that is different than the fast gain adaptation scheme, resulting in a second group of gain-adjusted digital audio samples having normalized volume during presentation.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: November 8, 2016
    Assignee: Sling Media PVT Ltd.
    Inventor: Venkata Kishore Nandury
  • Patent number: 9380381
    Abstract: A microphone package comprises a microphone. The microphone package also comprises a first analog-to-digital converter coupled to the microphone to provide a first digital signal. The microphone package further comprises a second analog-to-digital converter coupled to the microphone to provide a second digital signal. Furthermore, the microphone package comprises a circuit coupled to the first analog-to-digital converter and the second analog-to-digital converter to provide the microphone signal.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: June 28, 2016
    Assignee: Infineon Technologies AG
    Inventors: Dietmar Straeussnigg, Andreas Wiesbauer, Elmar Bach
  • Patent number: 9270502
    Abstract: Embodiments provide a digital RF receiver including a signal converting unit which converts an RF signal received from an external device into a digital signal, a plurality of functional modules which processes the digital signal in accordance with a predetermined algorithm when the digital signal is input, and a signal processing controller which selects at least one of the plurality of functional modules to control the digital signal to be processed in consideration of whether an IF signal component is included in the digital signal or a sampling rate related with sampling information of the digital signal.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: February 23, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ik Soo Eo, Sang Kyun Kim, Seon Ho Han
  • Patent number: 9247195
    Abstract: A method for converting video information from an incoming format to an outgoing format using a process free from one or more intermediary files. The method includes receiving video information in a first format and receiving a desired output media format based upon a first input and a desired TV standard based upon a second input. The method decodes the video information in the first format to raw video information in an uncompressed format and directly resizes the raw video information in the uncompressed format into a size associated with the desired output media format and the desired TV standard. The method adjusts the uncompressed format in the size associated with the desired output media format and the desired TV standard to a frame rate associated with the desired TV standard and encodes the uncompressed format in the size and the frame rate into an elementary video stream.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: January 26, 2016
    Assignee: VisualOn, Inc.
    Inventor: Qiang Huang
  • Patent number: 9209892
    Abstract: An automatic gain correction circuit for radiofrequency signals applies notably to the regulation of the amplification of signals for satellite radionavigation. The automatic gain correction circuit is able to receive an input radiofrequency signal and to deliver an output radiofrequency signal of which a mean amplitude is slaved to a setpoint. It comprises means for modifying the setpoint as a function of the mean amplitude of the input signal between a minimum setpoint value and a maximum setpoint value, the minimum setpoint value corresponding to a first mean amplitude of the input signal and the maximum setpoint value corresponding to a second mean amplitude of the input signal, the first mean amplitude being lower than the second mean amplitude.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: December 8, 2015
    Assignee: Thales
    Inventors: Jean-Michel Perre, David Depraz, Frédéric Berthoz
  • Patent number: 9203344
    Abstract: A method of operating a pixel clock generator (PCG), the method including generating N clock signals according to a control voltage signal, the N clock signals having different phases and N being a natural number; generating M frequency-divided clock signals based on the N clock signals, the M frequency-divided clock signals having different phases and M being a natural number greater than N; and generating a pixel clock signal based on at least two selected ones of the M frequency-divided clock signals.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: December 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Jin Kim, Tae lk Kim, Se Hyung Jeon
  • Publication number: 20150062435
    Abstract: A video signal processing device may include a signal converter configured to generate a video output signal based on a video input signal and a reference signal, a reference signal generator configured to generate the reference signal. The reference signal may be adjusted to accommodate changes in the video input signal.
    Type: Application
    Filed: April 14, 2014
    Publication date: March 5, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Kiho Lee
  • Patent number: 8902365
    Abstract: Various embodiments are described herein for a universal television receiver that is capable of processing television channel signals broadcast according to a variety of analog and digital broadcast standards. In particular, various embodiments are provided for avoiding interferers in a desired television channel signal and these embodiments generally include changing sampling rate, shifting certain oscillation frequencies or changing sampling rate and shifting certain oscillation frequencies.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: December 2, 2014
    Inventors: Lance Greggain, Vyacheslav Shyshkin, Chris Ouslis, Steve Selby
  • Patent number: 8896757
    Abstract: There is provided a delta-sigma A/D converter including a first integrator, a second integrator located on an output side of the first integrator, a quantizer located on an output side of the second integrator, and a first current D/A converter receiving an output of the quantizer and providing a negative feedback signal to an input side of the quantizer.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventor: Tomohiro Matsumoto
  • Patent number: 8878998
    Abstract: A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component cat be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: November 4, 2014
    Assignee: Broadcom Corporation
    Inventors: Anthony Chan, Chun Wang, Edward G. Callway
  • Patent number: 8854551
    Abstract: A video signal processing apparatus may include a first analog-to-digital converter (ADC) configured to convert an analog video signal into a first digital video signal according to a first clock; and/or a second ADC configured to convert the analog video signal into a second digital video signal according to a second clock that is different from the first clock. The first and second clocks may have a first phase difference in a first section of the analog video signal, such that the first and second ADCs operate alternately, first ADC then second ADC, and the first and second clocks may be generated to have a second phase difference, that is different from the first phase difference, in a second section of the analog video signal that is different from the first section, such that the first and second ADCs operate alternately, second ADC then first ADC.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: October 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ki-Ho Lee
  • Patent number: 8842221
    Abstract: A signal adjusting circuit and a video apparatus thereof are provided. The signal adjusting circuit includes a delay unit, a minimum value acquisition device, and a first operating unit. The delay unit receives a digital signal and delays the digital signal for N periods to serve as a delay signal. The minimum value acquisition device receives the digital signal and acquires a minimum value of the digital signal in every N periods. The first operating unit is coupled to the delay unit and the minimum value acquisition device for operating the delay signal with the minimum value to obtain an adjusting signal.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: September 23, 2014
    Assignee: Novatek Microelectronics Corp.
    Inventor: Hsin-I Lin
  • Patent number: 8830405
    Abstract: A DC/DC converter 10 has a high-side transistor QH as a switching element and a low-side transistor QL as a synchronous rectifier element. A first primary electrode D and secondary primary electrode S of the high-side transistor QH are connected to an input voltage VIN and an external terminal T1, respectively. A detection transistor QD is provided in a row with the high-side transistor QH, and the ON voltage of the high-side transistor QH when ON is output as detection voltage VQD from the detection transistor QD. The output detection voltage VQD is added to a feedback voltage VFB1 by an adder CB, and inputted to a comparator CMP1. The ON period of a one-shot pulse PS1 outputted from the comparator CMP1 is regulated so as to be in direct proportion to the sum of the detection voltage VQD and the feedback voltage VFB1.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: September 9, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhiro Murakami
  • Patent number: 8817195
    Abstract: An embodiment of the present invention provides a method for digital television demodulation, comprising using adjacent-channel power dependent automatic gain control (AGC) for the digital television demodulation, wherein an AGC technique takes into account a total power as well as power of adjacent channels to control gain of a gain control amplifier.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: August 26, 2014
    Assignee: Intel Corporation
    Inventors: Parveen K. Shukla, Bernard Arambepola, Thushara Hewavithana, Sahan Gamage
  • Patent number: 8773592
    Abstract: A display apparatus is configured to control a clock generator so that a phase of a clock can maximize an integrated evaluation value that is an integrated value of a differential absolute value between adjacent pixels in an image display unit over one frame of a plurality of digital video signals corresponding to a plurality of clocks having different phases generated by the clock generator when a value made by dividing a maximum value of the integrated evaluation value by a minimum value of the integrated evaluation value is larger than a threshold, and to control the clock generator so that the phase of the clock can correspond to an intermediate position in a phase range in which the position becomes constant relative to the phase of the clock when the value made by dividing the maximum value by the minimum value is equal to or smaller than the threshold.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: July 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masahiro Funada
  • Patent number: 8759737
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel outputting a photoelectrically converted signal, an ADC circuit disposed in an edge portion of a pixel area to convert an analog signal of the pixel into a digital signal on the basis of a result of comparison between a signal level output from the pixel and a ramp wave which is a reference, and a multi-ramp-wave generating circuit generating a plurality of ramp waves with different amplitudes and combining the plurality of ramp waves to obtain the ramp wave.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8736762
    Abstract: The present disclosure relates to a method and an apparatus for communication between a mobile phone and a TV set. The method comprises the following steps of: generating standard RGB signals by an LCD controller in a central processing unit (CPU) of the mobile phone; transmitting the RGB signals to an LCD of the mobile phone and a TV-OUT chip simultaneously; enabling the TV-OUT chip to receive and recognize the RGB signals through configuration of commands; carrying out video conversion on the RGB signals by the TV-OUT chip to output standard AV signals; and transmitting the AV signals to a display of the TV set via a dock. With this disclosure, information on the LCD screen of the mobile phone can be transmitted to the display of the TV set.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: May 27, 2014
    Assignee: Huizhou TCL Mobile Communication Co., Ltd.
    Inventors: Jun Luo, Xianglai Li, Shuqiang Huang
  • Patent number: 8730402
    Abstract: Provided is an analog front end of a digital TV, a digital TV system having the same, and a method of operating the same. The analog front end includes: a first selection circuit which selectively outputs differential sound intermediate frequency signals or differential TV broadcast signals in response to a first selection signal; a second selection circuit which outputs a clock signal among a plurality of clock signals having a different sampling frequencies, in response to a second selection signal; and an analog-to-digital converter which converts output signals output from the first selection circuit to a digital code, according to a sampling frequency of a clock signal output from the second selection circuit.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: May 20, 2014
    Assignee: Samsung Electronics Co., ltd.
    Inventors: Sang Ho Kim, Ho Jin Park, Hyung Woan Koo, Ki Ho Lee
  • Patent number: 8730404
    Abstract: In an embodiment, the present invention includes a latch circuit having a first input to receive a data signal and a second input to receive a clock signal. This latch circuit may have a first pair of transistors including a first transistor gated by the data signal and a second transistor gated by an inverted data signal and a second pair of transistors including third and fourth transistors gated by the clock signal. The first transistor may be coupled to the third transistor at a first inter-latch node and the second transistor coupled to the fourth transistor at a second inter-latch node. A reset circuit may be coupled to the latch circuit to maintain the first and second inter-latch nodes at a predetermined voltage level when the clock signal is inactive.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: May 20, 2014
    Assignee: Silicon Laboratories Inc.
    Inventors: Clayton Daigle, Abdulkerim L. Coban
  • Patent number: 8670077
    Abstract: A method of performing a service scan for available channels across a bandwidth of an input signal, the method comprising the steps of: acquiring a power spectrum of the input signal bandwidth; analyzing the power spectrum to identify a list of candidate channels, each candidate channel being identified by at least a center frequency; processing each of the candidate channels in a receiver unit to extract service information, if present, relating to the candidate channel; and storing the service information for the channel in a memory.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: March 11, 2014
    Assignee: NXP B.V.
    Inventors: Ewout Brandsma, Klaas de Waal, Konstantinos Doris, Erwin Janssen
  • Publication number: 20140055676
    Abstract: There is provided a delta-sigma A/D converter including a first integrator, a second integrator located on an output side of the first integrator, a quantizer located on an output side of the second integrator, and a first current D/A converter receiving an output of the quantizer and providing a negative feedback signal to an input side of the quantizer.
    Type: Application
    Filed: August 7, 2013
    Publication date: February 27, 2014
    Applicant: SONY CORPORATION
    Inventor: Tomohiro Matsumoto
  • Patent number: 8638249
    Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: January 28, 2014
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 8605222
    Abstract: A receiver device is provided singly capable of applying demodulator circuits with differing frequency characteristics with respective signals of desired frequencies for the demodulator circuits. The receiver device in accordance with the present invention switches between a mode in which a digital signal having a frequency suitable for various signal processes is supplied to a DA converter and a mode in which a digital signal for which the IF frequency is about 30 MHz to 60 MHz is supplied to the DA converter, by using a switch and a wire.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: December 10, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Mitsunaka, Pascal Lore
  • Patent number: 8606051
    Abstract: Circuits, methods, and apparatus are described that provide calibration of column-parallel analog-to-digital converters (ADCs) in image processing contexts only once per frame (or less frequently) to reduce column-wise noise. For example, the column ADCs are calibrated during an inter-frame time interval, like a vertical blanking interval. In some embodiments, calibration data for the column ADCs for a calibration period is stored at the digital block for use in processing row data from the column ADCs. In other embodiments, calibration data for the column ADCs for the calibration period is stored at column ADCs in a local memory for local correction of the pixel data prior to being read out to the digital block for processing. In certain embodiments, techniques, such as differential ADC architectures, are used to mitigate row-wise noise in context of the frame-wise calibration.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: December 10, 2013
    Assignee: SK hynix Inc.
    Inventors: Yibing Michelle Wang, Jeffrey Joseph Rysinski, Sang-Soo Lee
  • Patent number: 8586461
    Abstract: Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: November 19, 2013
    Assignee: CSR Technology Inc.
    Inventor: Jan-Michael Stevenson
  • Patent number: 8582035
    Abstract: An embodiment of the present invention provides a method for digital television demodulation, comprising using adjacent-channel power dependent automatic gain control (AGC) for the digital television demodulation, wherein an AGC technique takes into account a total power as well as power of adjacent channels to control gain of a gain control amplifier.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: November 12, 2013
    Assignee: Intel Corporation
    Inventors: Parveen K Shukla, Bernard Arambepola, Thushara Hewavithana, Sahan S Gamage
  • Patent number: 8572668
    Abstract: A digital broadcasting signal processing method for processing a multimedia stream by a set-top box is disclosed. A USB request command set is pre-defined in a digital signal receiving unit to support the set-top box. The digital signal receiving unit transmits data with the set-top box and controls the signal quality of the data transmission according to the USB request commands transmitted by the set-top box while the digital signal receiving unit connected with the set-top box via USB.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: October 29, 2013
    Assignee: Skymedi Corporation
    Inventors: Chin-Cheng Kao, Ching-Yao Yang, Chih-Ming Lin
  • Patent number: 8570446
    Abstract: Various embodiments are described herein for a universal television receiver that is capable of processing television channel signals broadcast according to a variety of analog and digital broadcast standards. Analog processing includes using coarse filtering with pass bands that are wide enough to accommodate frequency shifts in a desired television channel signal and analog circuitry variability and digital processing includes tracking a carrier frequency of the desired television channel signal to generate and apply a frequency shift feedback signal to compensate for frequency shifts in the carrier frequency.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: October 29, 2013
    Inventors: Chris Ouslis, Steve Selby, Lance Greggain, Vyacheslav Shyshkin, Larry Silver
  • Publication number: 20130222697
    Abstract: A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component cat be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.
    Type: Application
    Filed: March 25, 2013
    Publication date: August 29, 2013
    Applicant: Broadcom Corporation
    Inventor: Broadcom Corporation
  • Patent number: 8508665
    Abstract: An image processing apparatus and control method are provided. The image preprocess apparatus includes an image receiver which receives an analog broadcasting signal; an image processor which converts the analog broadcasting signal into a digital broadcasting signal; and a filtering unit which selectively performs a low pass filtering on the analog broadcasting signal to filter a frequency higher than a preset frequency and transmits the selectively-filtered analog broadcasting signal to the image processor corresponding to a reception of the analog broadcasting signal by air.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: August 13, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-Jin Lee
  • Patent number: 8502919
    Abstract: Provided is a video display device that quickly determines, when a video signal of unknown resolution is input from the outside, the resolution of the video signal to correctly display a video.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: August 6, 2013
    Assignee: NEC Display Solutions, Ltd.
    Inventor: Tatsuo Kimura
  • Patent number: 8502920
    Abstract: Various embodiments are described herein for a universal television receiver that is capable of processing television channel signals, that are transmitted according to a variety of broadcast standards, to provide video and audio information for a desired television channel signal. The processing includes producing a coarse channel signal that includes a desired television channel signal and then applying resampling techniques to adjust a normalized bandwidth of the desired television channel signal to generally correspond to the normalized passband of a main filter that is used for each of the broadcast standards.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: August 6, 2013
    Inventors: Vyacheslav Shyshkin, Larry Silver, Warren Synnott, Steve Selby, Chris Ouslis, Lance Greggain
  • Patent number: 8488062
    Abstract: An apparatus includes a voltage controlled oscillator for outputting a clock signal having an oscillation frequency in accordance with an input voltage; a convertor for converting the analog video signal inputted from the exterior into the digital video signal synchronizing with the clock signal outputted from the voltage controlled oscillator; a phase difference detector for detecting a phase difference between the composite synchronizing signal in the analog video signal and a feedback signal which corresponds to the clock signal from the voltage-controlled oscillator; and a voltage control unit for controlling the input voltage of the voltage controlled oscillator to change in response to the phase difference detected by the phase difference detector when the phase difference is within the certain range, and to maintain the input voltage intact when the phase difference is in exceed of the certain range.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: July 16, 2013
    Assignee: Fujitsu Limited
    Inventors: Koji Nakamuta, Yoshito Koyama
  • Patent number: 8477245
    Abstract: A television adapter includes first and second conversion circuits, a switch unit, and a high-definition multimedia interface (HDMI). The first conversion circuit includes a digital to analog (D/A) converter and a coupler. The second conversion circuit includes an analog to digital (A/D) converter and a decoupler. When the switch unit connects the first conversion circuit to the first HDMI, the D/A converter converts a first digital signal from the HDMI into a first analog form data. The coupler couples the first analog form data to a first alternating current (AC) voltage. When the switch unit connects the second conversion circuit to a second HDMI, the decoupler decouples and separates a second AC voltage into a second analog form data. The A/D converter converts the second analog form data into a second digital signal, and outputs the second digital signal to the second HDMI.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: July 2, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chih-Huang Wu, Szu-Lun Huang
  • Publication number: 20130162909
    Abstract: A television adapter includes first and second conversion circuits, a switch unit, and a high definition television (HDTV) interface. The first conversion circuit includes a digital to analog (D/A) converter and a coupler. The second conversion circuit includes an analog to digital (A/D) converter and a decoupler. When the switch unit connects the first conversion circuit to the HDTV interface, the D/A converter converts a first digital signal from the HDTV interface into a first analog form data. The coupler couples the first analog form data to a first alternating current (AC) voltage. When the switch unit connects the second conversion circuit to the HDTV interface, the decoupler decouples and separates a second AC voltage into a second analog form data. The A/D converter converts the second analog form data into a second digital signal, and outputs the second digital signal to the HDTV interface.
    Type: Application
    Filed: April 10, 2012
    Publication date: June 27, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: SZU-LUN HUANG, CHIH-HUANG WU
  • Publication number: 20130162910
    Abstract: A television adapter includes first and second conversion circuits, a switch unit, and a high-definition multimedia interface (HDMI). The first conversion circuit includes a digital to analog (D/A) converter and a coupler. The second conversion circuit includes an analog to digital (A/D) converter and a decoupler. When the switch unit connects the first conversion circuit to the first HDMI, the D/A converter converts a first digital signal from the HDMI into a first analog form data. The coupler couples the first analog form data to a first alternating current (AC) voltage. When the switch unit connects the second conversion circuit to a second HDMI, the decoupler decouples and separates a second AC voltage into a second analog form data. The A/D converter converts the second analog form data into a second digital signal, and outputs the second digital signal to the second HDMI.
    Type: Application
    Filed: April 10, 2012
    Publication date: June 27, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIH-HUANG WU, SZU-LUN HUANG
  • Patent number: 8451361
    Abstract: An image pickup device is provided, capable of complete correction with data of once analog-to-digital conversion, and prevention of excess use of switches and analog devices and/or erroneous correction, including: an image sensor having a plurality of analog-to-digital converters determining conversion results from a digital signal of higher order bit through separate steps of two or more times; a first correction unit which has a correction factor for correcting nonlinear errors of the plurality of analog-to-digital converters so as to adapt to the analog-to-digital converters and corrects a nonlinear error of a digital signal output from respective analog-to-digital converters based on a correction factor corresponding to respective analog-to-digital converters, characterized in that the first correction unit corrects the nonlinear errors after converting the digital signals from the plurality of analog-to-digital converters into a serial output.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: May 28, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yuichiro Yamashita
  • Patent number: 8446531
    Abstract: A system and method for detecting a sampling clock offset of an analog-to-digital converter used to digitize an analog image signal. A method comprises buffering samples of an analog image signal, computing a value of an autocorrelation function using the buffered samples and a delayed version of the buffered samples, and repeating the computing a value for delays in a range of delays. The method also comprises computing a sampling frequency offset from the values of the autocorrelation function and changing a sampling frequency using the sampling frequency offset.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: May 21, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Bing Ouyang, John Michael Hayden, Troy Lane Ethridge, Hong Jin Cho, Jeff Kordel
  • Patent number: 8446530
    Abstract: A sampling system adapts the sampling rate for sampling analog signals and/or the stored number of samples to the fixed or video image content, such that a higher rate, and equivalently a larger number of samples, are acquired for an image or video segment containing higher spatial frequencies while a lower number of samples (lower sampling rate) are retained for image or video segments containing lower spatial frequencies. The Nyquist theorem may still be satisfied for each individual image segment, while information necessary for edge enhancement is retained.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: May 21, 2013
    Assignee: Entropic Communications, Inc.
    Inventor: Erwin B. Bellers
  • Patent number: 8411202
    Abstract: In an automatic gain control circuit comprising a black level detecting unit which detects a black level from a video signal, a white level detecting unit which detects a white level from the video signal, and an analog-to-digital converter which adjusts a dynamic range of the video signal based on a difference value between the black level and the white level, a video signal for adjustment including a black level which indicates a minimum brightness of a video image and a white level which indicates a maximum brightness of the video image is input and the dynamic range is adjusted.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: April 2, 2013
    Assignees: Sanyo Semiconductor Co., Ltd., Semiconductor Components Industries, LLC.
    Inventors: Hirotoshi Mori, Hiroyuki Ebinuma
  • Patent number: 8405781
    Abstract: An analog television (TV) receiver converts a received analog TV signal to a digital TV signal and performs digital demodulation to increase demodulation efficiency. The analog TV receiver includes a radio frequency (RF) turner and an intermediate frequency (IF) circuit. The RF tuner converts the received analog RF TV signal to an analog IF TV signal. The IF circuit includes a converting circuit and a digital demodulator. The converting circuit converts the analog IF TV signal to a digital TV signal. The digital demodulator demodulates the digital TV signal to generate a digital demodulated video signal and a digital demodulated audio signal.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: March 26, 2013
    Assignee: Mstar Semiconductor, Inc.
    Inventor: Fucheng Wang
  • Patent number: 8405779
    Abstract: A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component can be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: March 26, 2013
    Assignee: Broadcom Corporation
    Inventors: Anthony Chan, Chun Wang, Ed Callway
  • Patent number: 8358360
    Abstract: A solid-state image sensor includes a pixel array unit including a plurality of pixels arranged in the form of an array, column signal lines adapted to transmit pixel signals output from pixels in respective columns, a noise adding unit adapted to add temporally constant and two-dimensional spatially random noise to the pixel signals transmitted via the column signal lines, and an analog-to-digital converter adapted to convert a signal level and a reference level of each pixel signal including the noise added thereto by the noise adding unit.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: January 22, 2013
    Assignee: Sony Corporation
    Inventor: Ken Koseki
  • Publication number: 20130016285
    Abstract: Described herein are light emitting element driver integrated circuits (ICs), methods for use with light emitting element driver ICs, and projector systems that include a light emitting element driver IC. A light emitting element driver IC receives a color data word from the video processor IC. Starting with the color data word received from the video processor IC, the light emitting element driver IC performs a gamma expansion function to thereby produce a gamma expanded digital or analog signal. Additionally, the light emitting element driver IC outputs, in dependence on the generated gamma expanded digital or analog signal, a gamma expanded analog drive signal for driving the light emitting element.
    Type: Application
    Filed: August 11, 2011
    Publication date: January 17, 2013
    Applicant: INTERSIL AMERICAS INC.
    Inventor: Michel Combes
  • Patent number: 8330676
    Abstract: This invention provides a plasma tube array-type display device and a luminance correcting method realizing reduced variations in luminance values of a plasma tube array. A gradient of the luminance value in the longitudinal direction of one plasma tube is calculated on the basis of the obtained luminance value at a plurality of positions in the longitudinal direction of at least one plasma tube. A difference of the luminance value of each plasma tube obtained at the same relative position. On the basis of the gradient of the luminance value and the difference of the luminance value of each plasma tube at the same relative position, a correction luminance value in each discharge cell in the longitudinal direction of each of the plurality of plasma tubes is calculated.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: December 11, 2012
    Assignee: Shinoda Plasma Co., Ltd.
    Inventors: Koji Shinohe, Koji Kishimoto, Tetsuya Makino, Hitoshi Hirakawa, Kenji Awamoto
  • Publication number: 20120293713
    Abstract: An image processing apparatus and control method are provided. The image preprocess apparatus includes an image receiver which receives an analog broadcasting signal; an image processor which converts the analog broadcasting signal into a digital broadcasting signal; and a filtering unit which selectively performs a low pass filtering on the analog broadcasting signal to filter a frequency higher than a preset frequency and transmits the selectively-filtered analog broadcasting signal to the image processor corresponding to a reception of the analog broadcasting signal by air.
    Type: Application
    Filed: November 15, 2011
    Publication date: November 22, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Young-Jin LEE
  • Patent number: 8310595
    Abstract: A method, and apparatus, and logic encoded in one or more computer-readable media to carry out a method. The method is to sample analog video at a sample clock rate and at a phase selected from a set of phases based on a quality measure determined from the sampled video. The quality measure is based on statistics of pixel to pixel differences in a coordinate of the generated digital video that have a magnitude exceeding a pre-determined threshold.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: November 13, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: Maurice J. Buttimer, Andrew P. Weir, Michael A. Arnao
  • Patent number: 8305498
    Abstract: An apparatus and method for equalizing analog TV signals includes an antenna that receives the signal data, wherein the signal data comprises a luminance carrier comprising a luminance channel and a chrominance carrier comprising a chrominance channel; an analog-to-digital converter coupled to receiving antenna that converts the received signal data to digital signal data; an instruction memory storing digital equalizer instructions; and a digital equalizer system, coupled to the memory and the analog-to-digital converter, wherein the digital equalizer system processes the digital equalizer instructions to estimate a noise variation of the luminance channel; equalize the luminance channel; and equalize the chrominance channel, wherein the equalization of the chrominance channel is separate and distinct from the equalization of the luminance channel.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: November 6, 2012
    Assignee: Newport Media, Inc.
    Inventors: Ahmed Ragab Elsherif, Mohamed Abd El-Salam Ali, Nabil Yousef Wasily
  • Patent number: 8294729
    Abstract: Methods of performing stroke-to-raster video conversion having leading-edge error correction and/or falling-edge error correction are provided. Incoming data is pipelined before being written into a frame buffer. This allows each sample of data to be manipulated based on information obtained in samples that occur both before and after it. Highly accurate digital conversion of stroke video into a raster format having significantly reduced or eliminated noise and stray pixels from the video is therefore achieved.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: October 23, 2012
    Assignee: Scram Technologies, Inc.
    Inventors: Brian Rodgers, Michael Covitt