Scanning Circuit Patents (Class 348/792)
  • Patent number: 7180556
    Abstract: An optical image system includes an image projector and an image generator. The image projector has regions with adjustable brightness levels. The image generator generates an image received from a remote location on the image projector by directing first and second electromagnetic beams onto the regions of the image projector. The first beam changes the brightness levels of the regions in a direction, and the second beam generates the image by changing the brightness levels of predetermined ones of the regions in an opposite direction. Such an image system can capture, transmit, and display an image using an optical signal without converting the optical signal into an electrical signal and back again. Thus, the image system often provides a higher-quality image than conventional electro/optical image systems.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: February 20, 2007
    Assignee: Microvision, Inc.
    Inventors: Clarence T. Tegreene, John R. Lewis
  • Patent number: 7079122
    Abstract: A scan-driving circuit for making a high image quality and a low power consumption compatible. This scan-driving circuit comprises: a shift register including first to Nth flip-flops corresponding to first to Nth scan lines, respectively, and connected in series; a level conversion section including first to Nth level shifter circuits for shifting the voltage levels of the individual output nodes of the first to Nth flip-flops individually; and a scan line drive section including first to Nth drive circuits for driving the first to Nth scan lines sequentially in a manner to correspond to the potentials of the output nodes of the first to Nth level shifter circuits. The first to Nth scan lines are divided into a plurality of blocks, for which the scan lines are individually arranged. The first to Nth drive circuits scan and drive the scan lines in the designated block at a time of a partial display in which the display and drive are done on a block basis.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: July 18, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Akira Morita
  • Patent number: 6806854
    Abstract: An active matrix display comprises an active matrix 1 and a digital data driver 30 formed on a common substrate 100 by a common integration process. The driver 30 comprises a serial to parallel converter 20 having m registers forming at least one set for storing display data for m picture elements, where m is less than the number M of data lines of the matrix 1. The outputs of the registers are connected to m digital/analogue converters 21 whose outputs are connected to m bus lines 50 of an m phase analogue driver 22 in the form of a switching network. The switching network connects in turn groups of m physically adjacent data lines of the matrix 1 to the m bus line, respectively.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: October 19, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Graham Andrew Cairns, Michael James Brownlow
  • Publication number: 20040141092
    Abstract: First and second line memories alternately store input video signals for every scanning line. The video signals stored in the line memories are read by a predetermined number of times in accordance with a signal system of the input video signals. A calculator calculates average values among the video signals read from the line memories. A selector circuit sequentially selects the video signals read from the first and second line memories when the input video signals are based on an interlace system, and sequentially selects the video signals read from the first and second line memories and the averaged video signals when the input video signals are based on a progressive scan system. The selected signals are supplied to a liquid crystal display apparatus.
    Type: Application
    Filed: November 21, 2003
    Publication date: July 22, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shigeki Kamimura
  • Publication number: 20040141094
    Abstract: An EPG extraction portion extracts EPG information; a program type decision portion decides the type of broadcast program using the extracted EPG information, and outputs a ratio modification signal to change the ratio of the image display interval to the black display interval according to the program type; a driving pulse generation portion generates a gate driver control signal which changes the write timing of a frequency-doubled image signal and frequency-doubled black display signal in one field interval, according to the ratio modification signal; and, a gate driver changes the write timing of the frequency-doubled image signal and frequency-doubled black display signal according to the gate driver control signal, to change the ratio of the image display interval to the black display interval.
    Type: Application
    Filed: October 9, 2003
    Publication date: July 22, 2004
    Inventors: Yasuhiro Kumamoto, Taro Funamoto
  • Patent number: 6597336
    Abstract: Writing of a second field is started at a time point when writing of a first field has been completed, while information written in the first field is held. Writing of a first field of the next frame is started at a time point when the writing of the second field has been completed, while information written in the second field is held. This driving method can attain high vertical resolution.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: July 22, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Satoshi Teramoto, Jun Koyama, Shunpei Yamazaki
  • Patent number: 6542143
    Abstract: It is an object to provide a high-performance display element driving device or the like which can be easily reduced in power consumption and scale. A display element driving device (100) drives a liquid crystal serving as a capacitive display element. A D/A converter (110) includes first to Nth charge storage sections (112-1) to (112-N) for receiving first to Nth digital data corresponding an image signal and storing charges corresponding to the values of the first to Nth digital data, and first to Nth connection sections (114-1) to (114-N) for electrically connecting the first to Nth charge storing sections (112-1) to (112-N) and an electrode line (130) to each other and discharging the stored charges to the electrode line (130) at a given timing. In this manner, &ggr;-correction of a liquid crystal and D/A conversion can be simultaneously performed, and conversion from RGB to YUV and D/A conversion can be simultaneously performed.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: April 1, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Tokuroh Ozawa
  • Patent number: 6469687
    Abstract: In driver circuitry for driving an electro-optic display device having a row and column matrix array of pixels, including means for converting incoming digital display information signals into analog signals, sampling errors due to switch and column resistance and transmission delays are compensated by converting the digital samples for alternate columns (or rows) to analog signals having sampling errors of equal magnitude but opposite sign.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: October 22, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Peter Janssen
  • Patent number: 6456337
    Abstract: In a moving image correcting circuit for a display unit wherein a motion vector detecting portion detects inter-frame motion vectors and a moving image correcting position corrects the display positions of subfields for pixels in blocks, based on the detection values, the picture quality is protected from being degraded by preventing the output of an erroneous motion vector due to noise in, or fluctuation of, the input image signal or else preventing the erroneous motion vector, even if output from the motion vector detecting portion, from entering the moving image correcting portion.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: September 24, 2002
    Assignee: Fujitsu General Limited
    Inventors: Masayuki Kobayashi, Masamichi Nakajima, Hayato Denda
  • Publication number: 20020126218
    Abstract: A method for multiplying the frame rate of an input video signal having a line rate fHin and a frame rate fVin, comprising the steps of: propagating the input video signal through just enough memory to delay the input video signal by a fraction of a frame period 1/fVin; speeding up the delayed video signal to a first line rate faster than fHin; speeding up the input video signal to a second line rate faster than fHin; supplying the speeded up video signal and the delayed speeded up video signal sequentially, one line at a time; and, writing the sequentially supplied lines into a liquid crystal display at the faster line rate, thereby writing at least some of the lines multiple times within each the frame period. A corresponding apparatus can comprise: a partial frame memory; two speedup memories; a multiplexer; and, a source of clock and control signals.
    Type: Application
    Filed: March 12, 2001
    Publication date: September 12, 2002
    Inventor: Donald Henry Willis
  • Patent number: 6396468
    Abstract: A liquid crystal display device includes a liquid crystal between a substrate having gate buslines, source buslines, switching elements, pixel electrode array, gate driver, source driver, etc., and a substrate having a counter electrode, etc. In this liquid crystal display device, the gate driver performs simultaneous two-line scanning by applying a scanning signal to two gate buslines simultaneously. The source driver feeds video signals of opposite polarities to adjacent source buslines, respectively. The video signals are inverted every vertical scanning period.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: May 28, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Matsushima, Sunao Etoh
  • Patent number: 6380989
    Abstract: A display system and a method for supplying a display system with a picture signal are described, in which the picture signal is fed in dependence on a system clock pulse of the display system, whereby an improvement in the picture quality is achieved. A particularly good picture quality is achieved if a change of the picture signal for one picture pixel to the picture signal for the following picture pixel is chosen to be temporally shifted relative to the sampling instant at which the display system samples the picture signal.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: April 30, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventors: Robert Förster, Reiner Kirchner, Martin Michel
  • Patent number: 6310651
    Abstract: A data processing system that allows satisfactory display even when the driving condition changes. The data processing system includes a display device, a video data memory which stores video data in which one frame consists of a plurality of fields, and a display data memory which stores display data to be displayed on the display device. A setting unit sets the driving condition for the display device, and thins the video data in units of fields.
    Type: Grant
    Filed: March 7, 1996
    Date of Patent: October 30, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventor: Atsushi Mizutome
  • Patent number: 6300982
    Abstract: A flat panel display apparatus including an on screen display (OSD) driver designed to operate in accordance with a system clock used in the flat panel display apparatus, thereby enabling the flat panel display apparatus to stably display an OSD picture. The apparatus includes a microcomputer for outputting OSD data detected from an input signal requiring an OSD operation along with OSD information stored therein, when the OSD operation is carried out, thereby controlling the OSD operation. The OSD driver receives the detected OSD data from the microcomputer and generates an OSD video signal corresponding to the received OSD data in sync with an OSD synchronizing signal applied thereto.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: October 9, 2001
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Hyung-Il Koh
  • Patent number: 6128045
    Abstract: A liquid crystal display device is composed of a liquid crystal panel including a plurality of pixels and a plurality of data signal lines, and a panel control unit CNT for controlling the liquid crystal panel so that a selected one of a high vision signal image and an NTSC signal image can be displayed. The control unit includes an auxiliary video signal generating circuit for generating an auxiliary video signal representing an auxiliary image to be displayed in first and second remainder areas provided on both sides of a display area for displaying an NTSC signal image on the screen of the liquid crystal panel. The control unit further includes a circuit for driving the data signal lines according to results obtained by sampling the auxiliary video signal in a horizontal blanking period of an NTSC video signal and the NTSC video signal in a period excluding the horizontal blanking period from one horizontal scanning period of the NTSC video signal.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: October 3, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kimio Anai
  • Patent number: 6118500
    Abstract: A formatter and frame buffer unit (20) for a display system (10) that uses a spatial light modulator (16) to display data formatted in bit-planes. Formatters (21) convert multi-bit pixel data to bit-plane data. The frame buffer memory (25) is comprised of conventional DRAM devices. To allow the use of DRAMs, formatters (21) operate on a number of consecutive pixels, the number of pixels being sufficient for an extended page mode form of addressing the DRAMs.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: September 12, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Adam J. Kunzman
  • Patent number: 6115084
    Abstract: A projection-type video display in which the entire input video signal is first digitally corrected through digital gamma correction. Then, a subset of the corrected video signal is corrected again through analogue correction techniques. In particular this portion of the digitally corrected video signal corresponds to the subject where slopes of applied voltage-transmissivity characteristic curve (V-T curve) of liquid crystal changes relatively rapidly. The result is a more accurate gamma correction which is also less expensive than conventional, purely digital gamma correction systems.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: September 5, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Kiyoshi Miyashita, Satoshi Hirashima, Keijiro Naito, Mamoru Kobayashi
  • Patent number: 6046711
    Abstract: An image display device for arbitrarily switching a display area includes a drive signal supply device for supplying drive signals for pixels arranged in a matrix-like fashion, in response to the generation of predetermined signals, in signal lines of rows and columns corresponding to the pixels, and sequential signal output devices for sequentially outputting the predetermined signals from a signal line of a predetermined start row or column to the signal lines of rows or columns at least with respect to either the rows or columns. The sequential signal output devices are equipped with a switching device for switching the start row or column.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: April 4, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tetsunobu Kouchi
  • Patent number: 6020938
    Abstract: A matrix-type display device is a liquid crystal device having 240 vertical lines on a display screen, and is provided with a driving circuit which writes a signal simultaneously into two vertical lines in one in every three scanning lines of an EDTV2 signal, in which a number of scanning lines is 180 per field, when an image based on the EDTV2 signal is displayed on the display screen. As a result, a circuit having a complicated configuration is not required, and an image based on the EDTV2 signal can be displayed on the whole display screen of a liquid crystal module having 240 vertical lines without a non-image portion.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: February 1, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara
  • Patent number: 5986630
    Abstract: Writing of a second field is started at a time point when writing of a first field has been completed, while information written in the first field is held. Writing of a first field of the next frame is started at a time point when the writing of the second field has been completed, while information written in the second field is held. This driving method can attain high vertical resolution.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: November 16, 1999
    Assignee: Semiconductor Energy Laboratory Co.
    Inventors: Yoshiharu Hirakata, Satoshi Teramoto, Jun Koyama, Shunpei Yamazaki
  • Patent number: 5978052
    Abstract: A display device for displaying an image represented by an incoming raster scan video signal comprises a PALC display panel having a rectangular array of addressable panel elements. A frame buffer stores a frame of video and a comparator compares the incoming video signal with the frame stored in the frame buffer on a line-by-line basis. In the event that a line of the incoming video signal is different from the corresponding line of the stored frame, the line of the incoming video signal is supplied to the display panel and is used to update the corresponding line of the frame buffer. Otherwise, the line of the incoming video signal is not supplied to the display panel.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: November 2, 1999
    Assignee: Tektronix, Inc.
    Inventors: Kevin J. Ilcisin, Thomas S. Buzak, Paul C. Martin
  • Patent number: 5956082
    Abstract: A video signal processing apparatus is arranged to input a video signal in which one frame is composed of a plurality of fields and scanning lines are interlaced among the plurality of fields, selectively take a mode for sequentially outputting video signals of a plurality of fields of a frame and a mode for consecutively outputting a video signal of one of the plurality of fields by a plurality of times, and output the video signal thus processed to a display device having displayable scanning lines the number of which is smaller than the number of scanning lines per field of the input video signal. With the above-described arrangement, even if a video signal in which scanning lines are interlaced is supplied to a display device having a comparatively small number of displayable scanning lines, it is possible to obtain a display image free from a vertical image shake.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: September 21, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yasuyuki Yamazaki
  • Patent number: 5929925
    Abstract: A matrix type display device capable of receiving more than one video signal, which displays an image based on a first video signal with a smaller aspect ratio than an aspect ratio of a screen in width by inputting a second video signal in sync with a first video signal to at least a part of column drivers corresponding to a remaining portion on the screen where the image based on the first video signal is not displayed, so that the processing of the first and second video signals is started at the same time and carried out at the same timing. Consequently, the present matrix type display device can readily display a natural image based on an input video signal with a smaller aspect ratio than the that of the screen.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: July 27, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara
  • Patent number: 5898414
    Abstract: A display apparatus permitting high resolution and a large number of gray-scale levels and causing indiscernible flicker has been disclosed. One frame is divided into or composed of j subframes, and light is produced according to a luminance level predetermined subframe by subframe in order to express intermediate gray-scale of a picture. Emphasis is put on the fact that display to be performed during each subframe within one frame can be controlled independently. An interlaced-scanning display is carried out during k subframes associated with low-order weighted bits out of j subframes, and a noninterlaced-scanning display is carried out during the other j-k subframes associated with high-order weighted bits. The ratio of an addressing scan time to a subframe associated with a small weight is large, and the ratio of an addressing scan time to a whole frame is very large. If the addressing scan time can be reduced as mentioned above, a great effect would be exerted.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: April 27, 1999
    Assignee: Fujitsu Limited
    Inventors: Kenji Awamoto, Naoki Matsui, Tadatsugu Hirose, Fumitaka Asami
  • Patent number: 5880707
    Abstract: Disclosed are a display control apparatus and method for controlling the display of a matrix display panel. An image displayed on an FLC panel, for example, is partitioned into a plurality of bands each composed of a plurality of lines of image data, non-interlaced scanning is performed within one band obtained by partitioning, interlaced scanning is performed in band units, and the scanning direction of a first band and the scanning direction of a second band neighboring the first band are made the opposite of each other. As a result, it is possible to prevent a decline in image quality after half-tone processing as well as the occurrence of flicker caused by crosstalk peculiar to matrix displays.
    Type: Grant
    Filed: October 19, 1995
    Date of Patent: March 9, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shuntaro Aratani
  • Patent number: 5863458
    Abstract: A liquid crystal apparatus includes a liquid crystal panel and drive means for driving the liquid crystal panel. The liquid crystal panel includes a pair of oppositely disposed substrates each having an electrode thereon, an alignment film disposed over the electrode on at least one of the substrates, and a liquid crystal disposed between the substrates; the liquid crystal being composed of a plurality of liquid crystal layers each composed of a plurality of liquid crystal molecules. The drive means is suitable for applying to the liquid crystal an electric field insufficient to cause a switching of the liquid crystal but sufficient to cause a reversible change of the liquid crystal layers into a bookshelf structure. As a result, the liquid crystal panel can be provided with a good switching characteristic while effectively suppressing deleterious liquid crystal molecular movement.
    Type: Grant
    Filed: November 21, 1996
    Date of Patent: January 26, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirokatsu Miyata, Hiroyuki Kitayama, Hirohide Munakata, Shinjiro Okada, Katsuhiko Shinjo, Tomoko Maruyama
  • Patent number: 5854662
    Abstract: A driver is provided for driving a plane fluorescent panel as a backlight source in a small liquid crystal television receiver. The panel is driven with a pulse signal controlled such that a first edge of the pulse signal which is a rise or fall edge of the pulse signal is within a front porch of a horizontal blanking period of a video signal and that a second edge of the pulse signal which is a fall or rise edge of the pulse signal is within the width of a horizontal synchronous pulse to thereby drive the fluorescent panel efficiently to provide a stabilized light emission and render it difficult for noise in the fluorescent panel to enter the display of the television receiver. A small liquid crystal television receiver with a plane fluorescent panel driven so is also provided.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: December 29, 1998
    Assignee: Casio Computer Co., Ltd.
    Inventors: Masami Yuyama, Noriyasu Murata, Yoshimata Yasui
  • Patent number: 5844538
    Abstract: An image display apparatus can be arranged so that a picture element capacity obtains a value provides display data retention of less than 99% by writing same data to a picture element a plurality of times during 1 frame period. This makes it possible to disuse the auxiliary capacity and to improve an aperture ratio. Moreover, with the present invention, an MOS transistor arranged in each picture element as a switching element for driving the picture element, a scan signal line driving circuit and a data signal line driving circuit for transmitting a driving signal based upon display data to the MOS transistor through a data signal line and a scan signal line, and a first frame memory and a second frame memory provided outside the picture element for storing display data to be outputted to a data signal line driving circuit for 1 frame are formed on one substrate. As a result, it is possible to improve package efficiency and lower cost by using a driver monolithic technique.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: December 1, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ichiro Shiraki, Manabu Matsuura, Yasushi Kubota, Hiroshi Yoneda, Yoshitaka Yamamoto
  • Patent number: 5818413
    Abstract: A display apparatus comprises arrayed pixels, a vertical-scanning circuit, and a horizontal-scanning circuit. The vertical-scanning circuit outputs selection pulses one after another to sequentially scan pixels in one vertical-scanning period in units of lines. The horizontal-scanning circuit sends and writes a video signal into the pixel line selected by the sequential scanning in one horizontal-scanning period. The vertical-scanning circuit is provided with a switching section to control the consecutive outputs of the selection pulses and to adjust the number of pixel lines to be selected in one horizontal period according to the specification of the video signal used. This configuration enables both noninterlaced drive and interlaced drive.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: October 6, 1998
    Assignee: Sony Corporation
    Inventors: Yuji Hayashi, Hiroaki Ichikawa, Masayuki Iida, Hiroyoshi Tsubota
  • Patent number: 5784073
    Abstract: The method of fine gradation display by an electro-optical device with little influence by difference in elemental devices, is disclosed, which is an object of the present invention. In case of an active matrix electro-optical device, a visual gradation display can be carried out by digitizing an analog image signal externally supplied by means of binary notation, by temporarily storing the digital signal thus obtained, by outputting the digital signal to a circuit of next step in a proper order, and by controlling the output timing of the signal so as to output the signal to the active matrix electro-optical device, and whereby digitally controlling the time for applying voltage to a picture element.
    Type: Grant
    Filed: February 13, 1995
    Date of Patent: July 21, 1998
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
  • Patent number: 5767830
    Abstract: An active matrix display device comprises a plurality of pixels, a vertical scanning circuit, a horizontal scanning circuit, and a thinning-out circuit. The plurality of pixels are arranged in a matrix on a normal standard screen. The vertical scanning circuit is for sequentially selecting pixels every line. The horizontal scanning circuit is for writing single horizontal period portions of a wide standard image signal for selected lines of pixels. The thinning-out circuit is for controlling timing of the vertical scanning circuit sequential selection and thinning-out a prescribed number of horizontal period portions from a wide standard image signal in such a manner that wide displaying compressed in the longitudinal direction of the screen is carried out. It is therefore possible for a normal standard screen to change over to displaying a wide standard image.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: June 16, 1998
    Assignee: Sony Corporation
    Inventor: Akio Kawamura
  • Patent number: 5739804
    Abstract: A liquid crystal display device having pixel selection switching elements in a one-to-one correspondence with pixels includes an interlace processing circuit for performing n (n is an odd number of 3 or larger): m (m is an arbitrary number equal to or smaller than n) interlace processing for a one-frame image signal, an n-fold rate converting device for performing n-fold rate conversion for the interlaced image signal, an image display for displaying an image by driving the pixel selection switching elements in accordance with the image signal subjected to the n-fold rate conversion, and a non-picture period processing means for disconnecting the n-fold rate converting device from the image display and performing desired processing for the image display during a non-picture period longer than a vertical blanking period.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: April 14, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okumura, Go Ito
  • Patent number: 5686936
    Abstract: To restrict a potential oscillation in a video line caused by a high speed sampling rate, the active matrix display device is comprised of gate lines X in row, signal lines Y in column and liquid crystal pixels LC of matrix arranged at each of the crossing points of both lines. The V driver 1 scans in line sequence each of the gate lines X and selects the liquid crystal pixels LC in one line for every one horizontal period. The H driver 2 performs in sequence samplings of the video signal VSIG within one horizontal scanning period to each of the signal lines Y and performs a writing of the video signal VSIG by dot sequential scanning to the liquid crystal pixels LC in one selected line. The precharging means 4 supplies in sequence the predetermined precharging signal VPS prior to the sequential sampling of the video signal VSIG for each of the signal lines Y.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: November 11, 1997
    Assignee: Sony Corporation
    Inventors: Toshikazu Maekawa, Katsuhide Uchino
  • Patent number: 5663765
    Abstract: Interlaced image signals are converted into non-interlaced image signals and the scanning lines are also thinned out (i.e., the number of lines is reduced). Line memories L1-L5 are provided in a number (5) Corresponding to the number of horizontal scanning lines thinned out by a predetermined number of lines every number of lines determined from the total number of horizontal scanning lines of the PAL signal and that of the NTSC signal. A demultiplexer 12 selects the memories L1-L5 so that each PAL signal corresponding each of first to fifth ones of six horizontal scanning lines is stored. A selector 14 sequentially read the memories L1-L5 twice during an interval from the time when the PAL signal corresponding to the first horizontal scanning line is stored to the time from storing the PAL signal corresponding to the first horizontal scanning line but before storing the PAL signal corresponding to the seventh horizontal scanning line.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: September 2, 1997
    Assignee: International Business Machines Corporation
    Inventors: Shusaku Matsuse, Katsuhiko Ohsaki
  • Patent number: 5654777
    Abstract: A method for controlling display video data on an LCD panel having a display matrix of pixels arranged in rows and columns and having a delta structure, which includes the steps of displaying the video data in its original (unchanged) form during a first field of the video data, and displaying the video data in a modified form during a second field of the video data, with alternate (e.g., odd-numbered) lines of the video data being shifted one pixel towards a first (e.g., right) side of the display matrix. A control circuit for implementing this method generates first and second control signals for controlling the operation of a column driving circuit which drives the columns of pixels of the display matrix in the appropriate manner.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: August 5, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-min Shin
  • Patent number: 5629744
    Abstract: an active matrix display device comprises a plurality of pixels, a vertical scanning circuit, a horizontal scanning circuit and a thinning-out circuit. The plurality of pixels are arranged in a matrix on a normal standard screen. The vertical scanning circuit is for sequentially selecting pixels every line. The horizontal scanning circuit is for writing single horizontal period portions of a wide standard image signal for selected lines of pixels and the thinning-out circuit is for controlling timing of the vertical scanning circuit sequential selection and thinning-out a prescribed number of horizontal period portions from a wide standard image signal in such a manner that wide displaying compressed in the longitudinal direction of the screen is carried out. It is therefore possible for a normal standard screen to change over to displaying a wide standard image.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: May 13, 1997
    Assignee: Sony Corporation
    Inventor: Akio Kawamura
  • Patent number: 5608467
    Abstract: A color projection video system utilizing only a single light valve. A white light source is separated into into red, green and blue bands. Scanning optics cause the RGB bands to be sequentially scanned across a light valve, such as a transmission LCD panel. Prior to each color passing over a given row of panels on the light valve, that row will be addressed, by the display electronics with the appropriate color content of that portion of the image which is being displayed. The image is projected by a projection lens onto a viewing surface, such as a screen. The sequence of light bands occurs so quickly as to give the viewer an appearance of simultaneous full color.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: March 4, 1997
    Assignee: Philips Electronics North America Corporation
    Inventors: Peter J. Janssen, Ralph H. Bradley, Joseph P. Bingham, William F. Guerinot, Detlev Otto
  • Patent number: 5598229
    Abstract: A liquid crystal device is constituted by a first electrode substrate having thereon a group of scanning lines, a second electrode substrate having thereon a group of data lines intersecting the scanning lines, and a liquid crystal disposed between the scanning lines and the data lines so as to form a pixel at each intersection of the scanning lines and the data lines. The liquid crystal device is driven by a driving method including a first mode operation for displaying a picture by line-sequential scanning, and a second mode operation including jumping of scanning lines from a final scanning line to a resumption scanning line during one picture scanning, wherein the final scanning line and/or the resumption scanning line is selected twice.
    Type: Grant
    Filed: October 2, 1995
    Date of Patent: January 28, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinjiro Okada, Yutaka Inaba, Kazunori Katakura
  • Patent number: 5583534
    Abstract: There are method and apparatus for driving a liquid crystal display apparatus which has a liquid crystal and electrodes arranged in a matrix form and in which a number of pixels having a memory effect are provided. Image information is displayed by a refresh scanning by using the liquid crystal display apparatus and is displayed by a non-refresh scanning without substantially changing the image information displayed by the liquid crystal display apparatus. A signal to fluctuate a transmission light amount of the pixel is applied to the electrode during the execution of the display by the non-refresh scanning. A smectic liquid crystal or a ferroelectric liquid crystal is used as a liquid crystal.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: December 10, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazunori Katakura, Akira Tsuboyama
  • Patent number: 5534940
    Abstract: An apparatus for driving a liquid crystal display can receive and adjust to image signals from one of a plurality of image signal formats such as those of the HDTV and NTSC systems, and includes plural shift registers, a sampling and holding (S/L) circuit and a Y driver. When receiving an image signal in the HDTV system, the shift registers receive and shift that image signal in series, and supply each bit data shifted thereby in a horizontal period to the S/L circuit. When receiving an image signal in the NTSC system, the shift registers are functionally divided into one for shifting that image signal and the other for shifting another image signal provided for displaying some pattern, and each bit data of these image signals is supplied to the S/L circuit. The S/L circuit provides the received data for driving data electrodes of the display, while the Y driver drives scanning electrodes of the display.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: July 9, 1996
    Assignee: Kabushiki Kaisha Japan
    Inventors: Masayori Sato, Kouichi Tago
  • Patent number: 5461424
    Abstract: A display control apparatus includes an X-driver for sequentially obtaining the horizontal picture signals from a PAL video signal, and supplying the obtained signal to each of the horizontal pixel lines of an NTSC liquid crystal display panel, and a Y-driver for sequentially selecting the horizontal pixel lines, in a preset number every time the X-driver supplies a horizontal picture signal to each of the horizontal pixel lines. In particular, the Y-driver includes logic gate circuit for updating the preset number on the basis of a selection pattern in which at least first and second numbers of horizontal picture lines are determined as selection units of lines to be selected at one time, the selection units are combined at a predetermined ratio, and the combination of the selection units is repeated for each predetermined number of the horizontal picture signals, thereby assigning the horizontal pixel lines to almost all the horizontal picture signals.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: October 24, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kan Shimizu
  • Patent number: 5381182
    Abstract: An electronic interface for converting an interlaced video signal to a non-interlaced video signal suitable for an LCD flat panel. An analog interpolator scheme is used in which the information available in an incoming video scan line is delayed and sampled, and output signals are created by interpolation between the sampled input and actual and interpolated scan line signals. The output signals are then converted into an integrated, sequential non-interlaced output signal having a frequency corresponding to the horizontal resolution of a scan line of the flat panel.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: January 10, 1995
    Assignee: Honeywell Inc.
    Inventors: David W. Miller, Larry A. Nelson, Ronald C. Robinder
  • Patent number: 5359206
    Abstract: Disclosed is an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel. In the TFT substrate, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extending therefrom, for gate electrodes, and for electrodes of thin film capacitors (additional capacitance, storage capacitance), and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulating films for the intersections between the bus-lines. Also disclosed is a method of selectively forming an anodic oxidized film on an aluminum pattern.
    Type: Grant
    Filed: April 15, 1991
    Date of Patent: October 25, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Yasuo Tanaka, Ken Tsutsui, Toshihisa Tsukada, Kazuo Shirahashi, Akira Sasano, Yuka Matsukawa
  • Patent number: 5357290
    Abstract: A liquid crystal displaying panel is formed of a number of pixels in the horizontal and vertical directions based on a PAL system of many horizontal scanning lines. A polarity reversing circuit reverses the polarity of an input video signal at a predetermined period and a signal feeding circuit samples the video signal reversed in the polarity and holds it. The signal feeding circuit feeds the output to the respective data lines of the liquid crystal panel and can feed the output corresponding to the data lines of an NTSC video displaying region by a switch to the data lines corresponding to the blank part other than the NTSC system video displaying region.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: October 18, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigenobu Horibe
  • Patent number: 5319381
    Abstract: Disclosed is a method for the addressing of each column of a matrix type LCD panel consisting in the production of a pulse to control a driver transistor of said column, said pulse having a duration determined by the value of the video signal sample at input, said pulse acting on the conduction state of said transistor to connect said column to a supply terminal where a voltage gradient develops. According to the method two pulse durations, the sum of which is predetermined, are alternated and, in order that a given value of a video signal sample may produce the same optical effect from one period to the next one, differentiated excitation voltages are applied to at least one of the electrodes sandwiching the liquid crystal layer, namely said column and its counter-electrode. Application notably to active matrix LCD panels.
    Type: Grant
    Filed: April 19, 1993
    Date of Patent: June 7, 1994
    Assignee: Thomson Consumer Electronics
    Inventors: Bruno Mourey, Eric Benoit, Antoine Dupont
  • Patent number: 5315396
    Abstract: A dropout compensation device includes a plurality of video signal storage devices, e.g., capacitors, for storing video signals to be displayed, a dropout detection circuit for detecting video signal dropout, and a circuit for interrupting the supply of video signals to the storage circuits whenever a dropout is detected, with the display continuing in accordance with what is already stored, e.g., from the previous line of video before the dropout was detected.
    Type: Grant
    Filed: February 19, 1991
    Date of Patent: May 24, 1994
    Assignee: Asahi Kogaku Kogyo Kabushiki Kaisha
    Inventor: Shunichi Miyadera
  • Patent number: 5301031
    Abstract: A display apparatus using a matrix display panel, such as a liquid crystal panel, for converting the number of scanning lines to be displayed to a number that can be accommodated on a panel having a smaller number of scanning lines. The apparatus includes a control circuit which produces control signals in synchronism with the input video signal, horizontal and vertical scanning circuits each including a shift register operated by the control circuit, and a display panel which is formed of a matrix arrangement of pixels that are driven selectively by the scanning circuits. The apparatus further includes a circuit which halts the operation of the vertical shift register at a certain interval within the effective scanning period of the vertical scanning circuit so as to extract vertical shift clocks, thereby removing the vertical shift clocks within the effective display period of the video signal, thereby extracting periodically extracting scanning lines.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: April 5, 1994
    Assignee: Hitachi Ltd.
    Inventors: Masahiro Eto, Nobuaki Kabuto, Mitsuo Tanaka
  • Patent number: RE38661
    Abstract: A liquid crystal display is capable of displaying intermediate, partial or half tones of images, while at the same time preventing the occurrence of flicker and the decay of the liquid crystal panel. The display operation for data to be displayed in an intermediate tone has one or more lines of a repeating frame of display data that are prohibited from being displayed during in each frame. Such inhibited display lines are designated differently on a sequential basis over consecutive frames, and the sequence of designation is varied in successive frames in accord with changing patterns.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: November 30, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Tsuguji Tachiuchi, Hiroyuki Mano, Terumi Takashi