Abstract: A digital solution for phase control of an output of a phase-locked loop (PLL) (100) is provided to achieve a desired phase shift at the output of the PLL (100). To that end, a fraction of the pulses of a PLL feedback signal are time shifted to achieve a desired average time shift associated with the desired phase shift. As a result, a desired phase shift is generated at the output of the PLL (100), while a desired devisor of the feedback signal is maintained on average. The resulting digital solution provides highly accurate phase control.

Abstract: Methods and systems are disclosed to monitor a media device. An example method includes attempting to detect a logical transition between two sequential bits in a sequence of bits of a digital audio signal output by a port of the media device, the digital audio signal being encoded via differential encoding; and when the logical transition is detected, generating operating state data including a first time and indicating that the media device was in an on state at the first time; or when the logical transition is not detected, generating the operating state data including the first time and indicating that the media device was in an off state at the first time.

Abstract: The disclosure is directed to a system and method of a system and method for determining fundamental bit cell duration of a data record, which can be used for pattern-dependent write (PDW) current control. According to various embodiments of the disclosure, at least a first portion of a data record is fed through a plurality of delay units. A binary output of each delay unit is stored in at least one register when the delay units have received the first portion of the data record. The register contents are then decoded to determine fundamental bit cell duration of the data record based upon the stored binary outputs.

Abstract: A method and system for reading readback pulse shapes representing a magnetization state transition between such written magnetization states of a two-layer continuous magnetic recording medium. A readback pulse shape representing a written magnetization state transition is read. The written magnetization state transition is uniquely identified from the readback pulse shape of the transition or from both the readback pulse shape of the transition and the readback pulse shape of one or more next magnetization state transitions.

Abstract: To effectively suppress a signal in a low frequency region in which the medium noise and the signal distortion are concentrated, and in order to effectively utilize a detected component of the reproduced signal in the low frequency region, a target of partial response equalization to the perpendicularly recorded/reproduced signal is set so that the low-frequency component around the direct current is suppressed to a regulated quantity for both the effective suppression and the effective utilization. Accordingly, a maximum-likelihood decoding process is carried out through the target of partial response equalization. Reliability of data detection is made higher and a signal-to-noise ratio is improved, so that the noise from the recording medium can be reduced more and it is possible to provide a high-density magnetic recording/reproducing apparatus.

Abstract: A method of performing data/information recording and retrieval utilizing a multilevel patterned magnetic medium, comprises providing a magnetic recording system including a read/write head and a multilevel patterned magnetic recording medium including a plurality of spaced apart data/information storage elements each comprising a stacked plurality n of magnetic recording cells with different magnetic properties and magnetically decoupled from overlying and/or underlying cells; providing relative movement between the write head and magnetic recording medium; and writing to the medium by supplying the write head with a modulated write current comprising a plurality n of pulses of different magnitudes while the head passes over each element, thereby applying n different magnetic field strengths to each element, such that the writing occurs in a single pass of the write head over each element.

Abstract: A multi-port switch and a method of command switching using such a switch. Multiple virtual targets provide multiple hosts with access to the physical target device attached to the target interface of the switch. The switch intelligently dispatches operations received by the virtual targets to the physical storage target device to provide shared access. In doing so, the communication between the switch and the physical target can fully comply with the SATA protocol without the physical target being aware that the operations have originated from multiple physical hosts, and without the multiple physical hosts being aware of the shared nature of the physical SATA target device.

Abstract: In a reproducing device (1) for the reproduction of reproduction data (WD) recorded on a magnetic tape (2), having transport means (7) for the transport of the magnetic tape (2) with a normal-play speed (VNS, VNLS2, VNLS3, VNLS5, VNLS7, VNHS), a first trick-play speed (VT1) and at least a second trick-play speed (VT2, VT3), the normal-play speed (VNS, VNLS2, VNLS3, VNLS5, VNLS7, VNHS) corresponding to a recording speed during the recording of the reproduction data (WD) on the magnetic tape (2), and having reproducing means (13) for the reproduction of normal-play reproduction data (NP1, NP2, NP3, NP4, NP5) recorded on the magnetic tape (2) during transport of the magnetic tape (2) with the normal-play speed (VN), of first trick-play reproduction data (TPD1, TPD6) recorded during transport of the magnetic tape (2) with the first trick-play speed (VT1), and of second trick-play reproduction data (TPD2, TPD3, TPD4, TPD5, TPD7) recorded during transport of the magnetic tape (2) with the second trick-play speed (V

Abstract: The present invention relates to a method for compensating asymmetry in a reproduction signal DRSO from an optical recording medium, and to an apparatus for reading from and/or writing to optical recording media using such method. It is an object of the invention to propose a method for compensating an offset in an asymmetric reproduction signal DRSO capable of compensating the offset even if the amplitude of the shortest run-length components is smaller than the asymmetry of the reproduction signal DRSO. This object is achieved by a method for compensating an offset in an asymmetric reproduction signal, whereby an offset compensation signal OFS is subtracted from the reproduction signal DRSO, the offset compensation signal OFS being generated by an offset compensator 11, comprising the steps of: detecting a binary data signal NRZ from the asymmetric reproduction signal DRSO; and using the binary data signal NRZ for obtaining the offset compensation signal OFS.

Abstract: A system and methods for providing offset information on a storage medium are provided by writing at least one unalterable mark on the storage medium during a manufacturing formatting process. The unalterable mark(s) are variably offset from a fixed position. The amount of offset represents a first source of unique information. The unalterable mark(s) themselves comprise a second source of information. Both sources of information are combinable and may be utilized in connection with the generation of a unique serial number for the storage medium or for other digital rights management purposes.

Abstract: A data storage device 15 comprises a recording head 35 and a recording media comprising a layer of magnetic material having an anisotropy that is substantially perpendicular to a plane of the layer. The device encoder 80 is adapted to provide an encoded data signal for recording data in encoded bit cells on the magnetic media 30, the encoded data signal comprising a sequence of signal transitions comprising added equalization signal transitions, the equalization signal transitions being added so that a plurality of the encoded bit cells comprises an average magnetization field strength that is substantially null.

Abstract: A data recording system includes media such as a magnetic disk or tape, a read/write head assembly, and a circuit that provides a write signal having edge placement equalization. The circuit responds to a binary serial data signal such as a run length limited signal of the type (1,x) and provides a write signal having data transitions corresponding to one of the two binary data values, the absence of a transition corresponding to the other data value. In addition, the write signal is provided with a pair of equalization transitions during periods of no data transitions. A first data transition is shifted away from the last provided equalization transition by a predetermined offset. A second data transition, provided immediately after the first data transition, may be shifted toward the last provided equalization transition. Timing of the data transitions is derived from a clock used to provide the equalization transitions.

Abstract: A method and apparatus for writing binary servo data into the servo bursts contained on the storage medium of a storage device. The binary servo information may include track identifying information such as a track number, cylinder number, head number, sector number, index and/or SID. A burst includes T time slots, each slot comprising one cycle of the servo burst frequency, and the servo data to be written comprises X bits of binary data. Each one-bit of the servo data is represented as a slot containing a transition, and each zero-bit is represented as an empty or null slot. In this manner, the present invention provides a highly bit-efficient scheme for representing digital servo data. A high quality PES signal is assured by writing the binary servo information in such a manner as to guarantee a threshold number of transitions per burst as required for accurate peak-hold detection.

Abstract: A method for transmitting "biphase" encoded digital signals including the steps of setting an aperture corresponding to a data bit; dividing said aperture into a plurality of segments; setting a first segment, selected from said plurality of segments of said aperture, dependent upon whether the bit is a digital one or zero; setting a second segment, selected from said plurality of segments of said aperture, so as to fit the remaining aperture of the data bit; and, transmitting said first and second segments of said data bit; wherein a narrow spectrum results containing no low frequency components and separated from 0 Hz by an amount equal to the data rate or 1/2 the data rate.

Abstract: A circuit for decoding an input signal includes a measurement circuit having an input to receive a timing clock signal that is asynchronous with clocking of the input signal, to measure duration of a plurality of pulses received on the input signal in relation to frequency of the timing clock signal and a decode circuit to decode the input signal into digital data. In one embodiment, the circuit may include a servo mechanism for generating the timing clock signal to have a frequency that varies in response to variations in frequency of clocking of data on the input signal. The servo mechanism may include a digitally controlled oscillator and a feedback circuit, to control the digital frequency of the digitally controlled oscillator in response to variation of clocking of data on the input signal. The invention permits use of all digital components for decoding digital audio data encoding using biphase-mark encoded data according to the SPDIF or AES/EBU standards.

Abstract: A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a desired partial response, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a trellis type sequence detector matched to the partial response. The trellis sequence detector comprises programmable detector levels which allows for maximum flexibility in matching the sequence detector to the partial response.

Abstract: The data recording/reproducing apparatus of the present invention efficiently performs a trickplay mode operation such as fast forward reproducing and rewind reproducing and a postrecording operation by using a data recording medium storing a variable-bitrate-compressed video data. Each AV file in the video data includes chapter data and first and second pointer data. Each GOP data in the chapter data includes one independent picture data and a plurality of dependent picture data. The first pointer data includes the location data of the independent picture data, and the second pointer data includes the location data of the first pointer data. Further, each GOP data includes an audio data interleaved with the picture data. The first pointer data includes the location data of the corresponding audio data, and the second pointer data includes the location data of the corresponding first pointer data.

Abstract: A method for decoding F2F signals as well as a device for decoding F2F signals read from a magnetic data carrier is provided. The signal read from the card by a magnetic reading head is amplified by an amplifier with a very high gain, discriminated in a discrimination and integration station to receive a binary looking signal. Out of this digitized signal in a reference time acquisition station a start-up time value is set and a phase is estimated to determine the correct end of a bit cell in a phase estimating station. In a symbol correlation station the received binary signal is correlated with all possible symbol combinations based on the estimated phase to create a correct bit stream. This bit stream might be processed further by a bit recovery station providing a corrected bit stream ready for interpretation.

Abstract: A phase-locked system for recovering data from a disk drive includes a phase detector for signalling the difference in phase between incoming delayed data pulses and a phase detection window clock signal. The phase detection window clock signal is derived from one output of a phase shifter driven by the output of a voltage-controlled oscillator whose frequency is controlled by the phase detector. The phase-locked loop is completed by comparing the phase detection window clock signal output of the phase shifter with the incoming delayed data pulses in the phase detector. Data detection window clock pulses, defining time windows in which the delayed data pulses are discerned, are produced at a second output of the phase shifter. The phase shifter produces a delay variable in precise increments over a wide range, causing a variable phase relationship between the time windows and the delayed data pulses that are to be discerned therein.

Abstract: A receiver for Manchester encoded data includes an autocalibration feedback loop that generates a timing pulse used to recover the clock and data signals. The autocalibration feedback loop includes a first digital delay line sampled by a plurality of D-type flip-flops in dependence upon the recovered clock signal to produce a control word CNT(O:N) indicative of the number of digital delay elements required to approximate one-half of the recovered clock period. A second digital delay line, connectivity mapped to the first, provides three-eights of a clock period delay. The delayed clock signal is derived from the bit stream by sampling in dependence upon the timing pulse. The decoded data signal is derived from the bit stream by multiplexing the sampling input in dependence upon the timing pulse and the decoded data signal.

Abstract: A method and apparatus for error detection and correction in the storage and retrieval of digital data on magnetic storage systems includes converting the digital data into analog waveforms, multiplexing the analog waveforms with reference values and storing same as a data stream, demultiplexing the reference values from the data stream and using the retrieved reference values to detect and reduce distortion or other errors in the data stream. Assignment of data to analog waveforms includes option of assigning arbitrary quantities of data to a compact analog waveform representation. Analog errors may be detected and corrected statistically, while digital errors may be detected and corrected using standard signal processing techniques.

Abstract: A helical scan video tape recorder includes a recording device having a head cylinder which carries magnetic heads therewith for rotating the head cylinder and applying incoming video signals to the magnetic heads to record the signals on a magnetic tape. A tape transport mechanism transports the tape while maintaining the tape in sliding contact with the head cylinder. A servo-lock sensing circuit senses a servo-locked condition in the recording device. A system controller responds to a record command entered on an operation board for controlling the tape transport mechanism to transport the tape in one direction to thereby record the video signals on the tape.

Abstract: Electrical circuits suitable for decoding binary information, in accordance with a novel modulation method. The novel modulation method is referenced in the instant case, and it is explained that the method may be used when an encoding or decoding information transfer rate may be dependent on unpredictable and variable transfer rate velocities and accelerations. The present electrical circuits provide a novel means to realize the utility of the modulation method.

Abstract: A method for modulating binary data into a format suitable for encoding and decoding information, that employs a non-return-to-zero (NRZ) technique. The modulating method includes: defining within a recording medium an event-cell as the time between two adjacent clock transitions having a similar, unique characteristic; and, selectively writing to the recording medium within the event-cell, at an arbitrary time, either a first or a second information. The selective writing step includes generating a first event and a corresponding first read signal in response to a first information and generating a second event and a corresponding second read signal in response to the second information. The method can be employed for a first situation where the information transfer rate during the modulating process is well-regulated, and is advantageously employed for a second situation where the information transfer rate is dependent on unpredictable and variable transfer rate velocities and accelerations.

Abstract: An electrical circuit suitable for encoding binary information, in accordance with a novel modulation method, is provided. The encoder circuit includes: a clock driver; an n-phase counter driven by the clock driver for producing a succession of event-cells, wherein each event-cell is demarcated by a pair of similar, unique clock transitions; first logic circuitry for generating a first transitional event in a first event-cell in response to a first information; and second logic circuitry for generating a second transitional event in a second event-cell in response to a second information, the first transitional event and the second transitional event differing by the number of transitions occurring per event-cell. A specific, preferred encoder circuit embodiment is set forth.

Abstract: Electrical circuits suitable for encoding a binary data stream into a tri-bit code format. The circuits are particularly valuable for situations where the encoding or information transfer rate is dependent on unpredicable and variable transfer rate velocities and accelerations. The circuits provide "self-clocking", which, in turn, permit velocity insensitive encoding.

Abstract: Decoding unit for CMI-encoded input signals. A signal having 0/1 transitions is first derived from a signal. A 0/1 transition occurs in a CMI-signal as the result of encoding a binary zero or two consecutive binary ones. In the latter case the 0/1 transition is preceded two bits earlier by a 1/0 transition. By deriving a signal having 1/0 transitions, delaying this signal by two bit intervals and by comparing it to the first signal, the 0/1 transitions corresponding to a binary zero are then accurately detected. The resultant signal can easily be extended by one bit period, so that independent of any phase inversions of the read clock, the appropriate binary information is always generated.

Abstract: A demodulation circuit for demodulating a modulated digital including a unit for detecting a specific pattern contained in a series of data before modulation, a unit for judging the phase relation between the specific pattern and a clock pulse used for demodulation, a unit for performing a counting operation on the basis of the result of said judgment, and a unit for controlling the phase of said clock pulse for demodulation on the basis of the count.

Abstract: A process for the base band modulation of a data signal on a magnetic support is characterized in that: (a) a bit value of 0 is marked if it follows an unmarked bit of value of 0 or a sequence of three consecutive unmarked bits of value 1; (b) a bit value 1 as marked if it follows a bit value 0 or a sequence of three consecutive unmarked bits of value 1, except if these rules (a) and (b) lead to marking the first bit of a sequence formed from three bits of value 1 followed by a bit of value 0. The minimum interfront in the modulated signal is equal to 1.5 T and the maximum interfront is equal to 4 T.

Abstract: There is disclosed a high speed data transmission system for transmitting a binary data signal over a communications path. The binary data signal is clocked at a given period. The system comprises encoded means responsive to a binary NRZ input data signal to provide at an output an encoded digital signal having time periods greater than multiples of the clock period, whereby the encoded signal occupies a lesser effective bandwidth than the NRZ signal would occupy. There are balanced modulator means having an input responsive to the encoded signal and another input adapted to receive a carrier frequency to provide at an output a double sideband suppressed carrier signal. Coupled to the output of the balanced modulator are narrow bandwidth filtering means including first low pass and second high pass parallel filter paths each having a common input terminal coupled to the output of the modulator.

Abstract: A decoder for Manchester encoded data in which the encoded data is sampled by a clock signal to produce a decoded data signal. The decoded data is combined with a delayed version of the encoded data, to produce the clock signal. In a preferred version, a tuned circuit is included to stabilize the clock signal against jitter.

Abstract: A recording system is provided in which digital time code information is recorded interspersed on the same data track as analog audio message signals. The time codes have a unique format which enables their bit rate to be extracted while reading the code, thus enabling use of the system with tape transports having unregulated fast wind speeds. The system is placed in a fast wind mode of operation and time codes are read and compared to a preselected time code in order to locate a desired audio message for playback. The configuration of the system ensures that the playback of each message will commence only at the beginning of a message. In addition, the invention eliminates the need for a separate data track for time codes, thus increasing the signal to noise ratio of the system.

Abstract: An optical data bus with a statistical access method for the transmission of data between transmitters and receivers in the form of NRZ data provides that every transmitter of a subscriber contains a Manchester encoder which Manchester encodes the NRZ data and deposits such data onto the bus in a Manchester-encoded form. The receiver of every subscriber contains a Manchester decoder for the reacquisition of the NRZ data from the Manchester encoded data and contains a clock recovery device which recovers the clock contained in the Manchester-encoded data. Such a Manchester decoder with the clock recovery device can be constructed in a very simple manner and such a simple structure is disclosed. A very simply-constructed bus state recognition device is also included.

Abstract: In recording and/or detecting two different marking signals on or from a record carrier, a generator for marking signals comprises at least one pulse generator which supplies marking signals in the form of two marking-pulse trains M1 and M2 having the same frequency but having different duty factors with the values k and 1-k respectively, which differ from 0.5. A detection circuit for detecting marking signals detects the duty factor of a marking pulse train M1 or M2 respectively and which supplies a specific detection signal in conformity with its detected pulse train.

Abstract: Method and apparatus for storing data on a recording medium wherein the method includes grouping digital binary signals into chunks of N bits where N is an integer greater than 1. The value of each of the N bit chunks is determined and converted into a symbol cell. Each symbol cell has a duration which is dependent upon the value of the corresponding N bit chunk. The symbol cell is recorded. The transition shift for each of a plurality of juxtapositions of symbol cells is determined, and the symbol cell duration is varied depending upon the compensation required from the determined transition shift. A system of reading out the recorded symbol cells is also disclosed.

Abstract: A data demodulator is composed of a data separation circuit which produces synchronizing clock pulses from M.sup.2 modulation data which is reproduced by a data recording device and separates the M.sup.2 modulation data into clock bits and data bits, and an M.sup.2 demodulation circuit which produces NRZ - L data by using the clock bits, data bits and synchronizing clock pulses which are output from the data separation circuit. M.sup.2 modulation data which is input to the M.sup.2 demodulation circuit is demodulated to a data signal in NRZ - L format by the demodulation circuit, which has a simple structure.

Abstract: A signal pre-processing method for detecting valid Manchester-encoded activity on a line carrying Manchester-encoded data signals to an inexpensive Manchester-decoding receiver. Detection is provided by monitoring both a positive-level presence and a negative-level presence to determine whether the received Manchester-encoded signal exceeds a predetermined positive voltage or falls below a predetermined negative voltage. Following detection of such line activity, the received signal is determined to be validly Manchester-encoded if it first crosses a predetermined positive level or a predetermined negative level after having first previously crossed the opposite level within a time interval of 3/4 to 11/4 of the inter-bit period of the received data signals.

Abstract: A method of magnetic encoding of credit instruments having a strip form magnetic recording medium provides at least one data field on the strip. First and second magnetic field orientations are selected for recordation on the medium of successive, adjacent bit regions in an alternating field orientation pattern with the transition between such orientations defining the transition from one bit region to the next, signalling the initiation of a recorded bit representing either a binary "1" or a binary "0". A first bit region length d.sub.1 for representing one of the binary values "0" and a second bit region length d.sub.2 for representing the other binary value as well as the ratio of d.sub.1 /d.sub.2 are selected, with d.sub.1 /d.sub.2 being from about 0.1 to about 0.5. Thus, the magnetic field transition between adjacent bit regions signals a binary bit and the length of each bit region represents its binary value.

Abstract: The invention involves a decoder for converting CMI-coded signals into binary signals. Existing decoders of this type have a comparatively elaborate design and high power consumption. The invention teaches an improved decoder which has an AND gate and a NOR gate with at least two inputs each, where one input of the two gates is connected directly to the signal input, and the other input is connected via a delay element with a delay corresponding to one half of a bit period of the CMI-coded signals. Each of the outputs of the two gates are connected separately to the inputs of an OR gate with the binary signals being available at its output further features of the present embodiment are a clock pulse generator and a CMI code protocol violation monitor. The present decoder can be used for transmission devices for of digital signals with bit rates of approximately 140 Mbit/sec.

Abstract: In an encode method in which a binary data stream is divided into data words each of three bits. Each of the data words is encoded into a binary code word of 9 bits. In the method, a code word to be encoded is encoded in consideration of a code word preceding the code word and two code words succeeding the code word. Then, one of the first two code bits in each code word and two of the last five code bits in the preceeding code word are inverted according to a pattern of code bits "0" and "1" in both the code words. As a result, consecutive 5 to 19 code bits "0" are arrayed between two adjacent code bits "1" in the code word stream.

Abstract: A quaternary saturated digital magnetic recording system for enhancing information entropy provides an effective bit density increase of 100% or more over the MFM code. In the simplest implementation, groups of two input binary bits are mapped into one data cell, preferably into four combinations of long or short breaks and positive or negative polarity, with the break optionally centralized within the data cell for self-clocking. A system for reproducing the recorded information provides a peak detector, responsive to the recorded signal, coupled to pulse polarity and break width detector circuitry, with an internally synchronized clock, for remapping the recorded data into binary format.

Abstract: A still video signal is modulated to a PDM signal by a pulse duration modulator. The PDM signal is recorded by a perpendicular magnetic recording head on a recording medium of perpendicular magnetic anisotropy according to the perpendicular magnetic recording method. The PDM signal recorded on the recording medium is reproduced by a perpendicular magnetic reproducing head.

Abstract: Digital data is recorded onto a cassette tape by utilizing an audio cassette tape recorder under the control by a microprocessor. The microprocessor assigns "0" digital data bit a time sequence of a shorter pulse of a single period (T.sub.1) and having a duty cycle of 50% and a longer pulse of a single period (T.sub.2) and having a duty cycle of 50%. Assigned to "1" data bit is a time sequence of a single period of T.sub.2 pulse and a single period of T.sub.1 pulse. An analog signal applied to the recording unit of the audio cassette tape recorder initiates a gradual increase in its level at a point of transition from the low level L to the high level H of either T.sub.1 or T.sub.2 pulse, and returns to a start level at a point of transition from the H to the L level and also initiates a gradual decrease in the level. In this manner, a waveform conversion is performed.

Abstract: Data synchronization apparatus for a 1500 baud computer-audio frequency magnetic tape recorder interface is disclosed. The synchronization apparatus automatically detects bit cell boundaries and synchronizes at both the bit level and the byte level even if the audio waveform as read from the tape is inverted, as is the case with some tape recorders. Synchronization is performed by converting the audio waveform into a square wave and examining the square wave for predetermined pulse patterns. If one pattern is found, the positive-going edge of the waveform is selected as the bit cell boundary. If, on the other hand, another pattern is found, negative-going edges are selected as bit cell boundaries. Synchronization is achieved on a byte level by shifting incoming data into a first-in/first-out buffer and examining the stored data for a predetermined bit pattern.

Abstract: To decode a binary signal without regard to the speed at which it is read, each transition in the binary signal is detected, and the time lapse between successive transitions is determined to thereby establish the length of a pulse in the binary signal. The length of one pulse is compared with that of the immediately preceding bit cell to determine whether their lengths are approximately the same or vary by a factor of approximately 2. If the two compared lengths are approximately the same, it is recognized that there is no change in the information conveyed by the signal and therefore the binary state of the most recently detected pulse is representative of the previously established binary state of the signal. However, if the pulse has a duration of approximately one half that of the preceding bit cell, a change in the state of the binary information being conveyed is recognized, and an appropriate indication is provided to signal such change.

Abstract: An interface circuit (10) for coupling a parallel data device (12) to a serial data channel (14, 16) over which Manchester-type codes are transmitted. In the interface circuit, an efficient and reliable Manchester decoder (22), comprising a flip-flop (50), an exclusive-or gate (52), and at least one delay line (58A or 58B) separates the data and clocking signals. The serial data signals are clocked into a serial register (30) under control of the external clocking signals from the channel. A carrier detector (24) enables the serial register only when valid information signals are present. A parallel data register (40) receives in parallel the data from the serial data register. To get in phase the external clocking signals with the internal clock source, an internal clock synchronizing circuit (34, 42) recycles the internal clock source upon the occurrence of a synchronizing character that is transmitted over the serial data channel.

Abstract: Data synchronization apparatus for a 1500 baud computer-audio frequency magnetic tape recorder interface is disclosed. The synchronization apparatus automatically detects bit cell boundaries and synchronizes at both the bit level and the byte level even if the audio waveform as read from the tape is inverted, as is the case with some tape recorders. Synchronization is performed by squaring the audio waveform and measuring two successive time intervals occurring between three successive positive-going transitions and subtracting the resulting measurements. If the calculated difference is less than a predetermined amount, positive-going transitions of the waveform are selected as bit cell boundaries. If, on the other hand, the calculated difference is greater than the predetermined amount, negative-going edges are selected as bit cell boundaries. Synchronization is achieved on a byte level by shifting incoming data into a first-in/first-out buffer and examining the stored data for a predetermined bit pattern.

Abstract: A method and apparatus provide for the elimination of any net DC component from the transmission of binary data sequentially in successive clocked bit cells of a transmission channel wherein logical first bit states, e.g., 0's, are normally transmitted as signal transitions relatively early in respective bit cells, preferably at cell edge, and logical second bit states, e.g., 1's, are normally transmitted as signal transitions relatively late in respective bit cells, preferably at mid-cell, and any transition relatively early in a bit cell following a transition relatively late in the next preceding bit cell is suppressed.

Abstract: Digital data formed of binary bits of first and second values occupying consecutive bit cells of predetermined intervals are encoded such that successive binary bits of the first or second values are represented by predetermined separations between succeeding transitions. A first transition is produced at a first reference point in a bit cell when a binary bit of the second value changes over to a binary bit of the first value. When successive binary bits of the first value are sensed, a respective second transition is produced at a second reference point in a bit cell after sensing every 2 or 3 binary bits of the first value.

Abstract: Digital data formed of binary bits of first and second values occupying consecutive bit cells of predetermined intervals are encoded such that successive binary bits of the first or second values are represented by predetermined separations between succeeding transitions. A first transition is produced at a first reference point in a bit cell when a binary bit of the second value changes over to a binary bit of the first value. When successive binary bits of the first value are sensed, a respective second transition is produced at a second reference point in a bit cell after sensing every 2 or 3 binary bits of the first value.