Abstract: Inter-track interference cancelation is disclosed, including: receiving an input sequence of samples associated with a track on magnetic storage; using a processor to generate inter-track interference (ITI) data associated with a first side track including by performing a correlation between the input sequence of samples and a sequence of data associated with the first side track.

Abstract: User level data associated with a location adjacent to a desired location on a magnetic disk storage is received. Media level data associated with the adjacent location is generated based at least in part on the user level data associated with the adjacent location; a processor which is configured to generate the media level data associated with the adjacent location is a same processor which is configured to generate media level data based at least in part on user level data during a write process. The media level data associated with the adjacent location is used to remove inter-track interference (ITI) associated with the adjacent location from a signal read back from the desired location.

Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems using averaged values. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data for ITI mitigation, wherein the ITI mitigation is performed in combination with an averaging procedure for one or more of ITI mitigation of averaged data and averaging of ITI mitigated data. The sector is optionally decoded using the ITI mitigated samples. Samples for one or more side track sectors can also be averaged. The averaged side track samples can be provided as ITI cancellation data for ITI mitigation. The averaging procedure optionally applies a scaling factor to each read value.

Abstract: According to one embodiment, there is provided a method of temporarily storing data in a buffer. The method determines whether data written based on sequential writing is of a first type or a second type in data type. The method stores the written data in association with the determined data type in the buffer. The method further controls the buffer so that the data of the first type stored in the buffer may be held in the buffer for a length of time twice as long as time T1 corresponding to one revolution of a disk and the data of the second type stored in the buffer may be held in the buffer for the time T1.

Abstract: A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device.

Abstract: A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, a symbol timing loop and read circuit, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device without disturbing the symbol timing loop and read circuit.

Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data to an ITI mitigation circuit using a write data path in the magnetic recording system. The write data path can optionally operate substantially simultaneously with the read data path performing the read operation. The ITI cancellation data comprises, for example, user data and/or media data.

Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) cancellation data is stored in a memory of a read channel of a magnetic recording system. The memory can be in a write data path or a read data path of the read channel. The inter-track interference cancellation data is optionally provided to an inter-track interference mitigation circuit using at least a portion of a write data path, for example, based on a control signal. The storage of the inter-track interference cancellation data can be in response to a second control signal.

Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, which decodes the ITT cancelled data and provides the decoded ITI cancelled data as output of the read channel.

Abstract: A system for identifying and compensating for non-linear transition shift in a magnetic medium data storage device is disclosed. The non-linear transition shift compensation system includes a non-linear transition shift estimation module adapted to generate non-linear transition shift estimates for specific bit patterns. The system further includes a pre-compensation module adapted to adjust the temporal spacing of binary transitions written to the magnetic medium based on the non-linear transition shift estimates generated by the non-linear transition shift estimation module for specific bit patterns corresponding to bit patterns appearing in the data being written to the magnetic medium.

Abstract: Inter-track interference cancelation is disclosed, including: receiving an input sequence of samples associated with a track on magnetic storage; using a processor to generate inter-track interference (ITI) data associated with a first side track including by performing a correlation between the input sequence of samples and a sequence of data associated with the first side track.

Abstract: To effectively suppress a signal in a low frequency region in which the medium noise and the signal distortion are concentrated, and in order to effectively utilize a detected component of the reproduced signal in the low frequency region, a target of partial response equalization to the perpendicularly recorded/reproduced signal is set so that the low-frequency component around the direct current is suppressed to a regulated quantity for both the effective suppression and the effective utilization. Accordingly, a maximum-likelihood decoding process is carried out through the target of partial response equalization. Reliability of data detection is made higher and a signal-to-noise ratio is improved, so that the noise from the recording medium can be reduced more and it is possible to provide a high-density magnetic recording/reproducing apparatus.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

Abstract: A method of performing data/information recording and retrieval utilizing a multilevel patterned magnetic medium, comprises providing a magnetic recording system including a read/write head and a multilevel patterned magnetic recording medium including a plurality of spaced apart data/information storage elements each comprising a stacked plurality n of magnetic recording cells with different magnetic properties and magnetically decoupled from overlying and/or underlying cells; providing relative movement between the write head and magnetic recording medium; and writing to the medium by supplying the write head with a modulated write current comprising a plurality n of pulses of different magnitudes while the head passes over each element, thereby applying n different magnetic field strengths to each element, such that the writing occurs in a single pass of the write head over each element.

Abstract: A system for identifying and compensating for non-linear transition shift in a magnetic medium data storage device is disclosed. The non-linear transition shift compensation system includes a non-linear transition shift estimation module adapted to generate non-linear transition shift estimates for specific bit patterns. The system further includes a pre-compensation module adapted to adjust the temporal spacing of binary transitions written to the magnetic medium based on the non-linear transition shift estimates generated by the non-linear transition shift estimation module for specific bit patterns corresponding to bit patterns appearing in the data being written to the magnetic medium.

Abstract: A system for grading defective bit patterned magnetic media by disk sector in hard disk drives recovers a portion of any defective sectors at a lower areal density. The invention reduces the track pitch density for sectors containing amalgamated islands while leaving the remainder of the defect-free sectors in the zone optimized for linear bit density. This recovers a portion of the defective sector, approximately in proportion to the ratio of amalgamated islands over the original number of islands. A typical zone is first optimized for tracks per inch during formatting of the patterned media disk drive. The zone is then broken up into sectors that can each be optimized separately for linear bit density to ensure the maximum sustainable capacity for each sector.

Abstract: Various embodiments of the present invention provide systems and methods for write pre-compensation. For example, various embodiments of the present invention provide methods for modifying magnetic information transfer. The methods include retrieving magnetically represented data from a storage medium, and converting the magnetically represented data to a series of data samples. A preceding pattern and a transition status is identified in the series of data samples, and an equalized channel response is computed based on an estimated NLTS value. An error value is computed that corresponds to a difference between the estimated NLTS value and an actual NLTS value, and a pre-compensation value is computed based at least in part on the error value.

Abstract: A phase interpolator is provided that, in one implementation, includes an output node, a plurality of phase input circuits, and a plurality of switches corresponding to the plurality of phase input circuits. Each phase input circuit is operable to receive a given phase signal. Each switch is in communication with a given phase input circuit and is operable to couple a given phase signal to the output node.

Abstract: Various embodiments of the present invention provide systems and methods for write pre-compensation. For example, various embodiments of the present invention provide systems for on-the-fly estimation of write pre-compensation values. Such systems include a magnetic storage medium, a read/write head assembly disposed in relation to the magnetic storage medium, and an analog to digital converter that receives an analog signal from the read/write head assembly corresponding to a data set stored on the magnetic storage medium and provides a series of digital samples corresponding to the data set. The storage devices further include a read data processing circuit that receives the same series of digital samples and provides a user data output, and a pre-compensation value calculation circuit that receives the series of digital samples and provides an updated write pre-compensation value.

Abstract: A method leverages knowledge of the actual or ideal bit sequence to improve the performance of any sequence detector. This improved performance results by constraining the sequence detector when the sequence detector has knowledge of known patterns within the sample sequence. Embodiments may control or limit the effects of ISI on a readback signal in order to allow higher storage within physical media such as that of a HDD. This method involves reading an analog waveform from the physical media. The phase of this analog waveform is determined and it is sampled at regular intervals using a timing recovery scheme. This sample sequence is equalized (filtered) and sent to a sequence detector which will compare the received sequence to all possible transmitted sequences, generating a path through a trellis that represents the estimated sequence. That trellis path may pass through known states at certain times. This knowledge makes it possible to remove some of the paths under consideration.

Abstract: A perpendicular recording system includes a summing module that has a first input that receives a read signal. A DC correction module selectively generates a DC correction signal to reduce DC offset in the read signal. The DC correction signal is output to a second input of the summing module. A detecting module compares an output of the summing module to a predetermined threshold and selectively detects Thermal Asperity (TA).

Abstract: In a perpendicular magnetic recording system, the data that is being written by the write channel is fed back into the read channel. The read channel processes the data and decides if the written sequence is likely to have very poor DC characteristics. If that is the case, the write channel changes a scrambler seed and rewrites the data using the new scrambler seed. The data may also be inspected for patterns that might cause large baseline wander before being written to disk, i.e., in the write channel. A data sequence may be repeatedly scrambled and encoded until an acceptable level of estimated DC-wander has been achieved. The data sequence may then be written to disk.

Abstract: A phase interpolator is provided that, in one implementation, includes an output node, a plurality of phase input circuits, and a plurality of switches corresponding to the plurality of phase input circuits. Each phase input circuit is operable to receive a given phase signal. Each switch is in communication with a given phase input circuit and is operable to couple a given phase signal to the output node.

Abstract: The storage device of the invention has a ramp mechanism which shakes out the head onto the disk medium, and causes the head to evacuate from the medium to hold it. The command queuing processing unit stores input/output commands into the command queue in the order of issuance by the host, and then, executes the commands in arrangement in the increasing order of the medium access time. Completion of commands is responded to the host in the order of completion of execution. The end of command is responded to the host in the order of end of execution. The emergency evacuation processing unit interrupts, upon receipt of an emergency evacuation command from the host during operation of the command queuing processing unit, operation of the command queuing processing unit and protects the head by causing the head to evacuate from the medium to the ramp mechanism.

Abstract: A pre-compensation circuit comprises a clock delay generator that generates clock delay data based on a clock signal having a first clock rate. A reference clock delay unit receives the clock signal and generates reference clock delay information based on the first clock rate. A calibration unit receives the reference clock delay information and calibrates each of n clock delay units based on the reference clock delay information and a change in the first clock rate, wherein n is an integer greater than 1.

Abstract: A method for estimating the average intergranular exchange field using measurements of major and minor hysteresis loops. The method also facilitates deshearing hysteresis loops for analysis purposes in perpendicular media. This estimation technique is especially important for modern perpendicular media because exchange plays a critical role and process control can be difficult.

Abstract: In a precompensation circuit for magnetic recording of data signals, a clock produces clock signals at a predetermined rate to clock the recording of the data signals. A clock delay generator generates clock delay data relative to the generated clock signals for successive data signals to be recorded. The clock delay data for each data signal is formed according to the states of a set of adjacent data signals. n>1 programmable clock delay units operate sequentially to control the recording times of the successive data signals. Each clock delay unit receives the clock delay data for one data signal in each sequence of n successive data signals and determines recording time of the one data signal according to the clock delay data for the one data signal in the sequence.

Abstract: A method and apparatus for providing write pre-compensation using a read timing path is disclosed. The present invention generates a first phase clock signal having a first phase and being synchronized with a read signal of a read path, generates a second phase clock signal having a second phase at a predetermined phase difference with the first clock signal and uses the first and second clock signals to shift write data to achieve write data comprising a first desired pre-compensation.

Abstract: A method and apparatus for providing write pre-compensation using a read timing path is disclosed. The present invention generates a first phase clock signal having a first phase and being synchronized with a read signal of a read path, generates a second phase clock signal having a second phase at a predetermined phase difference with the first clock signal and uses the first and second clock signals to shift write data to achieve write data comprising a first desired pre-compensation.

Abstract: A write precompensation amount setting method and apparatus comprise a function detecting the respective head characteristics with an electric current used at an ordinary temperature and a irregular electric current, and a function setting an optimum write precompensation amount at a low temperature according to the detected head characteristics. As a result, a write precompensation amount is corrected according to the characteristics of the normal current and the irregular current, and a write precompensation amount is determined, so that the write precompensation amount with higher accuracy than that with a conventional technique can be determined.

Abstract: A detection circuit or a perpendicular recording system includes a channel circuit to amplify the read data signal. A transient detector generates a transient detect signal. A first path and a second path are coupled to an output of the channel circuit. The first path includes a first data detector that generates a first detected data signal in response to detecting data in the read data signal. A second path includes a series connected combination of a data filter and a second data detector. The filter generates a filtered data signal in which low frequency components of the read data signal are attenuated. The second data detector generates a second detected data signal in response to detecting data in the filtered data signal. Either the first detected data signal or the second detected data signal is coupled to a data processor based on whether a transient is detected.

Abstract: In a precompensation circuit for magnetic recording of data signals, a clock produces clock signals at a predetermined rate to clock the recording of the data signals. A clock delay generator generates clock delay data relative to the generated clock signals for successive data signals to be recorded. The clock delay data for each data signal is formed according to the states of a set of adjacent data signals. n>1 programmable clock delay units operate sequentially to control the recording times of the successive data signals. Each clock delay unit receives the clock delay data for one data signal in each sequence of n successive data signals and determines recording time of the one data signal according to the clock delay data for the one data signal in the sequence.

Abstract: Method of accurately measuring various kinds of non-linear transition shifts (NLTSs) in the magnetic recording/reproduction using an MR-type reproducing head is provided. According to the method, the data of a reference bit-string pattern are sent, as reference signals, to a magnetic disk 2 via a head IC 5 and a magnetic head 3 so as to be magnetically recorded. A first predetermined harmonic component Vnref is measured from the reproduced signals of the record data detected by the magnetic head 3, a bit-string pattern is selected from plural kinds of predetermined bit-string patterns, the data of the selected bit-string pattern are sent, as to-be-measured signals, to the magnetic disk 2, a second predetermined harmonic component Vnpat is measured from the reproduced signals, and the NLTS is calculated from Vnref and Vnpat.

Abstract: A method of encoding and decoding data involving the simultaneous application of pulse width modulation and pulse position modulation systems to data intended for storage on a magnetic disk medium.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.

Abstract: There is disclosed a write compensator which suppresses bit shift caused by distortion of a read signal waveform of a read head in a disk drive adopting a perpendicular magnetic recording system. The write compensator executes write compensation during recording data based on the known relationship between bit shift which is beyond an allowable range and a pattern of a data bit string of a data signal. A write amplifier converts the write-compensated data signal into an electrical signal by using the write compensator so as to suppress the bit shift, and supplies it to a write head.

Abstract: A disk drive of perpendicular magnetic recording method including a read head comprising a GMR element and a drive using a double-layered disk medium, is disclosed. In the magnetic field response characteristic of the GMR element, the relationship between the degree of nonlinearity and a pulse width at 50% threshold (PW50) of a differentiated read signal is used. The degree of nonlinearity of the GMR element is adjusted such that the PW50 is smaller than the maximum value. The read channel comprises a differentiation circuit for converting the read signal output from the GMR element into the differentiated read signal.

Abstract: There is disclosed a disk drive of a perpendicular magnetic recording system including a write compensator against magnetic disturbance. The write compensator estimates strength and direction of the magnetic disturbance based on the detection result of the magnetic disturbance from a magnetic sensor during a write operation. The write compensator executes write compensation in accordance with the direction of the magnetic disturbance and the recording magnetization direction on a disk medium.

Abstract: A disk drive is disclosed comprising a disk and a head actuated radially over the disk. A pattern detector detects a predetermined pattern in write data to be written to the disk, and in response, adjusts a write current overshoot in a write current applied to the head.

Abstract: A method of encoding and decoding data involving the simultaneous application of pulse amplitude modulation, pulse width modulation, and pulse position modulation systems to data intended for storage on a magnetic disk medium.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.

Abstract: A nonlinear transition shift (NLTS) measurement procedure for read/write heads employing a giant magnetoresistive (GMR) merged heads. The method of this invention includes the pulse-shape distortion effects on recording nonlinearity, which can significantly affect the existing theoretical formulae for calculating nonlinearity correction factor from measured partial erasure values, and second-order approximation of equation of NLTS and nonlinearity correction factor. Transition broadening effects (TBE) and partial erasure (PE) are incorporated in the NLTS measurement procedure to permit accurate isolation of the NLTS from the unrelated TBE/PE and GMR nonlinear transfer characteristic (NTC). First, a fifth harmonic elimination (5HE) test is performed at bit period T to measure a first nonlinearity value X.

Abstract: In a coding method which does not restrict a run length of “1” while data is recorded/reproduced, there are such a drawback that when an error correction is carried out, a total number of error data to be corrected is increased, and also errors of not-detectable data are increased. While data is coded, a continuous number of “1” contained in a code word is limited, and then an error correction is carried out inside a coding/decoding process operation. Thus, a recording/reproducing apparatus having a small number of decoding errors is available.

Abstract: A method for write-precompensating a waveform for magnetically recording a waveform on a magnetic medium is disclosed. A user data stream is encoded into an encoded data stream so that the encoded data stream has no tribits and no consecutive dibits. No delay is applied to a first transition of a dibit of the encoded data stream. An isolated transition of the encoded data stream is delayed by a first predetermined amount of time. The second transition of a dibit of the encoded data stream is delayed by a second predetermined amount of time, such that the second predetermined amount of time is substantially twice the first predetermined amount of time. Preferably, the encoded data stream satisfies a predetermined run length limited (RLL) k− constraint of k=13 and a predetermined twins t-constraint of t=15. In one embodiment, the encoded data stream is encoded by a block code at rate 8:10. In another embodiment, the encoded data stream is encoded by a block code at rate 16:19.

Abstract: A magnetic medium write precompensation circuit produces a precisely controlled delay for magnetic medium write precompensation by digital-to-analog converting a data value, low-pass filtering the digital-to-analog converted signal, and limiting the filtered signal to produce a desired time delay. One or more of the digital-to-analog conversion levels, limiting levels, and filter cutoff levels determines the amount of the delay. Feedback control may be employed to adjust the digital-to-analog conversion level, filtering, and/or the limiting level to thereby adjust the compensation time delay.

Abstract: An extra-HDA record reproducing circuit for outputting write data comprising parallel data is provided outside a disk assembly, and a intra-HDA record reproducing circuit comprising a parallel-to-serial conversion circuit for receiving write data comprising parallel data and converting the write data to serial data, a write amplifier for switching a polarity of a recording current to be supplied to a head according to the write data converted to serial data, and a preamplifier for amplifying a read signal detected by the head is provided within the disk assembly, and the write data is transferred at a high speed at least from the extra-HDA record reproducing circuit to the intra-HDA record reproducing circuit.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.

Abstract: A method and apparatus to optimize a bit error rate for a partial response, maximum likelihood (“PRML”) read/write channel is disclosed. A channel margining circuit that is configured to carry out an embodiment for a method of optimizing the bit error rates of a read/write channel is described. The margining circuit derives an interference signal to stress a read/write channel for optimizing the bit error rate. The signal is derived from bit errors inherent with the read/write channel. The circuit reduces the time to optimize the channel by providing an amplified interference signal that increases a bit error rate during optimization.

Abstract: A recording equalizer for correcting a write timing of magnetic information when the magnetic information is recorded with a magnetic recording head on a magnetic recording medium, includes a buffer for storing a recording object bit and bits before and after the recording object bit and a calculator for calculating a precompensation parameter using the bits stored in the buffer. The calculator calculates the preconpensation parameter of the recording object bit by linearly adding influence of a transition existing at a two-previous bit of the recording object bit, influences of a transition at a one-previous bit of the recording object bit and influences of a transition existing at one-following bit of the recording object bit and further adding an offset. The offset is determined to a value such that a write timing of the magnetic information is corrected always in a delaying direction.