Data Clocking Patents (Class 360/51)
  • Patent number: 6947233
    Abstract: In a first mode, an R/W channel starts to monitor read information to thereby detect a servo mark contained in servo information, each time a servo controller generates a servo gate pulse. Upon detecting the servo mark, the R/W channel detects, from the read information, position information contained in the servo information and following the servo mark, at a timing determined by the detection timing of the servo mark. When the first mode has been switched to a second mode, the R/W channel detects the servo mark and position information using the synchronous method.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: September 20, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akio Toda
  • Patent number: 6943981
    Abstract: Methods are provided for improving servo-demodulation robustness. SAM pattern detections are characterized as either good SAM detections or bad SAM detections. Further servo functions are then based on whether the detection of the SAM pattern in a servo wedge was characterized as a good SAM detection or characterized as a bad SAM detection.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: September 13, 2005
    Assignee: Matsushita Electric Co., Ltd.
    Inventor: Richard M. Ehrlich
  • Patent number: 6937414
    Abstract: A system and method for enabling a programmed phase change in a servo track writer (STW) clock providing signals for writing information to a servo track, the phase change programmed to occur in one or more large or small phase bumps in either positive and negative directions, whereby a large phase jump is defined as the largest block of bit unit that can be handled without introducing noise into the system, and a smaller phase bump that is the smallest incremental bit unit that may be programmed to change the servo write clock phase until a final phase offset is reached.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: August 30, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Valerie H. Chickanosky
  • Patent number: 6934100
    Abstract: Method of accurately measuring various kinds of non-linear transition shifts (NLTSs) in the magnetic recording/reproduction using an MR-type reproducing head is provided. According to the method, the data of a reference bit-string pattern are sent, as reference signals, to a magnetic disk 2 via a head IC 5 and a magnetic head 3 so as to be magnetically recorded. A first predetermined harmonic component Vnref is measured from the reproduced signals of the record data detected by the magnetic head 3, a bit-string pattern is selected from plural kinds of predetermined bit-string patterns, the data of the selected bit-string pattern are sent, as to-be-measured signals, to the magnetic disk 2, a second predetermined harmonic component Vnpat is measured from the reproduced signals, and the NLTS is calculated from Vnref and Vnpat.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: August 23, 2005
    Assignee: Fujitsu Limited
    Inventor: Hiroaki Ueno
  • Patent number: 6934099
    Abstract: A digital data reproducing apparatus includes, a read head for reading data from a recording medium, an analog-to-digital converter for converting the data read by the read head into digital data, a memory for storing the digital data converted by the analog-to-digital converter, a phase control circuit for controlling phase of the digital data, and off-track detector for detecting off-track of the read head from a track on the recording medium. In the apparatus, storing operation to the memory is controlled based on output signal from the off-track detector and output signal from the phase control circuit.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: August 23, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshimasa Oda, Shoji Marukawa
  • Patent number: 6934103
    Abstract: A read channel for a hard disk controller comprising: means for generating a sequence of start of write signals to individually control the start of writing of each of one or more servo sync words to a disk; and means for individually writing the one or more servo sync words to the disk.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: August 23, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Valerie Chickanosky, Frank R. Keyser, III
  • Patent number: 6934104
    Abstract: Disclosed is a rotatable media storage device (RMSD) that performs servo synchronization based on a servo synch mark (SSM) that conflicts with self-clocking encoding algorithms. The RMSD includes a disk having a plurality of tracks wherein each track comprises a plurality of data regions interspersed between servo wedges. The servo wedges comprise a servo synch mark field including a servo synch mark (SSM) and a track identification field including a track identifier (TKID). The TKID is encoded in accordance with a self-clocking encoding algorithm whereas the SSM is encoded in accordance with a second algorithm that conflicts with the self-clocking encoding algorithm of the TKID. Thus, the SSM is prevented from being decoded as a portion of the TKID.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: August 23, 2005
    Assignee: Western Digital Technologies, Inc.
    Inventor: Hanan Kupferman
  • Patent number: 6922297
    Abstract: A method of encoding and decoding data involving the simultaneous application of pulse width modulation and pulse position modulation systems to data intended for storage on a magnetic disk medium.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: July 26, 2005
    Assignee: ProtoScience, Inc.
    Inventor: Kyle Kendrick Kirby
  • Patent number: 6920004
    Abstract: The present invention may be embodied in a method for adjusting a servo sector detection delay time between detection windows in a disk drive. The disk drive includes a magnetic disk with a spiral track having contiguous storage segments. Each storage segment has a servo sector and a predetermined number of uniformly-sized data sectors. The storage segments are written at a relatively constant linear density along the spiral track. In the method, the magnetic disk is rotated at a constant angular velocity. A servo sector is detected. An adjustable delay time is provided for opening a window to detect a next servo sector. The window is opened after the adjustable delay time expires. A next servo sector is detected in the window. A time between the servo sector detections is measured and the adjustable delay time is adjusted based on the measured time.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: July 19, 2005
    Assignee: Western Digital Technologies, Inc.
    Inventors: Raffi Codilian, Charles W. Frank, Jr.
  • Patent number: 6920003
    Abstract: A processor processes data read from plural data tracks on a data-containing medium. The data tracks include markers. The processor determines if markers are detected in a predetermined number of the tracks within a predetermined time interval starting with detection of a first marker. In first and second embodiments, the number equals all the read tracks and less than all the read tracks. In the second embodiment, the processor asserts the markers into the data associated with the tracks that do not have detected markers.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: July 19, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Rafel Jibry
  • Patent number: 6920006
    Abstract: A connection control circuit having the function of controlling connection and disconnection of an information storage apparatus to and from a transmission line is constructed such that it uses a comparator to determine whether or not the level of operating clock signal output from a controller of the information storage apparatus is within a predetermined range, and if it is detected that the level of the operating clock signal departs from the predetermined range, the connection control circuit outputs a control signal to a by-pass circuit to disconnect the information storage apparatus from the transmission line loop. This enables the information storage apparatus to be disconnected from the loop even if the controller of the information storage apparatus does not function normally due to an abnormality of the clock or an abnormality of the power supply.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: July 19, 2005
    Assignee: Fujitsu Limited
    Inventor: Makoto Chiba
  • Patent number: 6917485
    Abstract: An apparatus and method for dynamic head switch timing recalibration are provided. With the apparatus and method, a determination is made as to whether a difference in a reference head switch timing and the head switch timing at a later time is sufficient to meet a certain criteria. If the difference meets the criteria, a recalibration of the head switch timing is performed. For example, in a preferred embodiment, the criteria is a number of address mark (AM) misses during a head switch operation. If this predetermined number of AM misses is detected, then it is determined that a recalibration is necessary since the predetermined number of AM misses is an indication that the head switch timing has changed significantly from the reference head switch timing.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: July 12, 2005
    Assignee: Seagate Technology LLC
    Inventors: David Louis Schell, Chris Thomas Settje, Steven Alan Koldewyn, Kar Wei Koay, Abhay T. Kataria, Marinko Bosnich, Mike E. Baum
  • Patent number: 6909332
    Abstract: The present invention provides a method for tuning output drivers to an operating frequency based on settings used to tune other devices within the device such as a VCO. First the VCO within a PLL and clock circuit is tuned to the desired operating frequency. This operating frequency then corresponds to a discrete tuning setting. The discrete setting that causes the VCO to function at the operating frequency are then transferred to scaled amplifiers within output drivers. These drivers are then tuned to the operating frequency with these settings. This process eliminates the need to individually tune each output driver to function properly at the operating frequency.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: June 21, 2005
    Assignee: Broadcom, Corp.
    Inventors: Guangming Yin, Bo Zhang, Ichiro Fujimori
  • Patent number: 6909568
    Abstract: A servo writing device which writes servo data in each sector of each track of a magnetic disk, wherein servo data recorded positions of the tracks are mutually corresponded. The servo writing device includes a clock head for generating reference clock signals and a standard clock generating circuit generating standard clock signals, whose frequency is higher than that of the reference clock signals and which is not synchronized with the reference clock signals. The device further includes a start pulse generating circuit receiving the reference clock signals as clock signals and generating a start pulse corresponding to the servo data recorded position and a synchronizing circuit synchronizing the start pulse with the standard clock signals and generating a synchronizing-start pulse. In addition, the device also includes a pattern generating circuit receiving the standard clock signals as clock signals and generating the servo data synchronizing with the synchronizing-start pulse.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: June 21, 2005
    Assignee: Fujitsu Limited
    Inventors: Masanori Fukushi, Masaru Ishijima
  • Patent number: 6904539
    Abstract: A method of determining a transfer speed of an encoded data signal including a clock signal and a data signal is provided. First, the encoded data signal is decoded to generate a decoded clock signal. Then, a data transfer speed of the encoded data signal is determined using the decoded clock signal.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: June 7, 2005
    Assignee: Fujitsu Limited
    Inventor: Hirotaka Ueno
  • Patent number: 6900955
    Abstract: A data storage device includes a track layout having three data sections. A first spin pad having a first length is located between a first and second data section. A second spin pad having a length that is different from the first length is located between the second data section and a third data section. A method for determining the lengths of the spin pads is also provided.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: May 31, 2005
    Assignee: Seagate Technology LLC
    Inventor: Daniel J. Coonen
  • Patent number: 6898035
    Abstract: Improvements in placement of timing patterns in self-servowriting include correcting for systematic errors due to geometric effects. A correction is made for varying systematic errors, such as when the recording head has spatially separate read and write elements. Further, servopattern rotation due to residual or unmeasured systematic errors is reduced by using a once per revolution clock index derived from the motor drive current waveform or any other sensor. In one aspect of correcting for systematic errors in the writing of timing patterns on a storage medium of a storage device, a time interval between a trigger pattern written at a first radial position of the storage medium and a rotational index is measured. The rotational index is related to the rotational orientation of the storage medium with respect to a fixed frame of the storage device.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: May 24, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Timothy Joseph Chainer, Anthony Paul Praino, Mark Delorman Schultz, Bucknell Chapman Webb, Edward John Yarmchuk
  • Patent number: 6891689
    Abstract: In an apparatus for reading recorded data, the apparatus, a read signal is sampled from recorded data of a recording medium by synchronizing with a first clock signal. A sample value obtained by the sampling part is stored and also the sample value from the first storing part is retrieved by synchronizing a second clock signal different from the first clock signal and maximum likelihood data is detected by processing the sample value in accordance with a predetermined algorithm. The recorded data is read based on the detected data.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: May 10, 2005
    Assignee: Fujitsu Limited
    Inventors: Masakazu Taguchi, Akihiro Itakura, Akiyoshi Uchida
  • Patent number: 6882486
    Abstract: A disk drive is disclosed comprising a plurality of disk surfaces and a plurality of respective heads actuated radially over the disk surfaces. Each disk surface comprises a plurality of tracks, each track comprising a plurality of data sectors and a plurality of embedded servo sectors, each embedded servo sector comprising a servo sync mark for synchronizing to the embedded servo sector. When the disk drive switches heads, a detection window for detecting the servo sync mark is opened early. An asynchronous gain control algorithm prevents a gain control system from diverging while reading an area of the disk surface preceding the servo sync mark, and a synchronous gain control algorithm maintains a proper gain of the read signal while reading the servo sync mark.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: April 19, 2005
    Assignee: Western Digital Technologies, Inc.
    Inventor: Hanan Kupferman
  • Patent number: 6882487
    Abstract: An apparatus and method for compensating for variation in sample rate in a disc drive having a rotating disc and a head that is positioned over the rotating disc is provided. The disc includes at least one track that has multiple consecutive sectors. A sample rate value between timing marks of each pair of consecutive sectors of the multiple consecutive sectors is computed to obtain a sequence of sample rate values. A sequence of timing error values is computed as a function of the sequence of sample rate values and a nominal sample rate value. Data related to the sequence of timing error values is utilized to compensate for variation in sample rate values.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: April 19, 2005
    Assignee: Seagate Technology LLC
    Inventors: Reed D. Hanson, Timothy F. Ellis, Dustin M. Cvancara, Nathaniel B. Wilson
  • Patent number: 6873484
    Abstract: There is disclosed a disk drive of a perpendicular magnetic recording system including a write compensator against magnetic disturbance. The write compensator estimates strength and direction of the magnetic disturbance based on the detection result of the magnetic disturbance from a magnetic sensor during a write operation. The write compensator executes write compensation in accordance with the direction of the magnetic disturbance and the recording magnetization direction on a disk medium.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: March 29, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masaru Atsumi
  • Patent number: 6873483
    Abstract: A read clock circuit for a disk drive includes a phase-locked loop/voltage controlled oscillator (VFO/PLL) and a frequency synthesizer. The VFO/PLL receives a servo sector transition signal that is related to detected transitions in a servo sector field of a magnetic recording disk, and outputs a servo frequency signal that is synchronous to the servo sector transition signal. The frequency synthesizer receives the servo frequency signal and generates the read clock signal that is synchronous with the servo frequency signal. In a banded recording disk drive the frequency synthesizer generates a unique read clock signal for each data band.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: March 29, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Steven R. Hetzler, William John Kabelac
  • Patent number: 6870698
    Abstract: A method and apparatus for allowing communication between a stationary circuit and circuitry in motion with respect to the stationary circuit is presented. Communication is achieved and verified by transmitting a clock signal and a control signal in synchronization with the clock signal over separate clock and control transformer channels between the stationary circuit and the moving circuitry.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: March 22, 2005
    Assignee: EXAByte Corp.
    Inventors: Michael Blatchley, Mark A. Hennecken
  • Patent number: 6859903
    Abstract: Bits in a first binary signal are compared with one or more first binary patterns. For each first binary patterns, if the comparison meets a predetermined criteria for the first binary pattern, than an evaluation value is calculated for that first binary pattern and for one or more secondary binary patterns that correspond to that first binary pattern, the evaluation value indicating the likelihood that each respective binary pattern corresponds with a portion of a run length limited binary signal represented by the bits of the first binary signal. The first binary signal is corrected to correspond with the binary pattern that was determined most likely to be a portion of the run length limited binary signal.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: February 22, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Charalampos Pozidis
  • Patent number: 6853509
    Abstract: A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value without comparing the received sample value to the potential sample values. According to one embodiment, the nearest ideal sample value is selected based on the received sample value and values of three consecutive samples. According to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of an immediately preceding sample. According yet to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of a previous sample. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: February 8, 2005
    Assignee: Infineon Technologies North America Corp.
    Inventors: Jonathan Ashley, Stephen J. Franck, Razmik Karabed
  • Patent number: 6839194
    Abstract: A servo mark detector detects a servo mark from each servo information item detected by the servo detector. A counter measures a time period each time a servo mark is detected, thereby measuring a servo interval. A correction circuit corrects a time period T2 on the basis of the measured servo interval and an ideal servo interval. A determination circuit determines which one of the time period T2 and a time period T2? obtained by correcting the time period T2 should be used. A servo-sector-pulse-generating unit generates a servo sector pulse a time period T1 after the detection of each servo mark, and generates a pseudo servo sector pulse when the time period determined by the determination circuit has elapsed after the detection of each servo mark, if the next servo mark is not detected during the determined time period.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: January 4, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takahiro Koyanagi
  • Patent number: 6839195
    Abstract: A method and apparatus are provided for implementing improved phase alignment in a direct access storage device (DASD). A reference clock input is received for providing a system clock. Locking to a synchronization field of a readback signal is performed by adjusting the phase of the system clock. A timing mark is detected and then the adjusted phase of the system clock is held. Responsive to the detected timing mark, a reference delay of a predefined number and fraction of system clock periods is identified. At an end of the reference delay, a write circuit accepts data and generates write signals for a write operation. The phase of the system clock is adjusted corresponding to a predefined fractional delay and is used to run a programmable counter that counts the predefined number of system clock periods corresponding to the reference delay.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: January 4, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Timothy Joseph Chainer, Jonathan Darrel Coker, David Timothy Flynn, Mark Delorman Schultz
  • Publication number: 20040264026
    Abstract: The invention is directed to patterned magnetic media for use in magnetic recording and data storage, and various encoding techniques that can be used to magnetically encode data on the patterned media. For example, a patterned magnetic recording medium can include a first set of surface variations and a second set of surface variations. The medium can be conditioned to magnetically expose the surface variations relative to areas between the respective surface variations. Detection of the surface variations in the first set can allow for synchronization of a magnetic drive to the medium. Following such synchronization, the magnetic drive can selectively apply magnetic fields to a second set of surface variations of the patterned magnetic medium to encode data on the patterned magnetic medium.
    Type: Application
    Filed: June 25, 2003
    Publication date: December 30, 2004
    Applicant: Imation Corp.
    Inventor: Garry R. Lundstrom
  • Patent number: 6833971
    Abstract: Disclosed is a digital VFO device which comprises a plurality of VFO circuits 12 and 14; synchronous counters 12a and 14a installed in each VFO circuits 12 and 14; and an adjusting circuit 110 selecting one of the VFO circuits 12 and 14 based on signals 113 and 114 representing the peak shift state of an input data 11 output from each VFO circuits. Correcting instruction signals 16 and 17 are generated to correct the synchronous counter of the other VFO circuits by substituting the counter value of the synchronous counter of the VFO circuit selected by the adjusting circuit 110 for the synchronous counter of the other VFO circuits.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: December 21, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Tomokazu Kondo
  • Publication number: 20040252395
    Abstract: A disc drive system, such as a magnetic or optical recording and/or playback system, for low-data rate applications implements one or more circuit operations, such as read signal detection and related servo functions, as software-based digital signal processing steps in a dedicated software-based processor. The drive system incorporates increased buffering, modified input sample processing techniques, multiplexing of processing functions, and modified automatic gain control techniques to allow circuit operations to be performed with software-based digital signal processing techniques.
    Type: Application
    Filed: June 14, 2004
    Publication date: December 16, 2004
    Inventors: Carl F. Elliott, Ross S. Wilson, Jeffrey M. Wisted
  • Patent number: 6826002
    Abstract: A measuring apparatus and a method is provided for measuring performance characteristics of a recording unit including a circular recording medium on which one track is divided into a plurality of sectors, where the recording unit records a data signal on the recording medium by using a magnetic head. A mechanism device including micro actuator and a piezo-electric stage moves the magnetic head in a direction substantially perpendicular to a circumferential direction of the recording medium in response to a control signal. The measuring apparatus writes a write signal for respective sectors while moving the magnetic head by outputting the control signal having different levels corresponding to respective sectors to the mechanism device, and reads out the written write signal, then measuring a read-out write signal as a read signal relative to a position of the magnetic head.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: November 30, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Yoshiyuki Yanagimoto
  • Publication number: 20040228021
    Abstract: A hard disk controller generates a read gate signal RG which has a predefined read start time and read end time set based on a sector pulse as a reference. A read data demodulation unit reproduces read data from a readout signal of medium by executing a read based on the read gate signal RG. A read gate optimization unit detects errors of read data demodulated by the data demodulation unit while varying the read start time and the read end time of the read gate signal RG, determines the read start time and the read end time at which the detected errors will be minimized and sets these in the read gate generation unit.
    Type: Application
    Filed: February 11, 2004
    Publication date: November 18, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Yuichiro Yamazaki
  • Patent number: 6819512
    Abstract: A method of encoding and decoding data involving the simultaneous application of pulse amplitude modulation, pulse width modulation, and pulse position modulation systems to data intended for storage on a magnetic disk medium.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: November 16, 2004
    Assignee: ProtoScience, Inc.
    Inventor: Kyle K. Kirby
  • Patent number: 6819514
    Abstract: A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: November 16, 2004
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Li Du, William G. Bliss, David E. Reed, Mark S. Spurbeck
  • Patent number: 6816328
    Abstract: Systems and methods for reading information stored on a magnetic medium are described. Data symbols are generated from a signal encoded at a baud rate with data including an acquisition preamble defining an acquisition frequency and an acquisition phase. The system includes an inventive dual loop synchronizer that is optimized to improve the operating efficiency and reduce the overall latency of the read channel. In one aspect, the dual loop synchronizer includes a frequency synchronization loop, a signal sampler, an interpolator, and a phase synchronization loop. The frequency synchronization loop is configured to generate a sampling clock synchronized approximately to the acquisition frequency and the acquisition phase of the encoded data signal. The signal sampler is coupled to the frequency synchronization loop and is configured to sample the encoded data signal in response to the sampling clock to produce a plurality of data samples.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: November 9, 2004
    Assignee: Infineon Technologies North America Corp.
    Inventor: James Wilson Rae
  • Patent number: 6813108
    Abstract: Techniques for detecting control data, such as servo data, from input or incoming data read from a magnetic recording medium in the presence of radial incoherence are provided. More specifically, the techniques employ multiple (i.e., two or more) data detectors for choosing between multiple sampling phases associated with the input data read from the magnetic recording medium. In the context of servo data detection, such techniques offer several orders of magnitude in performance improvement in detecting SAM and Gray data in the presence of RI and may advantageously be employed in a read channel integrated circuit. Furthermore, such techniques may be applied to any data encoding system.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: November 2, 2004
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Pervez Mirza Aziz
  • Publication number: 20040201913
    Abstract: An apparatus, method, and system for writing data to a hard disk drive synchronous with an apparent disk speed. The apparatus, method, and system has a phase-locked loop (PLL) to generate am output clock signal, wherein a clock interpolator responsive to phase rotation control is in the PLL feedback loop. The phase rotation control is proportional to the apparent disk speed, and the PLL output clock signal is also proportional to the apparent disk speed. A second clock interpolator further modifies the PLL output clock signal to provide pre-compensation control.
    Type: Application
    Filed: July 28, 2003
    Publication date: October 14, 2004
    Applicant: Marvell International Ltd.
    Inventor: Pantas Sutardja
  • Patent number: 6804071
    Abstract: Digital data recording apparatus includes a modulator for modulating a recording clock by a recording data. A reference voltage and a reference current in signal processing are set based on a reference clock having a multiple cycle of the cycle of the recording clock when the reference clock is supplied via a rotary transformer. A demodulator demodulates a modulation signal supplied via the rotary transformer to produce a demodulation signal, from which a recording signal is generated for recording on a recording medium. The demodulator obtains a modulation signal and an inverted modulation signal from which first and second saw-tooth wave signals are produced when the reference current is supplied. A mixer mixes the first and second saw-tooth wave signals, and the demodulation signal is obtained, based on the mixer output and the reference voltage.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: October 12, 2004
    Assignee: Sony Corporation
    Inventors: Mamoru Mizukami, Kaoru Urata
  • Patent number: 6804074
    Abstract: A PLL circuit functioning as a clock recovery circuit in a tape recording and playback apparatus employing the PRML method has a level determining circuit for detecting that head output level (signal level) is at or lower than a certain level during track crossing for a high-speed search, and effects a hold on a loop filter according to a level determination output to thereby hold PLL operation, whereby the PLL behavior is not disturbed by a noise component occurring during track crossing. Thus, it is possible to stabilize search operation and increase the design margin.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: October 12, 2004
    Assignee: Sony Corporation
    Inventors: Norio Shoji, Junkichi Sugita, Kimimasa Senba, Toshihiro Kawakubo
  • Patent number: 6801378
    Abstract: To make the most of the storage capacity of a recording medium for data recording and reproduction, data is provisionally stored in a memory at a second data rate DL2, then data is read from the memory at a first data rate, and the recording medium is driven intermittently according to a change in data rate.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: October 5, 2004
    Assignee: Sony Corporation
    Inventors: Mitsuyasu Amano, Masahiko Nagumo
  • Publication number: 20040190184
    Abstract: A magnetic disk apparatus capable of generating a reference clock signal without using an external reference by writing a clock track only once using a head of the magnetic disk apparatus even if the head is of a read/write element separation type. Using the head of the magnetic disk apparatus, a clock track is recorded only once and the recorded clock track is played back to measure the total number of clock bits in one revolution. A time interval between servo sectors is determined by dividing the total number of clock bits thus measured by the number of servo sectors. By using as a timing reference the clock bits produced by playing back the clock track, the servo sectors are recorded in such a manner that they are located at the determined interval.
    Type: Application
    Filed: August 13, 2003
    Publication date: September 30, 2004
    Inventors: Kei Yasuna, Yohichi Kusagaya, Takashi Yamaguchi, Makoto Horisaki, Kenichiro Sugiyama
  • Publication number: 20040190174
    Abstract: Head-to-head variations in the head gap distance between write and read heads is compensated by measuring the head gap distance in each head by writing and reading a predetermined unique pattern, and compensating the timing to start the data writing by changing it in a head-to-head manner based on a time gap that corresponds to the measured head gap distance in each head. This allows data to be written at a desired physical position regardless of the variation of the head gap distance, thereby allowing formatting efficiency to be improved.
    Type: Application
    Filed: September 30, 2003
    Publication date: September 30, 2004
    Applicant: Hitachi Global Storage Technologies Japan, Ltd.
    Inventors: Hitoshi Yoshida, Yasuyuki Ito, Kiyotada Itou
  • Patent number: 6798594
    Abstract: A transducer position sensing system in a disc drive to take frequent data measurements from micro-servo sectors on the disc and to interpret the information to predict recording failures. The disc drive is formatted with many small or micro-servo sectors containing, among other things, a servo address mark, encoded disc location information, and radial track position information. The sensing system frequently retrieves this information through the transducer, compares the measurements to expected values, and given unexpected measurements predicts errors. The time elapsed between the passing of servo address marks can be used to predict adjacent sector overwrites. The radial track position information can be used to predict off-track write errors. The radial track position signal amplitude can be used to predict the transducer moving too far from the disc, resulting in skip write errors.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: September 28, 2004
    Assignee: Seagate Technology LLC
    Inventor: Karl Arnold Belser
  • Patent number: 6798592
    Abstract: A method and an apparatus for reducing position error signal in a disk drive, which has an actuator and a magnetic medium, write the servo tracks with a servo track writer using a varying increment. The servo tracks are written after the servo track writer incrementally moves the actuator by a non-constant amount. The non-constant incrementing enables a servo track writing operation to write servo tracks that are at least as wide near the outer circumference as they are near the zero skew position or near the inner circumference.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: September 28, 2004
    Assignee: Western Digital Technologies, Inc.
    Inventors: Raffi Codilian, Joseph M. Viglione
  • Publication number: 20040179287
    Abstract: An information recording/reading apparatus employs a preamble to reproduce a clock used when recording information in a recording medium and reads the information out of the recording medium at a timing synchronized with a read signal. The preamble is split and recorded by replacing a middle portion of the preamble with data and a sync byte. While a first buffer is employed to delay signal data read out of the recording medium, a frequency offset detector detects a frequency offset using the split preamble.
    Type: Application
    Filed: February 11, 2004
    Publication date: September 16, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Masaru Sawada, Toshihiko Morita, Takao Sugawara
  • Publication number: 20040179286
    Abstract: An apparatus for and a method of dummy writing in a data storage system. A dummy write is executed before executing a write mode and a write head pole tip is thermally fully expanded to reduce bit error rate occurring in the early writing. The dummy write is executed in inter sector gaps before the write mode is executed in the data storage system to thermally expand the head pole tip until the head pole tip is saturated. A level of a signal written in a sector in an initial write mode is lowered to prevent errors from occurring.
    Type: Application
    Filed: September 5, 2002
    Publication date: September 16, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Won-choul Yang
  • Patent number: 6791776
    Abstract: In order to generate a sampling clock having a higher accuracy, a synchronous signal generating circuit is provided with a phase error detector, detecting a phase error of a read out signal digitized on the basis of FDTS algorithm, and a VCO, controlling an oscillation frequency on the basis of a phase error detected by the phase error detector, to generate a synchronous signal by the VCO. On the basis of the synchronous signal generated by the synchronous signal generating circuit, an ADC digitizes the read out signal. The digitized read out signal is then converted to binary data by a detection circuit.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: September 14, 2004
    Assignees: Hitachi, Ltd., Hitachi Video and Information System, Inc.
    Inventors: Takatoshi Kato, Takushi Nishiya, Hideyuki Yamakawa, Takashi Nara, Nobuaki Nakai, Hiroshi Ide, Shintaro Suzumura, Terumi Takashi
  • Patent number: 6791777
    Abstract: A data discriminating unit includes a data discriminator and a sync signal discriminator. A data sync signal is detected for the bit string discriminated from the output of the sync signal discriminator, and the data is demodulated for the bit string discriminated from the output of the data discriminator, thereby optimizing the signal to a form suitable for discrimination and detection of the data sync signal and demodulation for data reproduction. As a result, the detection performance of the data sync signal can be improved while maintaining the data discrimination performance. A Viterbi decoder is used for discrimination by the data discriminator and the sync signal discriminator for the optimization thereby to optimize the number of states, the number of paths for state transition and the path memory length. A signal having no continuous inversions of the recording data is used as the data sync signal.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: September 14, 2004
    Assignee: Hitachi Global Storage Technologies Japan, Ltd.
    Inventors: Yoshiju Watanabe, Terumi Takashi
  • Patent number: 6791781
    Abstract: A method and apparatus for providing linear position (LPOS) estimations. If valid LPOS data may be detected from the tape, then a first method for LPOS estimation is performed using the Hall effect sensors. If valid LPOS data may not be detected from the tape, then an error recovery procedure (ERP) is invoked so that a second method for LPOS estimation is used to provide accurate LPOS information which is synchronized to a validly detected LPOS from tape within about 1 meter prior to the desired data record.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: September 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Nhan X. Bui, John Alexander Koski, Akimitsu Sasaki, Keisuke Tanaka, Kazuhiro Tsuruta
  • Patent number: 6788481
    Abstract: A nonlinear transition shift (NLTS) measurement procedure for read/write heads employing a giant magnetoresistive (GMR) merged heads. The method of this invention includes the pulse-shape distortion effects on recording nonlinearity, which can significantly affect the existing theoretical formulae for calculating nonlinearity correction factor from measured partial erasure values, and second-order approximation of equation of NLTS and nonlinearity correction factor. Transition broadening effects (TBE) and partial erasure (PE) are incorporated in the NLTS measurement procedure to permit accurate isolation of the NLTS from the unrelated TBE/PE and GMR nonlinear transfer characteristic (NTC). First, a fifth harmonic elimination (5HE) test is performed at bit period T to measure a first nonlinearity value X.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: September 7, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter Chen-I Fang, Xiangjun Feng, Terence Tin-Lok Lam, Zhong-Heng Lin