Abstract: In accordance with an embodiment, a semiconductor device includes: an n-doped region disposed over an insulating layer; a p-doped region disposed over the insulating layer adjacent to the n-doped region, where an interface between the n-doped region and the p-doped region form a first diode junction; a plurality of segmented p-type anode regions disposed over the insulating layer, each of the plurality of segmented p-type anode regions being surrounded by the n-doped region, where a doping concentration of the plurality of segmented p-type anode regions is greater than a doping concentration of the p-doped region; and a plurality of segmented n-type cathode regions disposed over the insulating layer. Each of the plurality of segmented n-type cathode regions are surrounded by the p-doped region, where a doping concentration of the plurality of segmented n-type cathode regions is greater than a doping concentration of the n-doped region.

Abstract: An output circuit included in an integrated circuit may employ multiple protection circuits to protect driver devices from damage during an electrostatic discharge event. One protection circuit clamps a signal port to a ground supply node upon detection of the electrostatic discharge event. Another protection circuit increases the voltage level of a control terminal to one of the driver devices during the electrostatic discharge event to reduce the voltage across the driver device and prevent damage to the device.

Abstract: The invention relates to a protection for a semi-conductor switch against over voltages. A capacitive element is provided on an inlet connection of the semi-conductor switch. The load amount, which flows into said capacitive element, is integrated in order to trigger a protection function when a threshold value is exceeded.

Abstract: Disclosed are embodiments of a semiconductor structure that includes a semiconductor-controlled rectifier (e.g., for electrostatic discharge (ESD) protection). The SCR can be readily integrated into advanced semiconductor-on-insulator processing technology platforms (e.g., a fully depleted silicon-on-insulator (FDSOI) processing technology platform) that employ hybrid semiconductor substrates (i.e., semiconductor substrates with both bulk semiconductor and semiconductor-on-insulator regions) and is configured with an on-Pwell semiconductor-on-insulator gate structure that is tied to an anode terminal to effectively lower the SCR trigger voltage. To further lower the trigger voltage of the SCR, the Pwell on which the gate structure sits may be made narrower than the gate structure and/or the doping profile of the Pwell on which the gate structure sits may be graded (e.g., P to P? closer to insulator layer).

Abstract: A multi-stage surge protection device protects against complex, time-variant voltage transients, including those resulting from a high-altitude nuclear electromagnetic pulse or a solar coronal mass ejection. The transient voltage suppressor limits the let-through voltage to a clamping level and provides indication to the crowbar circuit when it is no longer able to do so. Once the clamping level is no longer able to be maintained, the crowbar circuit draws enough current to trip an upstream protective device, such as a breaker or fuse. A low-pass filter can be added to significantly lower the let-through voltage of the device for short-duration pulses, and help to spread the energy to more effectively utilize the transient voltage suppressor.

Abstract: The present invention is a spark gap protection capable of integrating into multiple layer semiconductor substrate packaging. The initial gap in the spark gap is solid and it can be converted into air, meaning gaseous, and the air gap is achieved by having the gap initially be filled with a solid and then running a voltage through the spark gap so that the gap explodes and the solid is replaced by an air cavity.

Abstract: A control system includes a secondary battery protection apparatus and a device. The secondary battery protection apparatus includes one or more monitoring terminals each provided in a path different from power paths, each monitoring terminal being operable for monitoring a potential at a negative electrode of a given secondary battery cell among a plurality of the secondary battery cells. The secondary battery protection apparatus includes one or more internal switches each of which is provided in an internal line between the negative electrode of a given secondary battery cell and a given monitoring terminal. The device includes a balance control circuit that adjusts, based on potentials monitored by the monitoring terminals, a current flowing into a line path that includes a corresponding internal line. The balance control circuit controls balance among the cell voltages for the secondary battery cells, based on the adjusted current.

Abstract: A semiconductor device includes a through-silicon via (TSV) in a TSV zone in a substrate and the TSV extends through the substrate; an ESD cell proximal to a first end of the TSV and in contact with the TSV zone, the ESD cell including a set of diodes electrically connected in parallel to each other; an antenna pad electrically connected to a second end of the TSV; and an antenna electrically connected to the antenna pad and extending in a first direction, the first direction is parallel to a major axis of the TSV. The semiconductor device includes a conductive pillar extending parallel to the TSV at a same side of the substrate as the antenna pad, wherein a first end of the conductive pillar electrically connects to the antenna pad, and a second end of the conductive pillar electrically connects to the set of diodes of the ESD cell.

Abstract: Electrostatic discharge protection for high speed transceiver interface is disclosed. In one aspect, an electrical overstress (EOS) protection device includes an anode terminal and a cathode terminal, a silicon controlled rectifier, a second NPN bipolar transistor including a base connected to the anode terminal and an emitter connected to an emitter of the first PNP bipolar transistor, and a second PNP bipolar transistor including an emitter connected to an emitter of the second NPN bipolar transistor and a base connected to a base of the first PNP bipolar transistor. Two or more paths for current conduction are present during a positive overstress transient that increases a voltage of the anode terminal relative to the cathode terminal, including a first path through the silicon controlled rectifier and a second path through the second NPN bipolar transistor and the second PNP bipolar transistor.

Abstract: A surge protection apparatus is disclosed. The surge protection apparatus includes a housing; electronics contained in the housing; and a plurality of metal tabs electrically connected to the electronics, the metal tabs being configured to connect to a terminal block of a relay panel in a substation, the metal tabs electrically connecting the terminal block to the electronics to provide EMP surge protection to the relay panel.

Abstract: Described is an apparatus which comprises: a plurality of transistors coupled to an input power supply and to a load; a first comparator with a first node coupled to the load, and a second node coupled to a first reference; a second comparator with a first node coupled to the load, and a second node coupled to a second reference, the second reference being different from the first reference; and a logic unit to receive output of the first comparator and output of the second comparator, the logic unit to turn on or off transistors of the plurality of transistors according to outputs of the first and second comparators.

Abstract: A motor-drive system may include a rectifier, a metal-oxide varistor (MOV) assembly, and an inverter. The rectifier may generate a direct current (DC) voltage based on a first voltage received from at least one supply voltage line coupled to a voltage source. The MOV assembly may include at least two metal-oxide varistors (MOVs) respectively coupled to the at least one supply voltage lines. The MOV assembly may couple between the voltage source and the rectifier. The motor-drive system may also include a permanently-installed jumper to couple at least one MOV of the at least two MOVs of the MOV assembly to a system ground. The inverter of the motor-drive system may convert the DC voltage to an alternating current (AC) voltage, which may be provided to a load of the motor-drive system.

Abstract: An electronic device and an antenna feeding device are provided. The electronic device includes a metal housing, a radiation element, a substrate, a grounding element and an electrostatic protection element. The antenna feeding device includes a substrate, a grounding element, and an electrostatic protection element. The radiation element is arranged along the edge of the electronic device, and the radiation element and the metal housing are separated from each other. The substrate is arranged on the metal housing. The substrate includes a feeding portion and a grounding portion, and the feeding portion is coupled to the radiating element. The grounding portion is coupled to the metal housing. The grounding element is electrically connected to the metal housing, and the grounding element is coupled to the grounding portion. The electrostatic protection element is electrically connected between the feeding portion and the grounding portion.

Abstract: An electrostatic discharge clamp is shown, which includes a clamping circuit, a driving circuit, a capacitor and resistor network, and a bias circuit. The clamping circuit has a plurality of transistors connected in a cascode configuration. The driving circuit is coupled to the gates of the transistors of the clamping circuit. The capacitor and resistor network introduces an RC delay in response to an electrostatic discharge event to control the driving circuit to turn on the transistors of the clamping circuit for electrostatic discharging. The bias circuit biases the driving circuit to turn off the transistors of the clamping circuit when the capacitor and resistor network does not detect the electrostatic discharge event.

Abstract: An electrical over stress protection device is provided. A detection circuit detects an input voltage from a pad, provides a first discharge path when the input voltage is higher than a preset voltage, and provides a turn-on voltage to a discharge protection circuit to control the discharge protection circuit to provide at least one second discharge path.

Abstract: An integrated circuit with a hot-plug protection circuit includes input pins and an output pin. The input pins are electrically coupled to a common node in the hot-plug protection circuit via respective electrical connections. The integrated circuit includes clamping circuitry coupled between the common node and the output pin, the clamping circuitry activatable as a result of a voltage spike applied across the clamping circuitry. The plurality of electrical connections and the clamping circuitry provide respective current discharge paths between the input pins in the input pins and the output pin, the respective current discharge paths configured to become conductive as a result of a voltage spike applied to any of the input pins in the plurality of input pins being transferred to the common node via the respective electrical connection in the plurality of electrical connections electrically coupling said any of said input pins to the common node.

Abstract: The present disclosure provides an electrostatic discharge protection circuit, a chip including a first pad and a second pad. The electrostatic discharge protection circuit includes a trigger unit and a discharge transistor. The trigger unit is connected between the first pad and the second pad, provided with a trigger terminal, and configured to generate a trigger signal when there is an electrostatic pulse on the first pad. The first pad is connected to a first voltage, the second pad is connected to a second voltage, and the first voltage is greater than the second voltage. The discharge transistor has a first terminal connected to the first pad, and a second terminal connected to the second pad, and discharges an electrostatic charge to the second pad when triggered by the trigger signal.

Abstract: A new and improved intrinsically safe barrier (“ISB”) provides advantages in connection with installation of field equipment in hazardous areas including Division 2/Zone 2 areas. In one embodiment the new ISB provides a pluggable/unpluggable ISB for use with a receiving terminal base adapted for individual field mounting and alternatively for use with a circuit mount terminal base to permit direct mounting of ISB on circuit boards. A highly effective heat sink design and potting material allows for heat dissipation to allow the ISB to serve a wider range of applications.

Abstract: A wind turbine (10) is disclosed having a hub (14) with electrical power therein and at least one blade (20) attached to the hub. The blade (20) has a blade root (21), a blade tip (26) and a down-wire (30) for the conduction of lightning current to the ground. The wind turbine (10) further has a blade electrical system (99) that takes electrical power from the hub (14) and transmits electrical power into the blade (20) to at least one area located between the blade root (21) and the blade tip (26). The blade electrical system (99) if formed by a power-transfer unit (100) having a power-driver unit (110), a power-conditioner unit (130) and a dielectric (120) separating the power-driver unit (110) and the power-conditioner unit (130). The power-driver unit (110) receives electrical power from the hub (14) and transmit the electrical power through the dielectric (120) to the power-conditioner unit (130).

Abstract: An apparatus includes a controller configured to generate a PWM signal for controlling a power switch of a forward converter, a bias switch and a bias capacitor connected in series and coupled to a bias winding of the forward converter, and a comparator having a first input connected to the bias capacitor, a second input connected to a predetermined reference and an output configured to generate a signal for controlling the bias switch to allow a magnetizing current from the bias winding to charge the bias capacitor when a voltage across the bias capacitor is less than the predetermined reference.

Abstract: An Electrostatic Discharge (ESD) protection circuit includes a first discharge path and a second discharge path. The first discharge path is located between a first potential terminal and a second potential terminal. The second discharge path is located between the first potential terminal and the second potential terminal, and is connected to the first discharge path in parallel. The first discharge path and the second discharge path are used for discharging electrostatic charges. At least one of the first discharge path and the second discharge path includes a Silicon Controlled Rectifier (SCR).

Abstract: An electro-static discharge (ESD) protection circuit is electrically connected to a first pad and a second pad. The ESD protection circuit includes an ESD transistor having a control terminal, a first terminal electrically connected to the first pad, a second terminal electrically connected to the second pad, and a substrate end; and an electro-static pulse detection circuit having an upper terminal electrically connected to the first pad, a lower terminal electrically connected to the second pad, and an output terminal electrically connected to the control terminal and the substrate end of the ESD transistor.

Abstract: Devices are disclosed. A device may include a source configured to couple to a number of memory cells. The device may also include at least one transistor coupled between the source and a ground voltage. Further, the device may include an antifuse coupled between the at least one transistor and the ground voltage. Methods and systems are also disclosed.

Abstract: A detector circuit included in a computer system filters the voltage level of a power supply node to generate filtered signals. The detector circuit either compares the filtered signals or samples the filtered signal and compares the samples to reference levels to detect changes in the voltage level of the power supply node that exceed thresholds for magnitude and duration. A control circuit included in the computer system generates, using the glitch signal, control signals that can be used to change operating parameters of functional circuits included in the computer system.

Abstract: A property power system can include multiple photovoltaic (PV) panels to generate DC electrical energy from solar energy and a first power conversion module to convert between DC and AC electrical energy and to control aspects of each PV panel. The property power system can have a group of battery blades to store electrical energy and another power conversion module to convert between DC and AC electrical energy and to control aspects of each battery blade. The property power system can have a multiple synchronization interfaces configured to aggregate the AC electrical energy of each of the PV panels/battery blades, respectively, and to control delivery of the aggregated AC electrical energy. The property power system can include a grid circuit disconnector to prevent back-feed of power during grid outage condition while the PV panels or the group of battery blades is powering an electrical load center of the property.

Abstract: The present invention relates to an electrostatic protection circuit for protecting an internal circuit. The electrostatic protection circuit includes: a first circuit connected between a power pad and an input pad and configured to discharge a first electrostatic current; a second circuit connected between the input pad and a ground pad and configured to discharge a second electrostatic current; a third circuit connected between the power pad and the input pad and configured to discharge a third electrostatic current; a fourth circuit connected between the power pad and the ground pad and configured to discharge a fourth electrostatic current; a fifth circuit connected between the input pad and the ground pad and configured to discharge a fifth electrostatic current; and a sixth circuit connected between the ground pad and the power pad and configured to discharge a sixth electrostatic current.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a first substrate, a capacitor within the first substrate, a diode structure within the first substrate adjacent the capacitor, and a first interconnect structure over the capacitor and the diode structure. A first conductive via of the first interconnect structure electrically couples the capacitor to the diode structure.

Abstract: A method of administering insulin includes receiving blood glucose measurements of a patient at a data processing device from a glucometer. Each blood glucose measurement is separated by a time interval and includes a blood glucose time associated with a time of measuring the blood glucose measurement. The method also includes receiving patient information at the data processing device and selecting a subcutaneous insulin treatment for tube-fed patients from a collection of subcutaneous insulin treatments. The selection is based on the blood glucose measurements and the patient information. The subcutaneous insulin treatment program for tube-fed patients determines recommended insulin doses based on the blood glucose times. The method also includes executing, using the data processing device, the selected subcutaneous insulin treatment.

Abstract: The present application provides a surge protection circuit, a lightning protector and an electronic device. The surge protection circuit includes a first protection module, the first protection module comprises a first protection sub-module and a second protection sub-module electrically connected to the first protection sub-module. The first protection sub-module is used for surge protection during a first surge input, the second protection sub-module is used for surge protection during a second surge input protection, and the second surge strength is higher than the strength of the first surge. The surge protection circuit, lightning protection and electronic equipment could provide different levels of surge protection for different levels of surge and could greatly enhance the sensitivity of lightning protection.

Abstract: A buck converter includes a quick response circuit, a compensator coupled to an output node, an interleaving logic circuit coupled to the compensator, a plurality of on-time generators, a plurality of OR gates coupled to the corresponding on-time generator, a plurality of power stages coupled to the corresponding OR gates, a plurality of inductors and an output capacitor. Each on-time generator is coupled to the interleaving logic circuit, an input node and the output node. The quick response circuit includes a voltage droop sensor coupled to the output node, a load frequency sensor coupled to the output node, a quick response signal generator coupled to the voltage droop sensor, a maximum quick response signal generator coupled to the voltage droop sensor and the load frequency sensor, an AND gate coupled to the quick response signal generator, the maximum quick response signal generator and the plurality of OR gates.

Abstract: A device includes an electrostatic discharge (ESD) protection switch and an ESD driver. The ESD driver is configured to receive a first voltage at a first terminal and receive a second voltage at a second terminal and includes a first trigger circuit and a first resistor. The first trigger circuit includes a first input terminal and a first output terminal. The first input terminal is configured to receive the first voltage. The first resistor is coupled between the first output terminal and the second terminal. When the first voltage received at the first terminal is a first overvoltage and a voltage difference between the first voltage and the second voltage is higher than a first voltage threshold, the ESD driver outputs a first trigger signal to turn on the ESD protection switch.

Abstract: In an integrated circuit (IC) fabrication process, devices or sub-circuits are fabricated in respective first and second electrical isolation regions. A back-to-back (B2B) diodes sub-circuit is fabricated in a third electrical isolation region, which includes a first diode whose cathode is connected with a first terminal and whose anode is connected with a second terminal, and a second diode whose anode is connected with the first terminal and whose cathode is connected with the second terminal. Electrostatic discharge protection is provided to the first and second electrical isolation regions by electrically connecting the first terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the first device or sub-circuit and the second terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the second device or sub-circuit. Thereafter, the first device or sub-circuit and the second device or sub-circuit are electrically connected.

Abstract: A system may include a power source, a power converter having an input coupled to the power source and an output for supplying electrical energy to a load, and a control circuit for controlling operation of the power converter. The control circuit may include a first feedback control subsystem configured to monitor an output voltage present at the output of the power converter and regulate the output voltage at or about a predetermined regulated voltage level in a normal mode of operation of the power converter and a second feedback control subsystem configured to monitor an input voltage present between the power source and the input of the power converter and responsive to the input voltage decreasing below a predetermined minimum voltage level, causing the power converter to operate in a protection mode of operation in order to maintain the input voltage at or about the predetermined minimum voltage level.

Abstract: A protection circuit including an inrush current detector operable to detect an inrush current from a DC link is disclosed herein. The inrush current detector includes a transistor switch that is turned on in normal operation of the protection circuit. The protection circuit operates to detect when the voltage across the transistor switch exceeds a threshold voltage in response to a detected inrush current, and in response operates to turn off the transistor switch.

Abstract: A transformer balun for high rejection unbalanced lattice filters includes two symmetrical coils separated by a shielding element. In a further exemplary aspect, the transformer may include a conductor, which may be a third coil that operates with a capacitor to form a resonant circuit that enhances mutual coupling. Using either of the exemplary transformers provides improved performance in the passband while concurrently providing out-of-band rejection at levels exceeding seventy decibels (70 dB).

Abstract: An electronic article surveillance (“EAS”) tag for an EAS system, comprising an antenna, a radio frequency identification (“RFID”) chip configured to transmit and/or receive a wireless signal via the antenna; and a magnetically-actuatable switch configured to move between a first position and a second position. The switch is configured to electrically couple the RFID chip to the antenna in the first position. The switch is further configured to electrically decouple the RFID chip from the antenna in the second position.

Abstract: An AC disconnect switch with integral surge protection. The intrinsic pullout head of the AC disconnect switch embodies a surge protection device, thereby eliminating the need for an extrinsic surge protection device.

Abstract: A device, preferably a plug-in module, for communication between a controller and a field device. The device includes contacts, wherein a first subset of the contacts is electrically conductively connected or connectable to the controller and a second subset of the contacts is electrically conductively connected or connectable to the field device. The apparatus further includes a circuit having an input electrically conductively connected to the first subset of the contacts and an output electrically conductively connected to the second subset of the contacts. The circuit includes a voltage-limiting unit adapted to limit a voltage at the output, and a current-limiting unit adapted to limit a current between the input and the output and to interrupt the current when the voltage-limiting unit responds.

Abstract: A surge protective device (SPD) circuit system for providing overvoltage protection to an electrical power circuit includes a PCB assembly, an SPD module, and an SPD monitoring system. The PCB assembly selectively mountable on the PCB includes a PCB and a remote signal (RS) PCB contact on the PCB. The SPD module includes an overvoltage clamping element and an RS spring contact including an RS contact portion. When the SPD module is mounted on the PCB and the electrical power circuit is connected to the PCB: the PCB electrically connects the SPD module to the circuit and the overvoltage clamping element provides overvoltage protection to the circuit; the RS contact portion engages the RS PCB contact; the RS spring contact is elastically deflected and persistently loads the RS contact portion against the RS PCB contact; and the RS spring contact is electrically connected to the SPD monitoring system via the RS PCB contact.

Abstract: A smart switch apparatus is coupled between a live wire of an indoor power and two output terminals of a SPDT (Single Pole Double Throw) switch. Two ends of a load are respectively connected to a neutral wire of the indoor power and an input terminal of the SPDT switch. The smart switch apparatus includes an on-off status detector, a switch position detector, a controller, an on-off controller and a power circuit. The on-off status detector is coupled to the live wire of the indoor power for generating an on-off status signal. The switch position detector is coupled to the two output terminals of the SPDT switch for generating a switch position signal. The controller is coupled to the on-off status detector and the switch position detector for receiving the on-off status signal and the switch position signal.

Abstract: An electrostatic protection circuit connected with an internal circuit is provided. The electrostatic protection circuit includes: a first circuit, a first diode connected in parallel with the first circuit, a second circuit, and a second diode connected in parallel with the second circuit. The first circuit is connected between a power supply pad and an internal circuit input terminal. The second circuit is connected between the internal circuit input terminal and a ground pad. The first circuit and the second circuit are diode-triggered silicon controlled rectifier circuits. The technical solution of the disclosure can improve electrostatic protection capability of a charged device model of a chip.

Abstract: An apparatus includes a first diode and a second diode connected in series between a first voltage terminal and a second voltage terminal, a switch connected between the first voltage terminal and the second voltage terminal, and a clamping threshold circuit connected between a common node of the first diode and the second diode, and a gate of the switch, wherein the clamping threshold circuit is configured such that in response to a voltage surge applied to the common node of the first diode and the second diode, the switch is turned on once the voltage surge is greater than a predetermined threshold.

Abstract: The present application discloses a semiconductor device, an electronic system and an electrostatic discharge (ESD) protection method for a semiconductor device thereof. The semiconductor device includes a substrate, an operation solder structure disposed on a first surface of the substrate for receiving an operation signal, a detection solder structure disposed on the first surface of the substrate for receiving a chip connection signal, and a semiconductor chip disposed on a second surface of the substrate. The semiconductor chip includes an operation electrical contact coupled to the operation solder structure, a detection electrical contact coupled to the detection solder structure, an ESD protection unit coupled to the operation electrical contact, and a logic circuit coupled to the detection electrical contact for adjusting capacitance of the ESD protection unit according to the chip connection signal.

Abstract: A drive circuit of a power semiconductor element comprises a gate drive voltage generator to generate, based on an ON/OFF drive timing signal input to an input terminal, a gate drive voltage to be applied to a gate electrode of a switching element having the gate electrode for controlling a main current that flows between a first main electrode and a second main electrode, wherein the gate drive voltage generator includes a gate current limiting circuit in which a current limiter to limit a current and a voltage limiter to limit the magnitude of a voltage applied to both ends of the current limiter are connected in parallel.

Abstract: This application is directed to a stacked semiconductor device assembly including a plurality of identical stacked integrated circuit (IC) devices. Each IC device further includes a master interface, a channel master circuit, a slave interface, a channel slave circuit, a memory core, and a modal pad configured to receive a selection signal for the IC device to communicate data using one of its channel master circuit or its channel slave circuit. In some implementations, the IC devices include a first IC device and one or more second IC devices. In accordance with the selection signal, the first IC device is configured to communicate read/write data via the channel master circuit of the first IC device, and each of the one or more second IC devices is configured to communicate respective read/write data via the channel slave circuit of the respective second IC device.

Abstract: A substrate and a first circuit board each have an upper side and a lower side. The substrate lower side is connected to a cooling body. On the upper side of the substrate, first electronic switching elements connect an alternating current potential at a phase terminal to a high direct current potential at a first potential terminal and to a low direct current potential at a second potential terminal. Second electronic switching elements connect the alternating current potential to a middle direct current potential at a third potential terminal. The substrate is spaced from the first circuit board under the first circuit board lower side. The upper side of the substrate faces toward the first circuit board. The second switching elements are at least on the upper side of the first circuit board, possibly additionally also on the lower side of the first circuit board.

Abstract: Described are system and method embodiments for shield fault detection to protect the cable, components and other circuits connected to the cable shield, and to avoid high short circuit currents flowing from a power source to ground during unexpected events. A threshold voltage detector and a slope detector may be used to sense the voltage on a shield pin switchably coupled to ground via a shield ground. Method embodiments to distinguish the shield ground switch current caused by a shield fault from normal operation are also discussed. In certain situations, a weak ground path is established first to sense or identify a valid attachment on the cable before establishing a strong ground path. The disclosed embodiments, separately or in combination, may effectively detect shield fault with improved performance.

Abstract: A two terminal arc suppressor for protecting switch, relay or contactor contacts and the like comprises a two terminal module adapted to be attached in parallel with the contacts to be protected and including a circuit for deriving an operating voltage upon the transitioning of the switch, relay or contactor contacts from a closed to an open disposition, the power being rectified and the resulting DC signal used to trigger a power triac switch via an optoisolator circuit whereby arc suppression pulses are generated for short predetermined intervals only at a transition of the mechanical switch, relay or contactor contacts from an closed to an open transition and, again, at an open to a close transition during contact bounce conditions.

Abstract: An electrostatic discharge protection circuit includes an electrostatic discharge clamp between a first rail and a second rail, a trigger device configured to activate the electrostatic discharge clamp in response to an electrostatic discharge event, and a charge dissipation element between the first rail and the second rail to dissipate a residual charge at an input of the trigger device.

Abstract: An apparatus includes a plurality of surge protection devices (e.g., multiple metal oxide varistors connected in parallel) configured to be coupled to a power system, a plurality of mechanical actuators associated with respective ones of the surge protection devices and configured to indicate status of the associated surge protection devices, and a detector circuit configured to sense actuation of the actuators and responsively determine a protection status of the plurality of surge protection devices. The detector circuit may include a plurality of switches configured to be actuated by respective ones of the actuators. The detector circuit may further include a processor coupled to the plurality of switches and configured to determine states of switches and to determine the protection status based on the determined status of the switches. The processor may be configured to interpret the status of the switches based on a stored identifier.