With Tuned Circuit Patents (Class 361/113)
  • Patent number: 7532861
    Abstract: An interface enables an RF signal, a DC power signal, and a data signal to be conveyed between two devices over a single RF cable. In an exemplary application of this invention, a steerable antenna system is coupled to a wireless adapter for use in a wireless network. The steerable antenna includes a plurality of panels that can be selectively activated in response to the data signal, which also determines a direction in which an RF signal is transmitted or received by a selected panel of the antenna. Low pass filters in each device isolate the DC power supply and the load from the other two signals. High pass filters isolate the radio in the wireless adapter and the antenna array from the DC and data signals. The data signal is preferably encoded into a Manchester format that passes through a bandpass filter provided in each device.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: May 12, 2009
    Assignee: Microsoft Corporation
    Inventors: Craig Steven Ranta, Wayne King
  • Publication number: 20080100980
    Abstract: The present invention relates to removable seating systems of the type wherein all or part of a seat may be removed or otherwise disengaged from a secure connection location, such as but not limited to vehicle seats that me be removed or disengage for folding from a vehicle mounted seat frame assembly. The system may include coupling circuits to facilitate assess states of a switch included on the removable seat.
    Type: Application
    Filed: October 31, 2006
    Publication date: May 1, 2008
    Applicant: LEAR CORPORATION
    Inventors: Josep Jacas-Miret, Alberto Garcia-Briz
  • Publication number: 20070279823
    Abstract: An electronic device includes a first transmission line, a second transmission line and a ground-coupling portion. The first transmission line is composed of a first signal line transmitting a given high frequency wave signal and a first ground. The second transmission line is composed of a second signal line transmitting the high frequency wave signal and a second ground. The ground-coupling portion couples the first ground and the second ground. A phase difference between the high frequency wave signals at both ends of the ground-coupling portion is substantially integral multiple of 180 degrees.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 6, 2007
    Applicant: EUDYNA DEVICES INC.
    Inventors: Tsuneo Tokumitsu, Hideki Tango, Osamu Anegawa
  • Patent number: 7259952
    Abstract: A process control instrument includes a circuit board having a control circuit for generating or receiving a high frequency signal. An antenna includes an electrical conductor. An intrinsic safety circuit couples the control circuit to the antenna and comprises a microstrip transmission line on the circuit board electrically connecting the control circuit to the electrical conductor. A safety stub has a first end electrically connected to the transmission line proximate the electrical conductor and a second end connected to a ground of the control circuit.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: August 21, 2007
    Assignee: Magnetrol International, Inc.
    Inventors: Michael D. Flasza, Stanislaw Bleszynski
  • Patent number: 7138730
    Abstract: A system and method for converting power are disclosed.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: November 21, 2006
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventor: Jih-Sheng Lai
  • Patent number: 7092229
    Abstract: A device for an electrical power system having a nonlinear load. The circuit is connected in series with the nonlinear load and is tuned to the third harmonic of the power source frequency. The circuit substantially eliminates the harmonic currents and neutral currents located in the power system, and improves the power factor of the nonlinear load by optimizing the current drawn by the nonlinear load.
    Type: Grant
    Filed: April 17, 1995
    Date of Patent: August 15, 2006
    Assignee: Harmonics Limited, Inc.
    Inventor: Michael Z. Lowenstein
  • Patent number: 7027279
    Abstract: A harmonic mitigating device also functions as a phase converter for supplying single-phase non-linear loads, or as a phase shifting device for three-phase non-linear loads with multiple inputs to create a quasi multi-pulse system. A multiple-winding reactor or a plurality of single-winding reactors, and at least one capacitor, are connected in a crosslink circuit between the reactor windings, or between the reactor windings and another line. At least one reactive element comprising a line winding is connected to each phase or to the neutral and in series with a non-linear load, which provides a high reactance to harmonic currents, and at least one crosslink circuit comprising a second reactive element connected between the second end of the line winding and a capacitor which is connected to any other line in the system.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: April 11, 2006
    Assignee: 1061933 Ontario Inc.
    Inventors: Michael I. Levin, Anthony H. Hoevenaars, Igor V. Volkov
  • Patent number: 7023678
    Abstract: An ESD protection circuit design incorporating a single, or a plurality of, parallel inductor and capacitor, also known as LC tank(s), to avoid power loss by parasitic capacitance in ESD circuits. The first design described incorporates a LC tank structure. The second includes two LC tank structures. These structures can be expanded to form ESD protection circuit structures stacked with n-stages LC tanks. The last design described is ESD protection circuits formed by stacking the first design. These designs can avoid power gain loss from parasitic capacitance of ESD, because the parameters of LC tank can be designed to resonant at a desired operating frequency. Each of these designs can be altered slightly to create variant designs with equal identical ESD protection capabilities.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 4, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Dou Ker, Cheng-Ming Lee, Tung-Yang Chen
  • Patent number: 7023677
    Abstract: An ESD protection circuit design incorporating a single, or a plurality of, parallel inductor and capacitor, also known as LC tank(s), to avoid power loss by parasitic capacitance in ESD circuits. The first design described incorporates a LC tank structure. The second includes two LC tank structures. These structures can be expanded to form ESD protection circuit structures stacked with n-stages LC tanks. The last design described is ESD protection circuits formed by stacking the first design. These designs can avoid power gain loss from parasitic capacitance of ESD, because the parameters of LC tank can be designed to resonant at a desired operating frequency. Each of these designs can be altered slightly to create variant designs with equal identical ESD protection capabilities.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: April 4, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Dou Ker, Cheng-Ming Lee, Tung-Yang Chen
  • Patent number: 7009826
    Abstract: An ESD protection circuit design incorporating a single, or a plurality of, parallel inductor and capacitor, also known as LC tank(s), to avoid power loss by parasitic capacitance in ESD circuits. The first design described incorporates a LC tank structure. The second includes two LC tank structures. These structures can be expanded to form ESD protection circuit structures stacked with n-stages LC tanks. The last design described is ESD protection circuits formed by stacking the first design. These designs can avoid power gain loss from parasitic capacitance of ESD, because the parameters of LC tank can be designed to resonant at a desired operating frequency. Each of these designs can be altered slightly to create variant designs with equal identical ESD protection capabilities.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: March 7, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Dou Ker, Cheng-Ming Lee, Tung-Yang Chen
  • Patent number: 6995983
    Abstract: The present invention is a component carrier comprising a plate of insulating material having a plurality of apertures for accepting the leads of a thru-hole differential and common mode filter. Another embodiment comprises a surface mount component carrier comprised of a disk of insulating material having a plurality of apertures. The same concept for the above described carrier is also incorporated into several alternate embodiments, either independently or embedded within electronic connectors, or configured for use with electric motors. The overall configuration and electrical characteristics of the concepts underlying the present inventions are also described as an electrical circuit conditioning assembly which encompasses the combination of differential and common mode filters and component carriers optimized for such filters.
    Type: Grant
    Filed: April 6, 1999
    Date of Patent: February 7, 2006
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony
  • Patent number: 6977802
    Abstract: The disclosure relates to the lightning protection of the transmitters in a transmission system. An etched circuit with lightning protection comprises at least one main line connected to a connector adapted to the output of a transmission antenna of the transmission system working at a fixed frequency or in a narrow frequency band around the fixed frequency. The circuit comprises a main line and at least one first line connected to the main line and substantially equivalent to an open circuit with respect to the main line for the stated frequency. The circuit can also perform a harmonic filtering function, thus increasing compactness by using a single circuit for both functions.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: December 20, 2005
    Assignee: Thales
    Inventor: Jean-Paul Chatenet
  • Patent number: 6963203
    Abstract: A method for analyzing an electrical contact pair is provided. At least one of the contacts is coupled to a line-side of the contact pair, and at least one of the contacts is coupled to a load-side of the contact pair. The method includes electrically coupling the load-side contact and the line-side contact to electrical ground, applying a test voltage across the contact pair while the line-side contact and load-side contact remain electrically coupled to electrical ground, triggering a contact pair operation timer at a start of a test, detecting at least one of a first closure of the contact pair and a first opening of the contact pair using the test voltage, and determining the timing of the contact pair based upon the operation of the contact pair operation timer.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: November 8, 2005
    Assignee: General Electric Company
    Inventors: Zoran Stanisic, Heinz Wernli
  • Patent number: 6963478
    Abstract: An input section of an RF interface is shown in conjunction with a tuner circuit. The input, in one embodiment, is constructed using co-planner wave guide techniques and serves to provide low return loss, low insertion loss, high voltage protection, all within a single housing without causing RF interference problems.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: November 8, 2005
    Assignee: Microtune (Texas) L.P.
    Inventors: Joel Stephen Michon, Kevin John Lynaugh, Hans Habermeier
  • Patent number: 6954346
    Abstract: The invention provides electrical filters, circuits including the filters, connectors including the filters, and methods of making and using the same wherein the filter includes a G conductor, an A conductor; and a B conductor, and wherein the three conductors are conductively isolated from one another when said filter is not connected in a circuit.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: October 11, 2005
    Assignee: XZY Attenuators, LLC
    Inventor: Anthony Anthony
  • Patent number: 6894885
    Abstract: The reader/writer of this invention includes a high voltage withstanding amplifier, plural resonance circuits and plural high voltage withstanding analog switching circuits. The high voltage withstanding amplifier amplifies an analog signal to be sent to the outside. Each of the resonance circuits sends the analog signal amplified by the high voltage withstanding amplifier to the outside. The high voltage withstanding analog switching circuits are provided between the high voltage withstanding amplifier and the resonance circuits correspondingly to the resonance circuits. Each of the high voltage withstanding analog switching circuits electrically connects/disconnects the high voltage withstanding amplifier to/from the corresponding resonance circuit. Since the reader/writer includes the high voltage withstanding analog switching circuits, there is no need to provide high voltage withstanding amplifiers at the previous stages of the resonance circuits as in a conventional reader/writer.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: May 17, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyoshi Asaka, Keiichi Iiyama
  • Patent number: 6885534
    Abstract: The present invention relates to a device for protecting high frequency RF integrated circuits from ESD damage. The device comprises at least one varactor-LC circuit tank stacked to avoid the power gain loss by the parasitic capacitance of ESD circuit. The varactor-LC tank could be designed to resonate at the RF operating frequency to avoid the power gain loss from the parasitic capacitance of ESD circuit. Multiple LC-tanks could be stacked for further reduction in the power gain loss. A reverse-biased diode is used as the varactor for both purposes of impedance matching and effective ESD current discharging. Because the inductor is made of metal, both the inductor and the varactor can discharge ESD current when ESD condition happens. It has a high enough ESD level to prevent ESD discharge.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: April 26, 2005
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Ming-Dou Ker, Cheng-Ming Lee, Wen-Yu Lo
  • Patent number: 6867957
    Abstract: Transistors with very thin gate oxides are protected against oxide failure by cascading two or more transistors in series between an output pad and ground. The intermediate source/drain node between the two cascaded transistors is usually floating during an ESD test, delaying snapback turn-on of a parasitic lateral NPN transistor. This intermediate node is used to drive the gate of an upper trigger transistor. A lower trigger transistor has a gate node that is charged by the ESD pulse on the pad through a coupling capacitor. When the coupled ESD pulse turns on the trigger transistors, the trigger transistors turn on a silicon-controlled rectifier (SCR) that is integrated with the trigger transistors.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: March 15, 2005
    Assignee: Pericom Semiconductor Corp.
    Inventors: Paul C. F. Tong, Ming-Dou Ker, Ping Ping Xu
  • Patent number: 6862161
    Abstract: The present invention relates to electrostatic discharge (ESD) protection and, more particularly, to methods and systems for improving response times of ESD triggering and clamping circuitry. An ESD protection circuit protects ESD circuitry from direct current (DC) voltage stress during normal operations by reducing terminal pad voltage level. A frequency bypass circuit implemented across an ESD protection circuit essentially acts as a short circuit during ESD events and essentially acts as an open circuit during normal operations. A frequency bypass circuit implemented in conjunction with an ESD protection circuit enables ESD triggering and clamping circuitry to react to ESD events without undue delay. Unlike an ESD protection circuit, a frequency bypass circuit does not result in substantial voltage reduction across its terminals. In an embodiment, the frequency bypass circuit includes one or more capacitors.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: March 1, 2005
    Assignee: Broadcom Corporation
    Inventor: Agnes Woo
  • Patent number: 6836393
    Abstract: A power supply unit designed to control a power output and protect an overload easily, economically with little loss. A DC output which is generated by smoothing a rectified current of a rectifier circuit connected to an AC power source is subjected to switching by a switching circuit, creating an AC output which is supplied to a current resonance circuit. A peak detection circuit detects the peak voltage of a resonance voltage of this current resonance circuit. On the basis of a comparison output of the voltage comparator comparing the peak voltage to the reference voltage of a reference voltage source, the switching frequency of the switching circuit is controlled by a switching control circuit so that it is controlled to cause the peak voltage to match the reference voltage. In this manner, the output power is maintained on the constant level.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: December 28, 2004
    Assignee: Sony Corporation
    Inventors: Susumu Kaneko, Katsumi Kobori
  • Patent number: 6831822
    Abstract: A suppression device for an electronic appliance having a plug-in device which has at least one plug-in element and is designed for attachment to a housing of the electronic appliance, with a capacitor having at least two capacitor plates being provided in order to improve the electromagnetic sensitivity. In a simple and low-cost suppression measure for electronic appliances, which is also suitable for mass production, the capacitor is arranged outside the housing of the electronic appliance and is electrically connected firstly to a plug-in element of the plug-in device and secondly to the potential of the electrically conductive housing.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: December 14, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Reinhold Berberich, Dieter Busch
  • Patent number: 6806806
    Abstract: A fuse and filter arrangement having a polymer fuse apparatus that provides bypass fuse protection. A polymer bypass fuse includes of an electrical conductor wherein a portion of the conductor is surrounded by an internal electrode, which is then surrounded by a layer of polymeric positive temperature coefficient (PTC) material, which is then surrounded by a conductive material similar to that of the internal electrode. The fuse and filter arrangement includes a plurality of in-line and bypass fuses combined with a differential and common mode filter, which itself consists of a plurality of common ground conductive plates maintaining first and second electrode plates between the various conductive plates, all of which are surrounded by a material having predetermined electrical characteristics to provide fail safe filter and circuit protection.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: October 19, 2004
    Assignee: X2Y Attenuators, LLC
    Inventor: Anthony A. Anthony
  • Patent number: 6804099
    Abstract: An input section of an RF interface is shown in conjunction with a tuner circuit. The input, in one embodiment, is constructed using co-planner wave guide techniques and serves to provide low return loss, low insertion loss, high voltage protection, all within a single housing without causing RF interference problems.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: October 12, 2004
    Assignee: Microtune (Texas), L.P.
    Inventors: Joel Stephen Michon, Kevin John Lynaugh, Hans Habermeier
  • Patent number: 6778373
    Abstract: A rectifier circuit matched for power factor correction. A first diode (D1), a second diode (D2), a third diode (D3) and a fourth diode (D4) are in a bridge arrangement. A first pole (10) and a second pole (12) of the bridge arrangement are connected to a source (U) which has at least one AC voltage component. An inductance (L1) is arranged in series with the third pole (14) or the fourth pole (16) of the bridge arrangement. A capacitance (C1) is connected between the first pole (10) and the second pole (12), and two of the four diodes (D1, D2, D3, D4) are in the form of fast diodes.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: August 17, 2004
    Assignee: Patent-Treuhand-Gesellschaft für Elektrische Glühlampen mbH
    Inventors: Ugo Francescutti, Felix Franck
  • Patent number: 6775117
    Abstract: The present invention provides diode bridge and a parallel type, capacitor based, phase to phase surge suppressor. The suppressor acts to suppress transient energy as soon as the spike exceeds the prevailing peak of the ac waveform. The system dissipates the spike by drawing current through the system impedance between the suppressor sand the source of the surge.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: August 10, 2004
    Assignee: Square D Company
    Inventors: Rudy Christian Thomas Wodrich, Tommy Szechin Mok
  • Patent number: 6774614
    Abstract: An apparatus for detecting currents in a three-phase power transmission system includes a first detection circuit electrically coupled to a first phase of the three-phase transmission system, a second detection circuit electrically coupled to a second phase of the three-phase transmission system different than the first phase, and an event output switch electrically coupled to the first detection circuit and the second detection circuit and configured to actuate when a subsynchronous current at least one of the first phase and the second phase exceeds a pre-selected subsynchronous current setpoint.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: August 10, 2004
    Assignee: General Electric Company
    Inventors: William Herbert Sahm, III, Stanley A. Miske, Jr., Daniel Herbert Baker, Bruce Edward English, John Michael Kern
  • Patent number: 6747856
    Abstract: A device is for protecting against fault currents, even with frequencies of fault currents higher than 1 kHz. Additionally, it is for protecting against fires to dependably protect people. The converting core of a total current converter mounted upstream of a triggering arrangement, in a releasing circuit, is designed for detecting fault currents of different types. Further, an RC circuit is mounted parallel to the triggering arrangement, on the input side.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: June 8, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Markus Huber, Gerald Lehner
  • Patent number: 6728089
    Abstract: The present invention is directed to a wide input voltage range surge suppressor. It includes a series circuit for attachment to an upstream AC power input, and to a downstream load. There is a nonlinear low pass L-C filter having an inductor (and in some preferred embodiments, a low Q linear inductor) and a diode bridge, wherein the diode bridge includes at least one large value capacitor. There are two or three electrolytic capacitors of the nonlinear low pass L-C filter diode bridge in preferred embodiments. There is also a two section high pass filter connected to the electrolytic capacitor. This two section high pass filter has at least two diversely rated capacitors and at least three diversely rated resistors. A voltage offset diode is connected to the two section high pass filter and at least one electronic switch is connected to the voltage offset diode, with at least one capacitor connected to the electronic switch. The electronic switch is preferably a silicon controlled rectifier (SCR) switch.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: April 27, 2004
    Inventor: Jack R. Harford
  • Publication number: 20040075964
    Abstract: The present invention relates to a device for protecting high frequency RF integrated circuits from ESD damage. The device comprises at least one varactor-LC circuit tank stacked to avoid the power gain loss by the parasitic capacitance of ESD circuit. The varactor-LC tank could be designed to resonate at the RF operating frequency to avoid the power gain loss from the parasitic capacitance of ESD circuit. Multiple LC-tanks could be stacked for further reduction in the power gain loss. A reverse-biased diode is used as the varactor for both purposes of impedance matching and effective ESD current discharging. Because the inductor is made of metal, both the inductor and the varactor can discharge ESD current when ESD condition happens. It has a high enough ESD level to prevent ESD discharge.
    Type: Application
    Filed: October 21, 2002
    Publication date: April 22, 2004
    Inventors: Ming-Dou Ker, Cheng-Ming Lee, Wen-Yu Lo
  • Patent number: 6717789
    Abstract: A power supply rejection circuit and method thereof for capacitively-stored reference voltages is disclosed. The power supply rejection circuit generally comprises a comparison circuit for comparing a signal associated with a power supply such as, for example, a Wheatstone bridge configuration, to a stored reference voltage, such that the comparison circuit includes at least one existing capacitor therein. At least one additional capacitor can be then coupled to the comparison circuit, such that the additional capacitor creates a capacitively-coupled voltage divider. This capacitively-coupled voltage divider negates the first order effects of power supply noise in the system. This effect significantly reduces the effect of power supply noise and improves signal jitter associated with the comparison circuit during a comparison of the signal to the stored reference voltage utilizing the comparison circuit.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: April 6, 2004
    Assignee: Honeywell International Inc.
    Inventors: Perry A. Holman, Jason M. Chilcote
  • Publication number: 20030227726
    Abstract: The present invention comprises an ESD clamp circuit used in an integrated circuit with plural power supply. The ESD clamp circuit, connected between core voltage source and low voltage source, is fabricated by a process which fabricates core circuit. The ESD clamp circuit has a low trigger voltage, so it can conduct large current to protect the core circuit before the core circuit is damaged.
    Type: Application
    Filed: March 7, 2003
    Publication date: December 11, 2003
    Inventors: Chung-Hui Chen, Hun-Hsien Chang
  • Patent number: 6646850
    Abstract: A high-voltage power breaker includes two arcing contact pieces which are separated from one another when disconnected and between which an arc is struck in an arcing area. The arcing area is filled with a quenching gas, where the quenching gas has been heated by the arc flowing out from a constriction point of an insulating nozzle. The insulating nozzle surrounds the arcing area, through at least one outlet flow channel which has a number of areas which the quenching gas passes through successively. The first area which faces the constriction point of the nozzle has a specific flow resistance which is less than that of the constriction point. The first area in the outlet flow direction of the quenching gas is followed by at least one second area, one third area and one fourth area. The specific flow resistance of the second and fourth areas are each greater than the specific flow resistance of the immediately preceding area in the outlet flow direction.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: November 11, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ralf Bergmann, Hold Dienemann, Joerg Hagen, Hartmut Knobloch, Volker Lehmann, Friedrich Loebner, Michael Punger, Claudia Wiesinger
  • Patent number: 6639779
    Abstract: A frequency selective transient voltage protector (FSTVP) circuit that may be used in connection with a communication line over which POTS and DSL service may be simultaneously provided. The FSTVP circuit attenuates high frequency transient voltages that exceed a predetermined voltage level, while permitting low frequency, generally high voltage signals (e.g., ring signals) and high frequency, low voltage signals (e.g., DSL signals) to pass with little or no attenuation. The FSTVP circuit comprises a frequency selective network (that comprises a frequency discriminator and a voltage discriminator) connected to an overvoltage protection device that shunts any high frequency transient voltages thus protecting devices connected downstream along the communications line from damage. The frequency selective network is tuned to gate the overvoltage protection device when the frequency and voltage of a signal present on the communication line exceed predetermined values.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: October 28, 2003
    Assignee: Oneac Corporation
    Inventors: Vincent L. Knigge, Paul F. Haake
  • Patent number: 6636405
    Abstract: In a multiple phase system for supplying power from an AC source to nonlinear loads, a device for substantially eliminating currents in a neutral wire. The device includes a completely-passive parallel resonant circuit having three passive electrical branches connected in parallel tuned to a third harmonic frequency of the AC source. The three branches comprise a first branch consisting of a capacitor, a second branch consisting of a reactor, and a third branch consisting of a resistor. The resonant circuit is connected to the neutral wire.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: October 21, 2003
    Inventor: Michael Z. Lowenstein
  • Patent number: 6636407
    Abstract: A surge protector includes a coaxial through-section having a first inner conductor and a first outer conductor and a stub having a second inner conductor and a second outer conductor. The stub has a first end and a second end, the stub being coupled to the coaxial through-section, wherein the second inner conductor is conductively coupled to the first inner conductor at the first end of the stub and the second outer conductor is conductively coupled to the first outer conductor at the first end of the stub. The second inner conductor is substantially hollow and has at least one helical aperture disposed therein. A charge elimination device is conductively coupled between the second inner conductor and a grounding device. A radio frequency short circuit bypass is electrically coupled between the second inner conductor and the second outer conductor.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: October 21, 2003
    Assignee: Andrew Corporation
    Inventor: Henry G. Ryman
  • Patent number: 6624999
    Abstract: The invention provides electrostatic discharge (ESD) protection for a circuit. In a preferred embodiment, an inductor is coupled between the output of the circuit and an ESD clamp circuit of a power line. The inductance value of the inductor is selected such that the inductor has a high impedance at the operating frequency of the circuit and a low impedance at an ESD event.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: September 23, 2003
    Assignee: Intel Corporation
    Inventor: Jeffrey L. Johnson
  • Patent number: 6603646
    Abstract: The present invention relates to a multi-functional energy conditioner having architecture employed in conjunction with various dielectric and combinations of dielectric materials to provide one or more differential and common mode filters for the suppression of electromagnetic emissions and surge protection. The architecture allows single or multiple components to be assembled within a single package such as an integrated circuit or connector.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: August 5, 2003
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony
  • Patent number: 6594128
    Abstract: The present invention relates to a passive electronic component architecture employed in conjunction with various dielectric and combinations of dielectric materials to provide one or more differential and common mode filters for the suppression of electromagnetic emissions and surge protection. The architecture allows single or multiple components to be assembled within a single package such as an integrated circuit or connector. The component's architecture is dielectric independent and provides for integration of various electrical characteristics within a single component to perform the functions of filtering, decoupling, fusing and surge suppression, alone or in combination.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: July 15, 2003
    Assignee: X2Y Attenuators, LLC
    Inventor: Anthony A. Anthony
  • Patent number: 6587321
    Abstract: The present invention relates to electrostatic discharge (ESD) protection and, more particularly, to methods and systems for improving response times of ESD triggering and clamping circuitry. An ESD protection circuit protects ESD circuitry from direct current (DC) voltage stress during normal operations by reducing terminal pad voltage level. A frequency bypass circuit implemented across an ESD protection circuit essentially acts as a short circuit during ESD events and essentially acts as an open circuit during normal operations. A frequency bypass circuit implemented in conjunction with an ESD protection circuit enables ESD triggering and clamping circuitry to react to ESD events without undue delay. Unlike an ESD protection circuit, a frequency bypass circuit does not result in substantial voltage reduction across its terminals. In an embodiment, the frequency bypass circuit includes one or more capacitors.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: July 1, 2003
    Assignee: Broadcom Corporation
    Inventor: Agnes Woo
  • Publication number: 20030112572
    Abstract: A frequency selective transient voltage protector (FSTVP) circuit that may be used in connection with a communication line over which POTS and DSL service may be simultaneously provided. The FSTVP circuit attenuates high frequency transient voltages that exceed a predetermined voltage level, while permitting low frequency, generally high voltage signals (e.g., ring signals) and high frequency, low voltage signals (e.g., DSL signals) to pass with little or no attenuation. The FSTVP circuit comprises a frequency selective network (that comprises a frequency discriminator and a voltage discriminator) connected to an overvoltage protection device that shunts any high frequency transient voltages thus protecting devices connected downstream along the communications line from damage. The frequency selective network is tuned to gate the overvoltage protection device when the frequency and voltage of a signal present on the communication line exceed predetermined values.
    Type: Application
    Filed: April 4, 2002
    Publication date: June 19, 2003
    Inventors: Vincent L. Knigge, Paul F. Haake
  • Patent number: 6577487
    Abstract: Connection arrangements are employed for reducing the effect of third-hannonic voltages in case of direct connection of AC machines to a three-phase distribution or transmission network, wherein the stator winding of the AC machine is Y-connected and wherein the neutral point of the winding is available. An exemplary embodiment employs a suppression filter turned to the third-harmonic, with an overvoltage protection device arranged between the neutral point and ground of the power network.
    Type: Grant
    Filed: November 27, 1998
    Date of Patent: June 10, 2003
    Assignee: Asea Brown Boveri AB
    Inventor: Lars Gertmar
  • Publication number: 20030103307
    Abstract: The invention relates to a method and a device for conditioning electric installations in buildings for the rapid transmission of data. A frequency range of between 1 MHz and up to more than 30 MHz is designated for rapid data transmission via power supply systems. In known methods of signal coupling, installation power supply systems in buildings act as electromagnetically open structures with a negligible shielding effect and a high degree of asymmetry. This leads to poor transmission quality and to problems of electromagnetic compatability, meaning that only a fraction of the available channel capacity can be used. The aim of the novel conditioning method for power supply systems is to produce symmetrical transmission paths, along which high frequency signals can be transmitted with substantially no interference, using low-level emission.
    Type: Application
    Filed: October 18, 2002
    Publication date: June 5, 2003
    Inventor: Kauls Dostert
  • Patent number: 6570750
    Abstract: A micromechanical electrical systems (MEMS) metallic micromachined multiple ported electrical switch receivable on the die of an integrated circuit and within the integrated circuit package for controlling radio frequency signal paths among a plurality of switch-enabled different path choices. The switch provides desirably small signal losses in both the switch open and switch closed conditions. The switch is primarily of the single pole multiple throw mechanical type with possible use as a single input pole, multiple output poles device and provision for grounding open nodes in the interest of limiting capacitance coupling across the switch in its open condition. Cantilever beam switch element suspension is included along with normally open and normally closed switch embodiments, electrostatic switch actuation and signal coupling through the closed switch by way of increased inter electrode capacitance coupling. Switch operation from direct current to a frequency above ten gigahertz is accommodated.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: May 27, 2003
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Mark C. Calcatera, Christopher D. Lesniak, Richard E. Strawser
  • Publication number: 20030086234
    Abstract: The present invention is directed to a wide input voltage range surge suppressor. It includes a series circuit for attachment to an upstream AC power input, and to a downstream load. There is a nonlinear low pass L-C filter having an inductor (and in some preferred embodiments, a low Q linear inductor) and a diode bridge, wherein the diode bridge includes at least one large value capacitor. There are two or three electrolytic capacitors of the nonlinear low pass L-C filter diode bridge in preferred embodiments. There is also a two section high pass filter connected to the electrolytic capacitor. This two section high pass filter has at least two diversely rated capacitors and at least three diversely rated resistors. A voltage offset diode is connected to the two section high pass filter and at least one electronic switch is connected to the voltage offset diode, with at least one capacitor connected to the electronic switch. The electronic switch is preferably a silicon controlled rectifier (SCR) switch.
    Type: Application
    Filed: November 1, 2001
    Publication date: May 8, 2003
    Inventor: Jack R. Harford
  • Patent number: 6545850
    Abstract: A backplane power landing system having a backplane to which is attached extruded metal mounts on which are mounted compact power filter modules. The mounts are adapted to be conductively sealed, for the purpose of electromagnetic compatibility, to the backplane and have guidance slots to facilitate aligning the power filter modules which extend through openings in the central beam of the mount, to make contact with the backplane. The power filter modules are fastened to the mounts in a manner which maintains a conductive seal so as to deliver inputted power to the backplane filtered of radiated and conducted emission noise.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: April 8, 2003
    Assignee: Nortel Networks Limited
    Inventors: Simon E. Shearman, Geoffrey G. Skanes, Kalvin W. Korpela, Douglas B. Cross, Luc Boucher
  • Publication number: 20030043524
    Abstract: The present invention relates to a communication line surge protecting system in which a quarter wavelength open circuit for a wavelength used is disposed in each of a central conductor line 1 and an external conductor line 2 so as to allow a signal with a predetermined communication wavelength to pass therethrough, while blocking signals with frequency components of lighting surge and the like, and in which a ground line is further provided in the central conductor line and a quarter wavelength short circuit for the wavelength used is disposed in each of the ground line and the external conductor line so as to block the signal with the predetermined communication wavelength, while allowing the signals with the frequency components of lighting surge and the like to pass therethrough.
    Type: Application
    Filed: August 23, 2002
    Publication date: March 6, 2003
    Applicant: NTT DOCOMO KYUSHU, INC.
    Inventors: Takashi Shikano, Kiyotaka Ando, Chikashi Okabayashi
  • Patent number: 6493200
    Abstract: This invention provides improved methods of protection required under the 1999 edition of the National Electric Code, section NEC 830 requirement that if a drop coaxial cable (usually supplying an individual residence) carries power above a certain voltage, it must include sufficient protection from electric shock for people who may come in contact with it. A drop coaxial cable would be carrying sufficient power for NEC 830 protection if it were supplying a cable telephone interface box or other AC powered network interface devices. In one embodiment, the invention utilizes the AC power signal from the drop cable to operate an AC power sensing circuit. The circuit utilizes an upper and lower current range to determine whether to activate a switch operative to interrupt the AC power in the drop cable. One variation of the invention utilizes an oscillator generated probe signal to determine if there is a valid circuit connection.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: December 10, 2002
    Assignee: Arris International, Inc.
    Inventors: James O. Farmer, Keith Fleming
  • Patent number: 6490143
    Abstract: An apparatus to provide spike conduction and power supply isolation that is effective for a 60 Hz power supply operating frequency. The power frequency blocking circuit is practically implemented for a 60 Hz power supply operating frequency. The power frequency blocking circuit provides an equivalent impedance of 100 ohms at the 60 Hz operating frequency, and the power frequency blocking circuit equivalent impedance is on the order of 1-2 ohms at frequencies above 1000 Hz where spike conduction is required. The power frequency blocking circuit is placed between each power supply terminal and ground. The circuit is comprised of a parallel combination resistor and capacitor.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: December 3, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Peter Estrela, Edward W. Wilbur, Jr.
  • Patent number: 6483686
    Abstract: A circuit for indicating abnormality of a three-mode surge absorber of a public electric power is disclosed. The circuit is serially connected between the input end and output end of a public electric power supply for indicating the abnormality of a three-mode surge absorbing device of a public power supply so as to achieve the object of indicating an obvious indication to the users. The circuit includes a first surge absorbing device, a first three-end fuse, an abnormal indication circuit, a second surge absorbing device and a second two-end fuse. Other than indicating the abnormality of the L-N, L-G, N-G surge absorbing devices, the present invention can prevent current leakage as destroys occurs in the diverse modes.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: November 19, 2002
    Inventor: Jonie Chou
  • Publication number: 20020167774
    Abstract: An adapting connector for a video machine has an S terminal, a VIDEO terminal, and two filter units connected with the S terminal and the VIDEO terminal. An older television with a VIDEO terminal is able to connect to a digital video machine with an S terminal via the video converter device. Furthermore, use of the television through the filter units of the adapting connector for a video machine is able to obtain a high quality image.
    Type: Application
    Filed: April 24, 2001
    Publication date: November 14, 2002
    Inventor: Yu-Feng Cheng