Shunt Connected Capacitors Patents (Class 361/17)
  • Patent number: 11063424
    Abstract: An adaptive protection method for impedance of parallel capacitors comprises monitoring a terminal voltage and current of the capacitor; automatically calibrating the initial impedance of the capacitor when the capacitor is put into operation; calculating a real-time impedance of the capacitor during operation, dynamically updating the actual impedance of the capacitor periodically; comparing the real-time impedance of the capacitor with the actual impedance, updating the actual impedance if the relative value of the modulus of the real-time impedance change does not exceed the dynamic update limit threshold and the dynamic update reaches update period; generating an update failure alarm if the relative value of the modulus of the real-time impedance change exceeds the dynamic update limit threshold; generating a protection alarm if the relative value of the modulus of the real-time impedance change satisfies the protection alarm condition and the delay time is reached; and protecting the trip outlet if the r
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: July 13, 2021
    Assignees: NR ELECTRIC CO., LTD, NR ENGINEERING CO., LTD
    Inventors: Zhongpeng Song, Li Ding, Qunbing Yu, Zhen Jin, Shu Xu, Kaida Dong
  • Patent number: 10903833
    Abstract: A control device for commercially available high voltage capacitor switches to close the circuit on electric utility power factor correction shunt capacitors or motor start assistance shunt capacitors precisely as each phase of the AC power source passes through zero volts.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: January 26, 2021
    Assignee: VALQUEST SYSTEMS, INC.
    Inventors: James L Landes, Evan Fritts
  • Patent number: 10305275
    Abstract: A data interface with overvoltage protection circuitry includes a bus interface and power rectification stage configured to provide supply and return voltages for the data interface and overvoltage protection circuitry, a first power level overvoltage protection circuit, a second power level overvoltage protection circuit, a DALI endpoint power output port, a power supply for a DALI endpoint device drawing current from the power output port, a receiver configured to receive signals on the DALI bus, and, a transmitter configured to send signals on the DALI bus.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: May 28, 2019
    Assignee: CURRENT LIGHTING SOLUTIONS, LLC
    Inventors: Tamas Daranyi, Lajos Csibi, Levente Kovacs, Gabor Pap
  • Patent number: 9396866
    Abstract: A device for mitigation Geomagnetic Induce Currents in the power distribution network is described. It may be connected to the neutral of a star-connected three-phase transformer of the power distribution system to ground without compromising its basic insulation, operation or integrity of the system. It requires a circuit having a surge arrester resistor having an adaptive nonlinear negative volt-ampere which is inserted from the transformer neutral to ground and a ground switch connected to the ground and also connected to the surge arrester. The device has two different current paths: whenever there is no GIC the switch remains closed and current flows from the transformer to the ground via the ground switch. Under Geomagnetic Induce Currents, the ground switch opens, allowing the induced current to flow from the transformer to the ground via the surge arrester.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: July 19, 2016
    Inventor: Alberto Raul Ramirez
  • Patent number: 9048725
    Abstract: The invention relates to an electric device with a winding (12) and means for inducing a current in the winding. A bridge circuit (400) electrically connects the winding (12) to a load (13). According to the invention the bridge circuit (400) includes capacitor means (401, 402), which is adapted for obtaining resonance with the impedance of the winding (12).
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: June 2, 2015
    Assignee: Seabased AB
    Inventors: Mats Leijon, Cecilia Bostrom, Mikael Eriksson
  • Patent number: 8575941
    Abstract: An apparatus and method is provided for identifying a faulted phase in at least one shunt capacitor bank. The apparatus generally includes a sampling circuit for sampling current or voltage signals associated with the shunt capacitor bank. A microcontroller is coupled to the sampling circuit and programmed to measure a compensated neutral point phase angle from the sampled signal, and compare the compensated neutral point phase angle with a fixed reference phase angle to identify the faulted phase of the shunt capacitor bank. The method generally includes the steps of sampling a current or voltage signal associated with the shunt capacitor bank, determining a compensated neutral point phase angle from the sampled signal, and comparing the compensated neutral point phase angle with a fixed reference phase angle to identify the faulted phase of the shunt capacitor bank. The invention also relates to an apparatus and method for identifying the location of the fault (e.g.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: November 5, 2013
    Assignee: Schweitzer Engineering Laboratories Inc
    Inventors: Satish Samineni, Casper A. Labuschagne
  • Patent number: 8295494
    Abstract: One or more attributes (e.g., pan, gain, etc.) associated with one or more objects (e.g., an instrument) of a stereo or multi-channel audio signal can be modified to provide remix capability. An audio decoding apparatus obtains an audio signal having a set of objects and side information. The apparatus obtains a set of mix parameters from a user input and an attenuation factor from the set of mix parameters. The apparatus then generates a plural-channel audio signal using at least one of the side information, the attenuation factor or the set of mix parameters.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: October 23, 2012
    Assignee: LG Electronics Inc.
    Inventors: Hyen-O Oh, Yang Won Jung, Christof Faller
  • Patent number: 8121318
    Abstract: The two channel audio surround sound circuit with automatic level control includes a right amplifier, a left amplifier, a right automatic level control and a left automatic level control. A right input is coupled to a positive input of the left amplifier through the right automatic gain control. The right input is coupled to a negative input of the right amplifier and coupled to the output of the right amplifier with one resistor. A left input is coupled to a positive input of the right amplifier through the left automatic gain control. The left input is coupled to a negative input of the left amplifier and coupled to the output of the left amplifier with another resistor.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: February 21, 2012
    Inventors: Paul R. Ambourn, Earl J. Slafon
  • Patent number: 7939905
    Abstract: According to an embodiment of the present invention, an electrostatic breakdown protection method protects a semiconductor device from a surge current impressed between a first terminal and a second terminal, the semiconductor device including: a diode impressing a forward-bias current from the first terminal to the second terminal; and a bipolar transistor impressing a current in a direction from the second terminal to the first terminal under an ON state, a continuity between a collector terminal and an emitter terminal of the bipolar transistor being attained before a potential difference between the first terminal and the second terminal reaches such a level that the diode is broken down.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: May 10, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Takayuki Nagai
  • Publication number: 20090079191
    Abstract: A power generation system includes: a prime mover; an electrical machine coupled to the prime mover and configured for converting mechanical power to electrical power, the electrical machine having a power factor of less than or equal to 0.7; a reactive power supply assembly coupled to the electrical machine and configured to supply reactive power to the electrical machine; and a power electronic converter coupled to the reactive power supply assembly and configured for transferring power from the electrical machine to a grid.
    Type: Application
    Filed: September 26, 2007
    Publication date: March 26, 2009
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jorge Mari, Michal-Wolfgang Waszak, Simon Schramm
  • Patent number: 7345889
    Abstract: A method and system for reducing the release of high frequency electromagnetic energy into the environment is disclosed, wherein local regions of distributed capacitance are embedded within a printed circuit board (PCB) and adjacent the PCB conductive traces act as low pass filters and thus increase the rise and/or fall times occurring on such traces. The present invention increases very short rise and/or fall times (e.g., 200 picoseconds or less) without degrading or detrimentally affecting other signal characteristics. The present invention does not substantially affect the voltage amplitude and does not affect the bit period when lengthening the rise and/or fall time. Also, the present invention does not induce any timing jitter that may cause synchronization problems within the system.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: March 18, 2008
    Assignee: Avaya Technology Corp.
    Inventor: David Norte
  • Patent number: 7030769
    Abstract: A circuit breaker with a thermal/magnetic trip device incorporates a monitor that senses the temperature of the bimetal and the amplitude of the load current to distinguish between a thermal and a magnetic trip. If the temperature of the bimetal is above a selected value when the circuit breaker trips, a “THERMAL” trip light emitting diode (LED) is energized, while a high load current at the time of a trip lights a “MAG” trip LED. The monitor also energizes an “ARC” LED in response to an arc fault signal from an AFCI at the time of trip, or a “GRD” LED in response to a ground fault trip. If a trip sensor, which monitors load voltage does not detect opening of the circuit breaker contacts when an arc fault or ground fault signal is generated, the corresponding LED is flashed to indicate the failure to trip. The monitor also has a “SURGE” LED to indicate a voltage surge in the protected distribution system as detected by a surge detector built into the circuit breaker.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: April 18, 2006
    Assignee: Eaton Corporation
    Inventor: Theodore J. Miller
  • Patent number: 6975489
    Abstract: A bypass capacitor having a given capacitance is arranged on the power/ground line adjacently to a driver circuit in a chip to reduce an effect of transient phenomenon at switching. The capacitance of the bypass capacitor is preset so as to be larger than a parasitic capacitance of the driver circuit to prevent the characteristic impedance of the power/ground line from being higher than the characteristic impedance of internal wiring.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: December 13, 2005
    Assignees: NEC Corporation, Oki Electric Industry Co., Ltd., Sanyo Electric Co., Ltd., SHARP Kabushiki Kaisha, Sony Corporatoin, TOSHIBA Corporation, Fujitsu Limited, Matsushita Electric Industrial Co., Ltd., Rohm Co., Ltd., Renesas Technology Corp.
    Inventors: Kanji Otsuka, Tadatomo Suga, Tamotsu Usami
  • Patent number: 6548769
    Abstract: A circuit breaker includes an opening and closing mechanism section with an opening and closing lever, and an alarm-outputting plate operating in response to a tripping operation. A case for the circuit breaker has a plurality of switch housing sections formed on a top side thereof, in which are installed an auxiliary switch for detecting an ON/OFF state of a main circuit contact and/or an alarm switch for detecting a tripping operation. The opening and closing lever and the alarm-outputting plate have outputting projecting pieces, respectively, laterally spaced apart from each other corresponding to the respective housing sections, for transmitting mechanical output signals to the switches. When the auxiliary and alarm switches are installed, the auxiliary switch is linked to the outputting projecting piece of the opening and closing lever, while the alarm switch is linked to the outputting projecting piece of the alarm-outputting plate.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: April 15, 2003
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Koji Nomura, Naoshi Uchida, Katsunori Kuboyama, Tatsunori Takahashi, Kentaro Toyama
  • Patent number: 6400538
    Abstract: An energy storage system for use in a magnetic pulse welding and forming apparatus includes a bank of capacitors and a very-low inductance conductive bus system interconnecting the capacitors. The bus system provides the ability to generate a very high frequency, short duration impulse which is needed for welding. The bus system includes first, second and third flat bus panels disposed in closely spaced overlying relation. The second, or middle, bus panel is the “hot” bus and is electrically insulated from the first (lower) and third (upper) bus panels by sheets of electrically insulating material. The first and third bus panels are connected together cooperatively form a ground bus. The bus system overlies the upper ends of the capacitors wherein the second bus panel is electrically interconnected to the respective hot contacts of the capacitors, and further wherein the ground bus is electrically interconnected with the respective ground contacts of the plurality of capacitors.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: June 4, 2002
    Assignee: INLI, LLC
    Inventors: Ludmila Kistersky, Daniil Dudko, Viatcheslav Shevchenko, Thomas A. Barber, Jr.
  • Publication number: 20010019468
    Abstract: An energy storage system for use in a magnetic pulse welding and forming apparatus includes a bank of capacitors and a very-low inductance conductive bus system interconnecting the capacitors. The energy storage system further includes an energy source connected to the capacitors, a discharge device, a charging control device, and a discharge control device for selectively initiating discharge of energy stored in the capacitors. The discharge device includes a central electrode placed coaxially inside a ring electrode with an adjustable concentric gap, and an ignition electrode designed as a coaxial ring surrounding the central electrode. The central electrode can be movable, i.e. either rotatable or slidable relative to the bus system. To control the direction of movement of the plasma jet, the central electrode is provided with a central air path and tangential jets opening adjacent to the ignition electrode for organizing air flow through the discharge gap.
    Type: Application
    Filed: January 23, 2001
    Publication date: September 6, 2001
    Inventors: Ludmilla Kistersky, Danylo Dudko, Viacheslav Shevchenko
  • Patent number: 6170973
    Abstract: A wide-angle illuminator for machine vision applications comprises a fiber optic bundle having a tail end defining a long narrow illumination line adjacent the workpiece and a head end defining a rectangular inlet adjacent the light source. The light source comprises a lamp located within a concave, elliptical cross-section reflector that is elongated in one direction. The elliptical cross-section is the same across the entire direction of elongation, thus defining a partial elliptical cylinder, which is preferably capped by flat, reflective surfaces at each end. The lamp, particularly the filament of the lamp, is aligned with one focus of the ellipse. The head inlet of the fiber optic bundle is aligned with the second focus of the ellipse so that the light emitted from the lamp is reflected to the second focus for transmission through the fiber optic bundle.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: January 9, 2001
    Assignee: Cognex Corporation
    Inventor: George J. Benedict
  • Patent number: 6060946
    Abstract: An input buffer circuit is connected to a first power supply voltage pad for applying a first power supply voltage, and a first ground line. An internal circuit larger in power consumption than the input buffer circuit is connected to a second power supply voltage pad for applying a second power supply voltage, and a second ground line. The parasitic resistance of the first ground line is higher than that of the second ground line. By connecting a capacitance between a power supply line connected to the first power supply voltage pad, and the first ground line, fluctuations in first power supply voltage are suppressed to prevent the input buffer circuit from malfunctioning.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: May 9, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Harima, Kenichi Nakamura, Masami Masuda
  • Patent number: 5633777
    Abstract: To adapt a three-electrode arrester having copper electrodes to high switching capacities (200 Amp a.c. current per discharge gap simultaneously for 11 cycles at 60 Hz), the following measures are provided: The cylindrical end electrodes have a volume of at least 60 mm.sup.3, given a ratio of length (L.sub.2) to diameter (D.sub.2) of less than 2.5; the middle electrode has the shape of a hollow cylinder with end regions of a reduced wall thickness; the middle electrode and the hollow cylindrical insulators are soldered to one another at the front ends.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: May 27, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jurgen Boy, Gerhard Lange
  • Patent number: 5440442
    Abstract: An apparatus and method for optimizing power factor in single phase and three phase installations. Capacitor circuits are interruptably connected with busses by means of switches. Leads electrically connected to the busses are attached to the load leads. The correct capacitance to optimize the power factor is determined experimentally by closing the switches, singly and in combination, until the power factor is in the 95-98% range. A power factor meter is used to determine power factor.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: August 8, 1995
    Inventor: Gregory G. Taylor
  • Patent number: 5293522
    Abstract: A ground fault circuit breaker in which both the fixed and movable contacts of the ground fault test switch are directly secured to the printed circuit board on which the ground fault detection circuit is implemented, with the movable contact also providing the spring bias for the test button.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: March 8, 1994
    Assignee: Westinghouse Electric Company
    Inventors: Joseph P. Fello, Umesh C. Patel, Michael J. Whipple, Garry B. Theadore
  • Patent number: 5206775
    Abstract: A circuit bypass device (30) having terminals (70, 80) is connected to contacts (70, 80) of a cell (20) to provide a conductive path (40) in response to voltage excursion therebetween. Device (30) includes: a conductive shunt (40), coupled to contacts (70, 80), that is movable from a normally non-conductive position to a conductive position between terminals (70, 80); a detector (50), coupled to conductive shunt (40), for sensing voltage excursion beyond specified limits between contacts (70, 80); and an actuator (60) having a heat-to-recover shape memory metal alloy that is formed to contract when detector (50) senses the voltage excursion, for moving conductive shunt (40) from the non-conductive position to the conductive position. The formed alloy is preferably spring-shape which contracts translationally and torsionally.
    Type: Grant
    Filed: May 23, 1991
    Date of Patent: April 27, 1993
    Assignee: Space Systems/Loral, Inc.
    Inventor: Jean P. Wilson
  • Patent number: 5181154
    Abstract: A circuit arrangement for current supply in processes of electrochemically initiated plasma-chemical layer production. It is preferably applied in the plasma-chemical conversion of electrochemically pre-formed layers, e.g. on light metals. The output of the adjustable three-phase transformer with subsequently connected 6-pulse rectifier circuit is branched twice, wherein a first bridge circuit comprises a capacitor connected in parallel to a voltage sensor. A second bridge circuit contains a freewheeling diode parallel to the current limiting choke and the bath for process implementation. A pulse analyzer is arranged parallel to the latter, and the two bridge circuits are separated by a switch element.
    Type: Grant
    Filed: April 1, 1992
    Date of Patent: January 19, 1993
    Assignee: Jenoptik GmbH
    Inventors: Jens Haupt, Kirstin Haupt, Henry Hornhauer
  • Patent number: 5101314
    Abstract: In the protection system for a capacitor bank, a resistor is connected in series between a connection cable for connecting capacitor unit groups in parallel with one another and a short-circuit device provided for each capacitor unit group, by which a first short-circuit current flowing into a damaged capacitor unit from the other capacitor unit groups in a case of a short-circuit fault in the capacitor unit can be reduced and bypassed in safety, and, consequently, secondary accidents such as a fire followed by the short-circuit fault in the capacity unit can be prevented effectively.
    Type: Grant
    Filed: June 21, 1990
    Date of Patent: March 31, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Satarou Yamaguchi
  • Patent number: 5087999
    Abstract: A capacitor bank comprising a plurality of capacitor units coupled in parallel, and an energy absorbing resistor Rj is inserted in series with each one Cj of the capacitor units. Thus, when a capacitor unit Cj suffers an insulation failure, the energy flowing into the failing capacitor unit Cj from the other capacitor units is absorbed substantially by the resistor Rj. The capacitor bank may comprise several serially connected rows of parallel connected capacitor units, an energy absorbing capacitor Rij being inserted in series with each one Cij of the capacitor units. Further, each capacitor unit Cj may be provided with a protective short-circuiting device Sj, which short circuits the two terminals of the capacitor unit Cj via a bypass line 9 upon an occurance of failure of the capacitor unit Cj. An oscillation preventing resistor Ry is connected in series with each capacitor unit Cj in addition to an energy absorbing resistor Rx.
    Type: Grant
    Filed: August 28, 1990
    Date of Patent: February 11, 1992
    Assignees: Director General, Agency of Industrial Science and Technology, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuhiro Sato, Yoichi Hirano, Sataro Yamaguchi
  • Patent number: 5065307
    Abstract: A built-in insulating element for electrically insulating a process portion from a control object and for transmitting a process result to the control object is provided in the output portion for transmitting the process result of a sequence controller to the control object. Further, a noise preventive element is provided in the output portion for preventing a noise voltage from coming in from the control object side and damaging the insulating element.
    Type: Grant
    Filed: August 25, 1989
    Date of Patent: November 12, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Oshiga, Katsuhiro Fujiwara, Kazunori Umeda
  • Patent number: 5063340
    Abstract: A capacitive power supply having a charge equalization circuit. The charge equalization circuit is comprised of a shunt circuit connected in a parallel connection with capacitive elements of the capacitive power supply. Once a charging current is applied to the capacitive power supply to store charge thereupon to form thereby a potential difference across the capacitive elements of a pre-determined level, the shunt circuit forms a shunt to shunt the charging current thereto.
    Type: Grant
    Filed: October 25, 1990
    Date of Patent: November 5, 1991
    Assignee: Motorola, Inc.
    Inventor: John A. Kalenowsky
  • Patent number: 4998098
    Abstract: An voltage monitoring system including means for providing a voltage from a current and for reducing the voltage. The system also includes means for integrating the current. The integrating means provides an output which increases from an initial condition at a rate proportional to the voltage. The system further includes means for sensing when the output of the integrating means is above a predetermined level and for resetting the integrating means to the initial condition. Additionally, the system includes means for indicating when the output of the integrating means exceeds the predetermined level.
    Type: Grant
    Filed: January 26, 1989
    Date of Patent: March 5, 1991
    Assignee: Schweitzer Engineering Laboratories Inc.
    Inventor: Edmund O. Schweitzer, III
  • Patent number: 4975796
    Abstract: A device which enables a self-healing capacitor with more than one group of sections in series to undergo repetitive clearing without generating the resulting potential differences between the series sections which causes additional failures. In one embodiment, the device to conduct charge is a diode and resistor connected across each group of parallel sections so as to be nonconducting when the capacitor is charged but to become conducting when a clearing event occurs. An additional aspect of the device is a method for charging such a capacitor so that no section is overcharged.
    Type: Grant
    Filed: October 13, 1988
    Date of Patent: December 4, 1990
    Assignee: Aerovox Incorporated
    Inventor: Frederick W. MacDougall
  • Patent number: 4956739
    Abstract: A device to locate internal faults in a high-voltage capacitor battery that has a plurality of symmetrically parallel and series-coupled capacitor banks arranged in parallel branches coupled by shunt branches. The phase angles of the shunt currents flowing in the shunt branches relative to the total current flowing in the parallel branches are determined. A fault is located in one of the capacitor banks based upon these determined phase angles.
    Type: Grant
    Filed: June 27, 1989
    Date of Patent: September 11, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Michael Becker, Klaus Renz
  • Patent number: 4805063
    Abstract: A fault detector for detecting faults in a DC capacitor circuit connected to the DC buses of an inverter circuit using semiconductor device for converting direct current into alternating current to suppress the voltage pulsation and comprising a plurality of parallel-connected capacitor circuits each having a plurality of series-connected DC capacitors. The fault detector comprises a comparison means connected to the junctions of the series-connected DC capacitors to compare the respective potentials of the parallel-connected capacitor circuits, and detects the short-circuit and time-aging of the DC capacitors of the parallel-connected capacitor circuits rapidly on the basis of the output signal of the comparison means.
    Type: Grant
    Filed: April 21, 1987
    Date of Patent: February 14, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Michio Kataoka, Shigenori Higashino
  • Patent number: 4750076
    Abstract: A geometric arrangement for filter capacitors used in high frequency power supplies such that a multiplicity of paralleled capacitors not only share the current but also provide optimum filtering. The terminals of each of the capacitors are connected by equal inductances to receive the rectified alternating current. The capacitor terminals are also connected directly to the output of the supply in order to provide the D.C. current thereto.
    Type: Grant
    Filed: April 20, 1987
    Date of Patent: June 7, 1988
    Assignee: Reliance Comm/Tec Corporation
    Inventor: Neil Kammiller
  • Patent number: 4330777
    Abstract: A device for detecting imminent failure of a high-dielectric stress capacitor utilizing circuitry for detecting pulse width variations and pulse magnitude variations. Inexpensive microprocessor circuitry is utilized to make numerical calculations of digital data supplied by detection circuitry for comparison of pulse width data and magnitude data to determine if preselected ranges have been exceeded, thereby indicating imminent failure of a capacitor. Detection circuitry may be incorporated in transmission lines, pulse power circuitry, including laser pulse circuitry or any circuitry where capacitors or capactior banks are utilized.
    Type: Grant
    Filed: November 5, 1980
    Date of Patent: May 18, 1982
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventor: George G. McDuff
  • Patent number: 4329638
    Abstract: The present invention refers to capacitive voltage transformers.In accordance with one embodiment a capacitive voltage transformer has two capacitors connected in series between a point on a high voltage line and a reference point such as earth and two impedances connected in series with the two capacitors.A medium voltage electromagnetic detector is connected between the common point of the two capacitors and the common point of the two impedances. An electronic voltage detector is connected to the terminals of the series circuit formed by the two impedances, the values of the latter being selected in order that the instantaneous voltage at the terminals of the electronic detector is always a constant fraction of the voltage taken off between the line and the reference point.Application to the operation of highspeed static protections from a capacitive voltage transformer having a medium voltage electromagnetic circuit.
    Type: Grant
    Filed: September 23, 1980
    Date of Patent: May 11, 1982
    Assignee: Enertec
    Inventor: Daniel Le Maguet
  • Patent number: 4326230
    Abstract: A circuit for monitoring the voltage stress of a capacitor which produces an over-stress indicator signal responsive to the over-voltage history of the capacitor. If the measured voltage stress of the capacitor exceeds a predetermined over-voltage value, a characteristic-curve generator, having a predetermined transfer function, produces an output signal which is responsive to the measured voltage stress of the capacitor and the transfer function of the characteristic-curve generator. This signal is combined with a further signal which is responsive to a predetermined permissible continuous operation voltage value. The combined signals are conducted to an integrator having a predetermined integration time constant for producing an overload signal. The overload signal at the output of the integrator is a measure of the state of stress of the capacitor. Circuitry may be provided for disconnecting the capacitor from a transmission line in response to the output signal of the integrator.
    Type: Grant
    Filed: July 3, 1980
    Date of Patent: April 20, 1982
    Assignee: Siemens Aktiengesellschaft
    Inventors: Michael Becker, Klaus Renz, Manfred Weibelzahl, Alfons Fendt, Dusan Povh, Gerhard Schuch, Hermann Waldmann
  • Patent number: 4322766
    Abstract: A circuit for monitoring the capacitor battery of a filter circuit connected to a transmission line, the capacitor battery consisting of at least two parallel legs, each with a number of series-connected capacitors. A first signal is produced which corresponds to the total alternating current flowing through the capacitor battery. A second signal is produced which corresponds to the difference between the currents flowing through the respective parallel legs of the capacitor battery. The current difference signal is compared with a respective fraction of the total current signal. A fault indicator signal is produced if the difference between the difference current signal and the fractional total current signal exceeds a predetermined threshold value. Further circuitry is provided for correcting drift in the difference current signal, which may be caused by temperature variations or acceptable capacitor failures.
    Type: Grant
    Filed: July 3, 1980
    Date of Patent: March 30, 1982
    Assignee: Siemens Aktiengesellschaft
    Inventors: Michael Becker, Klaus Renz, Manfred Weibelzahl
  • Patent number: 4295174
    Abstract: A multi-series group capacitor bank has voltage limiters, of the metal oxide type, connected across each individual series group and set at a protection level higher than that of the bank bypass spark gap so the voltage limiters bypass a series group when capacitor fuse clearing causes high voltage build-up in that series group.
    Type: Grant
    Filed: May 29, 1979
    Date of Patent: October 13, 1981
    Assignee: Westinghouse Electric Corp.
    Inventors: Charles A. Peterson, Louis C. Grove, Jr.
  • Patent number: 4219856
    Abstract: A protective device for a capacitor bank is coupled to a cross-connection between equipotential points in two sub-banks forming the bank. Current or voltage surges, indicative of a capacitor failure are counted and when a threshold level is exceeded, an alarm may be energized.
    Type: Grant
    Filed: March 2, 1978
    Date of Patent: August 26, 1980
    Assignee: ASEA Aktiebolag
    Inventors: Per Danfors, Nils Fahlen, Owe Nerf
  • Patent number: 4104687
    Abstract: A sensing device is connected to an intermediate tap point on each phase leg of a polyphase system such as a grounded wye-connected capacitor bank to detect faulted capacitor units and thereby control a switching device to isolate the capacitor bank. The intermediate tap point is selected in each phase leg such that the number of series units (such as parallel capacitor groups) above the tap point equals (or exceeds by one) the number of series units below the tap point. The outputs of these sensing devices are coupled through a calibration network to a summing amplifier which operates to add the three signals vectorily to produce on AC output signal that is filtered by a 60 Hz band pass filter to attenuate unwanted harmonics and noise which might introduce error into the measurement. Initial balance is achieved by adjusting the magnitude of each phase to ground signal to equalize those signals from each of the intermediate tap points.
    Type: Grant
    Filed: November 24, 1976
    Date of Patent: August 1, 1978
    Assignee: S&C Electric Company
    Inventor: John A. Zulaski