Abstract: A system for controlling energy consumption. The system may incorporate devices configured on a floor map, a monitor that detects energy consumption by each device, a heat map shown on the floor map, a processor, and a user interface having a display connected to the processor. The heat map may indicate energy consumption in various areas of the floor plan. The floor map with the heat map may be a screen on the display. The energy consumption by each of the devices from the monitor may be calculated by the processor in time that each device is active and in a power rating of the respective device. The energy consumption by each of the devices may be converted by the processor into cost. From a screen, a user may define a virtual and dynamic zone to optimize and control the energy consumption.

Abstract: An electrolytic capacitor according to the present disclosure includes an anode body, a cathode body, a solid electrolyte, and a liquid component. The anode body has a surface provided with a dielectric layer. The solid electrolyte is in contact with the dielectric layer, is disposed between the anode body and the cathode body and contains conductive polymer. The liquid component is in contact with the dielectric layer and the solid electrolyte and contains a solvent and an acid component. The acid component contains a first polymer acid component including a sulfonic acid group or a carboxylic acid group.

Abstract: A method of manufacturing a multilayer ceramic capacitor includes alternately laminating dielectric layers and internal electrode layers to manufacture a multilayer body, forming an external electrode connected with the internal electrode layers on each of two end surfaces of the multilayer body to manufacture a capacitor main body, connecting two interposers via an insulator, holding the two interposers connected via the insulator on a holding portion, placing the capacitor main body on the two interposers on the holding portion such that the external electrode is connected to each of the two interposers, and removing the holding portion.

Abstract: A power converter can include: a plurality of circuit modules coupled in parallel between a first port and a second port, where each of the plurality of circuit modules includes a switching power stage circuit having a first magnetic element coupled between a switch node of the switching power stage circuit and a first terminal of the second port, at least one switch group having first and second transistors and being coupled between a first terminal of the first port and a first terminal of the switching power stage circuit, and at least one first energy storage capacitor for providing energy to a load of the power converter; and a plurality of second energy storage capacitors configured to periodically store energy and release energy to corresponding first energy storage capacitors.

Abstract: Systems, methods, and devices are provided for identifying multiple faults across multiple phases of a multi-phase and/or multi-section capacitor bank. A protection device may measure various voltages and currents within the capacitor bank. A phase angle of the measured voltages and currents may be used to determine a location of the faults therein. For example, a phase angle of a compensated unbalance voltage may be compared to a phase angle of a positive-sequence voltage of the capacitor bank. A logic controller may use a difference between the phase angle of the compensated unbalance voltage and the phase angle of the positive-sequence voltage to determine a location (e.g., a phase and/or a section of the capacitor bank) of the faults in the capacitor bank.

Abstract: An electronic component includes a multilayer capacitor including a capacitor body having first to sixth surfaces, and first and second external electrodes; and an interposer including an interposer body and first and second external terminals; and the capacitor body includes a plurality of dielectric layers and a plurality of first and second internal electrodes, the first and second internal electrodes are exposed through the third and fourth surfaces of the capacitor body, respectively, and the interposer further includes first and second solder fillet limiting layers disposed on upper sides of both surfaces of each of the first and second external terminals in the first direction, respectively.

Abstract: A ceramic electronic device includes a multilayer structure in which each of dielectric layers and each of internal electrode layers are alternately stacked, wherein a main component of the dielectric layers is (Ba, Sr, Ca)(Zr, Ti)O3, wherein a Ba concentration and a Ca concentration have variation in at least one of crystal grains in the dielectric layers.

Abstract: A drive circuit is provided for controlling a solenoid valve having a solenoid coil. The drive circuit includes a first semiconductor device, a flyback circuit, and a processor. The first semiconductor is coupled in series with the coil and is controlled by a gate signal to energize the coil. The flyback circuit is in parallel with the coil and includes a series-coupled second semiconductor device and a diode. The second semiconductor is controlled by a flyback control signal to enable the flyback circuit when the first semiconductor is controlled by the gate signal to hold the valve open. The diode has a low forward voltage to slow decay of a current conducted through the coil. The processor generates the gate signal to control the first semiconductor and to reduce a duty cycle of the gate signal when the flyback circuit is enabled to reduce power consumption by the coil.

Abstract: An apparatus includes a case having an elliptical cross-section capable of receiving a plurality of capacitive elements. One or more of the capacitive elements provide at least one capacitor having a first capacitor terminal and a second capacitor terminal. The apparatus also includes a cover assembly that includes a deformable cover mountable to the case, and, a common cover terminal having a contact extending from the cover. The cover assembly also includes at least three capacitor cover terminals, each of the at least three capacitor cover terminals having at least one contact extending from the deformable cover. The deformable cover is configured to displace at least one of the at least three capacitor cover terminals upon an operative failure of at least one of the plurality of the capacitive elements. The cover assembly also includes at least four insulation structures. One of the four insulation structures is associated with one of the at least three capacitor cover terminals.

Abstract: A shield includes an inductor that includes outer electrodes and that is mounted on a substrate in or on which a wiring pattern is formed, a second capacitor that is electrically connected between one of the outer electrodes of the inductor and a ground pattern formed in or on the substrate, and a shield member that is disposed so as to cover the inductor and electrically connected to the one of the outer electrodes of the inductor, to which the second capacitor is connected. The second capacitor has frequency characteristics such that, when the self-resonance frequency of the second capacitor serves as a boundary, the impedance of the second capacitor decreases as the frequency increases on the low frequency side and that the impedance of the second capacitor increases as the frequency increases on the high frequency side.

Abstract: The present technology provides an electronic component with an interposer, including an electronic component and an interposer. An adhesive section is disposed in an opposing space between a main body of the electronic component and a substrate. When a direction in which first and second external electrodes of the electronic component face each other is a first direction, a direction orthogonal to the first direction is a second direction, and a direction in which the electronic component and the interposer face each other is a third direction, the adhesive section includes a plurality of unitary adhesive sections separated from each other, and the unitary adhesive sections are disposed in a two-dimensional array such that the number of unitary adhesive sections arrayed along the second direction is smaller on opposing sides in the first direction than at a center.

Abstract: A vehicle refrigeration system includes a vehicle power device, and a vehicle refrigeration device coupled to the vehicle power device. The vehicle refrigeration device includes an evaporator configured to provide cooling based upon refrigerant fluid, a condenser configured to process the refrigerant fluid downstream from the evaporator, and a compressor configured to operate based upon a combined voltage, and transmit the refrigerant fluid from the evaporator to the condenser.

Abstract: In an embodiment, a missing utility ground detection circuit includes a pair of balanced resistors each connected to receive utility voltage from a different one of a pair of utility power lines, the balanced resistors being connected together at a summing node to be capable of summing the voltages from the pair of utility power lines. It includes an unbalance resistor connected to shunt voltage from one of the utility power lines. It has a summing amplifier with an input coupled to the summing node and to a reference voltage, and an input coupled to a second reference voltage. It has an averaging circuit connected at the output of the summing amplifier. A comparator is provided having an input connected to the averaging circuit an input connected to a threshold voltage.

Abstract: An energy storage device, such as a capacitor or battery, is provided with a detector and detector support for signaling an expansion of the case caused by a buildup of internal pressure, wherein the detector support is provided with a base attached to a periphery of a side of the case, and the detector support has a superstructure for positioning the detector over an interior of the side of the case, whereby the interior expands a greater distance than the periphery of the side of the case in response to internal pressure.

Abstract: Apparatus (1) for use in disturbance evaluation systems based on disturbance extraction, which apparatus (1) comprises measuring means for obtaining signal frequency both before (4) and after a disturbance (3) in an electricity network but excluding use of the disturbance transient itself, and interpolation means (5) for interpolating frequency across the disturbance interval to reflect the underlying frequency trend (9) uninfluenced by the disturbance transient.

Abstract: An explosion-proof apparatus includes a stopper having a hollow cylindrical shape that is open at a first side and closed at a second side, and configured to be combined with an electrolytic condenser to surround an explosion-proof face of the electrolytic condenser and a lateral side connected to the explosion-proof face, through the first side, and a holder provided on the stopper to support the stopper. The first side of the stopper is separated from the explosion-proof face of the electrolytic condenser, a lateral side of the stopper has a stepped structure in which a periphery of a first region connecting to the first side is larger than a periphery of a second region connecting to the second side, and the holder is mounted on the stopper to surround at least part of the periphery of the second region of the stopper.

Abstract: A discharge control system of a vehicle includes a traction power inverter module (TPIM) configured to convert a first direct current (DC) voltage output by a first battery to alternating current (AC) power and apply the AC power to an electric motor. An accessory power module (APM) is configured to convert the first DC voltage into a second DC voltage of a second battery. A voltage calculation module is configured to, when the first DC voltage is less than an operation threshold voltage of the APM, determine the second DC voltage based on a function of the first DC voltage and the operation threshold voltage. A diagnostic module is configured to indicate whether a discharge fault is present. A discharge control module is configured to, when the discharge fault is present, based the first DC voltage and the second DC voltage, selectively control operation of the TPIM and the APM.

Abstract: A three-dimensional (3D) circuit structure includes a 3D insulating substrate having at least one circuit forming zone and at least one exposed contact forming zone; at least one circuit pattern portion provided on the 3D insulating substrate and having at least one circuit trace layout layer located in the circuit forming zone and at least one exposed contact located in the exposed contact forming zone and connected to the circuit trace layout layer; and an insulating encapsulation member covering at least the circuit forming zone and the circuit trace layout layer. With the insulating encapsulation member, the circuit trace layout layer is waterproof, dustproof, scratch-resistant, peeling-proof, secure for use, and compliant with safety codes of electrical insulation, enabling the 3D circuit structure in use to have stable electrical characteristics.

Abstract: A transceiver circuit for communicating data over a CAN bus having a first and second bus line the transceiver circuit comprising: a data input port, a data output port, a CAN-bus transceiver unit having a receive data output port for providing data received from the CAN-bus, and a transmit data input port for receiving data to be transmitted to the CAN-bus; a control input port for receiving a control signal indicative of whether transmission of data from this transceiver circuit to the CAN-bus is allowed or prohibited; a filtering circuit adapted for filtering the control signal received on the control input port and for providing a filtered control signal; a logic circuitry adapted for configuring the CAN-bus transceiver unit in receive mode based on the debounced control signal irrespective of ongoing communication on the CAN-bus.

Abstract: A capacitor component includes multilayer ceramic capacitors and an interposer board on which the multilayer ceramic capacitors are mounted. The interposer board is provided with four or more lands that are electrically connected to the corresponding external electrodes of the multilayer ceramic capacitors, an input terminal, and an output terminal, and each of the four or more lands is electrically connected to one of the input terminal and the output terminal.

Abstract: An electronic components includes: a multilayer capacitor including a capacitor body and a pair of external electrodes, an interposer including an interposer body and a pair of external terminals, and an adhesive; wherein the external terminal includes a bonding portion, a mounting portion, and a connection portion; wherein an adhesive is provided between the external electrode and the bonding portion, and falls along the connection portion of the external terminal; wherein 1.55?(L+T22)/T1 in which T2 is a height at which the adhesive falls along the connection portion of each of the external terminals, L is a length of the bonding portion, and T1 is a height of the electronic component.

Abstract: In an embodiment, a multilayer ceramic capacitor 10 has a capacitor body comprising a capacitive part 11a constituted by multiple internal electrode layers 11a1 that are stacked with dielectric layers 11a2 in between, as well as dielectric cover parts 11b that respectively cover both sides of the capacitive part 11a in the stacking direction. Also, the dielectric layers 11a2 of the capacitive part 11a, and the dielectric cover parts 11b, contain elemental manganese, and the elemental manganese is distributed in such a way that its quantity gradually decreases in the depth direction from the exterior faces of the dielectric cover parts 11b toward the center of the dielectric layers 11a2 of the capacitive part 11a.

Abstract: A subsea power supply arrangement includes a closed power supply module realized to contain a pressure-compensated main fluid volume; and a number of power cell arrangements arranged in the interior of the closed power supply module. At least one power cell arrangement includes a metal capacitor housing realized to contain a capacitor bank in a fluid volume, and a barrier between an interior fluid volume of the power cell arrangement and the main fluid volume. A subsea power cell arrangement for use in such a subsea power supply arrangement is also disclosed.

Abstract: A battery module is disclosed. In one aspect, the battery module includes a battery management system configured to control charge and discharge operations of a battery pack, and a conductor configured to form charge and discharge current paths of the battery pack. The battery module also includes a relay electrically connected to the conductor and configured to selectively block the charge and discharge current paths and a support plate supporting the battery management system, the conductor and the relay.

Abstract: The present invention relates to a motor assembly, a method of operation thereof and a transport vehicle provided with the motor assembly. The motor assembly is provided with an energy source switching controller that is in synchronization with motor operation and provides an improved utilization of energy storage sources in an electric, hybrid electric, or fuel cell based motor vehicle drive train application.

Abstract: A protected capacitor system/method implementing enhanced transient over-voltage suppression is disclosed. The system/method incorporates one or more surge suppression devices (SSDs) proximally located and in parallel with a capacitor structure to produce an overall protected capacitor structure having enhanced reliability and simultaneous ability to resist transient overvoltage conditions. The SSDs are formed from series combinations of transient voltage surge suppressors (TVSs) (metal oxide varistor (MOV), diode for alternating current (DIAC), and/or silicon diode for alternating current (SIDAC)) and corresponding shunt diode rectifiers (SDRs) and placed in parallel across a capacitor structure to locally suppress voltage transients across the capacitor structure in excess of the voltage rating of the capacitor structure.

Abstract: A capacitor assembly is provided having a case containing an upper capacitor and a lower capacitor in vertical alignment, each of the capacitor elements are separately sealed and provided with a pressure interrupter. A terminal board overlays the cover of the upper capacitor and is affixed to the top of the case. The terminals associated with the upper capacitor are mounted on the cover and extend through openings in the terminal board. The terminals associated with the lower capacitor are mounted on the terminal board and connected to contacts on the cover of the lower capacitor. The common leads of all of the capacitor elements are connected, thereby allowing any or all of the capacitor elements to be connected in parallel by accessing the terminals from the terminal board.

Abstract: A power supply device includes: a first electric power line; a second electric power line; a first boost converter; a second boost converter; a first current sensor; a second current sensor; a third current sensor; and an electronic control unit. The electronic control unit is configured to determine that a third switching element of the second boost converter has an on-failure when a battery current is a value at a time of being discharged from a battery, a first reactor current is a value at a time of passing from a side of a second positive electrode line to a side of a first center point, and a second reactor current is a value at a time of passing from a side of a second center point to a side of a second positive electrode line.

Abstract: The invention relates to an electric capacitor having at least one capacitor coil, a cylindrical housing that surrounds the capacitor coil, composed of metal, electric connectors, and connection lines that run in the housing interior and electrically connect the capacitor coil with the connectors, wherein at least one connection line has a planned breaking point, and wherein at least one circumferential depression is formed in the mantle of the housing, which depression divides the housing into a first segment and a second segment and can be unfolded by means of excess pressure in the housing interior, wherein the first segment surrounds the capacitor coil and the second segment carries the connectors.

Abstract: There is provided a composite electronic component and a board having the same, and the composite electronic component may include: an interposer board, and first and second electronic components mounted on upper and lower surfaces of the interposer board, respectively, and first and second electronic components are electrically connected to each other by an electrical connection part provided on the interposer board.

Abstract: The present techniques include methods and systems for detecting a failure in a capacitor bank of an electrical drive system. Embodiments include using discharge resistors to discharge capacitors in the capacitor bank, forming a neutral node of the capacitor bank. In different capacitor configurations, the neutral node is measured, and the voltage is analyzed to determine whether a capacitor bank unbalance has occurred. In some embodiments, the node is a neutral-to-neutral node between the discharged side of the discharge resistors and a neutral side of the capacitor bank, or between the discharged side of the discharge resistors and a discharged side of a second set of discharge resistors. In some embodiments, the node is a neutral-to-ground node between the discharged side of the discharge resistors and a ground potential.

Abstract: In one aspect, a method for controlling the operation of a power generation system configured to supply power to an electrical grid may generally include monitoring a rotor speed of a generator of the power generation system and determining a gain scaling factor based on the rotor speed, wherein the gain scaling factor increases with decreases in the rotor speed across a range of rotor speeds. In addition, the method may include adjusting a regulator gain to be applied within a current regulator of the power generation system based on the gain scaling factor and applying the adjusted regulator gain within the current regulator in order to generate a voltage command signal for controlling a power converter of the power generation system.

Abstract: A multilayer ceramic electronic component may include: a multilayer ceramic capacitor including a ceramic body in which a plurality of dielectric layers are stacked, a pair of first external electrodes and a pair of second external electrodes formed on both side surfaces of the ceramic body and extended to portions of a mounting surface of the ceramic body, and first and second internal electrodes alternately stacked, having the dielectric layer therebetween, exposed through at least one side surface of the ceramic body, and connected to the first and second external electrodes, respectively; and an interposer substrate including an insulation substrate bonded to the mounting surface of the multilayer ceramic capacitor, and first and second connection terminals formed on the insulation substrate and connected to the first and second external electrodes, respectively.

Abstract: A multilayer ceramic electronic component may include: a multilayer ceramic capacitor including a ceramic body, a plurality of first and second internal electrodes formed to be alternately exposed to both side surfaces of the ceramic body, having a dielectric layer therebetween, and first and second external electrodes connected to the first and second internal electrodes, respectively; and an interposer board including an insulation board coupled to the mounting surface of the multilayer ceramic capacitor and first and second connection terminals formed on the insulation board and connected to the first and second external electrodes, respectively.

Abstract: A battery pack is disclosed. In one embodiment, the battery pack includes a battery module including a plurality of battery units. It further includes a battery management unit including a plurality of charge terminals and a plurality of discharge terminals electrically connected to terminals of the plurality of battery units, and controlling charging/discharging of the battery module. It further includes a control unit including a plurality of discharge control terminals electrically connected to the plurality of discharge terminals, a discharge control switch installed between each of the plurality of discharge control terminals, and a charge recognizing unit, and controlling the operation of the discharge control switch according to the level of voltage detected by the charge recognizing unit.

Abstract: An apparatus is disclosed which includes an electrolytic capacitive element with multiple capacitor sections.

Abstract: The present invention relates to a method (100) and a device for discharging an intermediate circuit (9) of a power supply network (10), in particular a high-voltage network, wherein a consumer (7) can be connected to the power supply network (10). A first (11) and a second (12) discharge circuit for discharging the intermediate circuit (9) are provided. In a first step, the intermediate circuit (9) is discharged at least partially by means of the first discharge circuit (11) and, in a subsequent second step (104), the intermediate circuit (9) is further discharged (104) by means of the second discharge circuit (12).

Abstract: Described herein is a stacked switched capacitor (SSC) energy buffer circuit architecture and related design and control techniques.

Abstract: In a multilayer ceramic capacitor including outer electrodes electrically connected to inner electrodes of a ceramic body, a thickness of each of end portions of extension portions of the inner electrodes in a width direction is larger than a thickness of a corresponding one of middle regions in the width direction, and a distance from a first main surface of the ceramic body to a first auxiliary electrode closest to the first main surface is different from a distance from a second main surface of the ceramic body to a second auxiliary electrode closest to the second main surface in a stacking direction. Each of the first auxiliary electrode and the second auxiliary electrode has a continuity in the width direction of about 60% or more.

Abstract: An electronic apparatus includes: a temperature measurement section that measures a temperature of a heat generation source generating heat by consuming power or a temperature of an inner position of a casing of which the temperature changes due to the heat generation of the heat generation source; and an environmental temperature calculation section that calculates a temperature which is calculated using a predetermined relational equation that is different in accordance with a model from a difference between a first temperature measured by the temperature measurement section at a point in time when the heat generation source starts consuming a predetermined amount of power and a second temperature measured by the temperature measurement section at a point in time after the passage of a predetermined period from the start of consumption of a predetermined amount of power by the heat generation source as an environmental temperature in an environment where the casing is placed.

Abstract: This semiconductor device according to the present invention includes a plurality of cylindrical lower electrodes aligned densely in a memory array region; a plate-like support which is contacted on the side surface of the cylindrical lower electrodes, and links to support the plurality of the cylindrical lower electrodes; a pore portion provided in the plate-like support; a dielectric film covering the entire surface of the cylindrical lower electrodes and the plate-like support in which the pore portion is formed; and an upper electrode formed on the surface of the dielectric film, wherein the boundary length of the part on the side surface of the cylindrical lower electrode which is exposed on the pore portion is shorter than the boundary length of the part on the side surface of the cylindrical lower electrode which is not exposed on the pore portion.

Abstract: Systems, methods and devices for monitoring temperature are presented herein. A method of monitoring temperature in a system, such as a capacitor bank, is disclosed. The method may include: receiving first device temperature signals indicative of the temperature of a first device over a predetermined period of time; receiving second device temperature signals indicative of the temperature of a second device over a predetermined period of time; determining a first rolling average temperature for the predetermined period of time from the first device temperature signals; determining a second rolling average temperature for the predetermined period of time from the second temperature signals; and triggering a disconnect event in response to a determination that either the first or the second rolling average temperature is greater than a predetermined maximum working temperature.

Abstract: A MOS-type semiconductor input capacitor protection circuit and system is described. In one embodiment, the system includes a MOS device configured as an input capacitor and configured to receive an input bias voltage. A bias monitor circuit is configured to monitor the input bias voltage and apply a selective capacitor bias voltage to the input capacitor so as to limit the voltage across the input capacitor to a level below a threshold voltage.

Abstract: A harmonic protection method for a capacitor bank uses a harmonic protection apparatus, which includes a CPU unit, a current and voltage sampling unit, and a protection device. The CPU unit obtains effective value I1 of fundamental wave current of the capacitor bank, and effective value In of the n-th harmonic wave current of the capacitor bank, where n is harmonic order and ranges from 2 to ?, and calculates the true effective value I of current of the capacitor bank by I = I 1 2 + ? n = 2 ? ? k n ? I n 2 provided that kn=rn/r1, kn is the n-th harmonic coefficient, rn is power consumption equivalent resistance of the capacitor bank for the n-th harmonic, r1 is power consumption equivalent resistance of the capacitor bank at a fundamental frequency. When I?1.3 IN, the CPU unit controls the protecting device to disconnect the capacitor bank, provided that IN is a threshold current of the capacitor bank.

Abstract: The present invention relates to a battery charge/discharge protection circuit that protects an associated battery from charge/discharge damage. The charge/discharge protection circuit includes a first terminal, a second terminal, a charge over-current detection circuit, a discharge over-current detection circuit, a short circuit detection circuit, and a PMOS transistor. A drain electrode and a gate electrode of the PMOS transistor are connected to the first terminal and the second terminal respectively. A source electrode of the PMOS transistor is connected to the charge over-current detection circuit, the discharge over-current detection circuit and the short circuit detection circuit, such that when a voltage above an overvoltage threshold is supported by the charger, the voltage of the source electrode of the PMOS transistor is maintained above a negative threshold voltage and the elements in these circuits do not receive such a voltage output by the charger.

Abstract: The present techniques include methods and systems for detecting a failure in a capacitor bank of an electrical drive system. Embodiments include using discharge resistors to discharge capacitors in the capacitor bank, forming a neutral node of the capacitor bank. In different capacitor configurations, the neutral node is measured, and the voltage is analyzed to determine whether a capacitor bank unbalance has occurred. In some embodiments, the node is a neutral-to-neutral node between the discharged side of the discharge resistors and a neutral side of the capacitor bank, or between the discharged side of the discharge resistors and a discharged side of a second set of discharge resistors. In some embodiments, the node is a neutral-to-ground node between the discharged side of the discharge resistors and a ground potential.

Abstract: An output circuit includes a first transistor coupled to an external terminal and having a gate terminal that receives a first drive signal. The first transistor pulls down a potential at the external terminal when activated in accordance with the first drive signal. The output circuit also includes a capacitor. The capacitor includes a first end coupled to the gate terminal of the first transistor. A clamp circuit, coupled to a second end of the capacitor, clamps the second end of the capacitor to a potential corresponding to the operation of the first transistor. The first transistor includes a drain terminal that is not coupled to the capacitor but is coupled to the external terminal.

Abstract: Insulating ribs are formed into one or more portions of a housing that encloses circuitry of an electrical device. Components mounted on a board are separated according to whether they are related to a primary side of a power transformer or a secondary side. Primary related components are typically mounted on the primary side of an isolation slot formed into a circuit board and components related to the secondary are mounted on the other side. The insulating ribs are strategically placed to protrude through the slots when circuit board is mounted to the housing portion. Thus, when the housing portion is joined to another housing portion, which also may include insulating ribs strategically placed, the ribs increase the breakdown voltage of the boundary.

Abstract: An apparatus and method is provided for identifying a faulted phase in at least one shunt capacitor bank. The apparatus generally includes a sampling circuit for sampling current or voltage signals associated with the shunt capacitor bank. A microcontroller is coupled to the sampling circuit and programmed to measure a compensated neutral point phase angle from the sampled signal, and compare the compensated neutral point phase angle with a fixed reference phase angle to identify the faulted phase of the shunt capacitor bank. The method generally includes the steps of sampling a current or voltage signal associated with the shunt capacitor bank, determining a compensated neutral point phase angle from the sampled signal, and comparing the compensated neutral point phase angle with a fixed reference phase angle to identify the faulted phase of the shunt capacitor bank. The invention also relates to an apparatus and method for identifying the location of the fault (e.g.

Abstract: An electrical bypass element, suitable for bypassing defective storage cells in energy storage devices includes two electrical conductors between which is formed a layer sequence with at least one electrical insulation layer and one or more reactive layer stacks, in which an exothermic reaction can be triggered. The reactive layer stacks and the insulation layer are matched to one another such that the insulation layer disintegrates as a result of the thermal energy released during the exothermic reaction and an electrical connection is produced between the electrical conductors. The electrical bypass element can be actively triggered even before the ultimate failure of a storage cell so that higher power losses in the energy storage device can be avoided.