Abstract: A semiconductor device includes a support substrate with leads arranged therearound, a semiconductor die on the support substrate, and a layer of laser-activatable material molded onto the die and the leads. The leads include proximal portions facing towards the support substrate and distal portions facing away from the support substrate. The semiconductor die includes bonding pads at a front surface thereof which is opposed to the support substrate, and is arranged onto the proximal portions of the leads. The semiconductor device has electrically-conductive formations laser-structured at selected locations of the laser-activatable material.

Abstract: A sensor device includes a magnetic field sensor component, including a chip carrier having a connection conductor and a magnetic field sensor chip arranged on the chip carrier, and a magnet, wherein the magnetic field sensor component is arranged on a mounting surface of the magnet, wherein the mounting surface has an elevation and the connection conductor is bent around the elevation.

Abstract: A method of manufacturing an electronic device in which an electronic component coupled to a lead is covered with a mold cover, includes: a coupling step of coupling the electronic component to the lead, a bending step of bending the lead to adjust a posture of the electronic component, and a molding step of molding the electronic component with a resin material to form the mold cover, and the bending step includes a lead bending step of bending the lead by pressing a pressing member against the lead without pressing the pressing member against the electronic component.

Abstract: A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. A plurality of through-substrate vias (TSVs) is in the substrate and electrically coupled to the interconnect structure. A first die is over and bonded onto the interposer. A second die is bonded onto the interposer, wherein the second die is under the interconnect structure.

Abstract: A lead frame includes: a support portion having a through-hole formed in as end; a lead; and a heat dissipation plate welded with the support portion in one opening of the through-hole. A manufacturing method of a lead frame includes: shaping a frame member from a metal plate, the frame member including a support portion having a through-hole formed in an end, and a lead; and welding a heat dissipation plate with the support portion in one opening of the through hole.

Abstract: A circuit board assembly includes a circuit board, an electronic surface mount device (SMD), and a spacer that attaches the SMD to the circuit board. A coefficient of thermal expansion (CTE) of the spacer is closer to a CTE of the SMD than a CTE of the circuit board. The circuit board assembly also includes a flexible electrical lead that extends between and that is electrically connected to the SMD and the electrical node of the circuit board. Methods of manufacturing the circuit board assembly include selectively heating joining material at a predetermined heating rate and selectively cooling the joining material at a predetermined cooling rate to attach the flexible electrical leads to the SMD and the circuit board.

Abstract: A microelectromechanical system (MEMS) microphone includes a cavity to receive an acoustic signal. The acoustic signal causes movement of a diaphragm relative to one or more other surfaces, which in turn results in an electrical signal representative of the received acoustic signal. A light sensor is included within the packaging of the MEMS microphone such that an output of the light sensor is representative of a light signal received with the acoustic signal. The output of the light sensor is used to modify the electrical signal representative of the received acoustic signal in a manner that limits light interference with an acoustical output signal.

Abstract: A computing device includes a peripheral component interconnect (PCI) card and a heater apparatus. The heater apparatus is located proximate to the PCI card and configured to heat the PCI card.

Abstract: A heat equalization plate includes a first copper clad laminate including a first copper foil, a second copper clad laminate including a second copper foil, a connecting bump, a plurality of thermally conductive bumps, and a working fluid. The second copper foil faces the first copper foil. The connecting bump is formed on a surface of the first copper foil facing the second copper foil. The thermally conductive bumps are formed on a surface of the first copper foil facing the second copper foil. The connecting bump is an annulus and surrounds the thermally conductive bumps. The connecting bump is connected to the second copper foil to form a sealed chamber. The thermally conductive bumps are received in the sealed chamber. The working fluid is received in the sealed chamber. The present invention also needs to provide a method for manufacturing the heat equalization plate.

Abstract: Aspects of this disclosure relate to a miniaturized digital radar system and method that can be fabricated on a Printed Circuit Board (PCB) and/or a chip, such as on a System-On-a-Chip (SOC). The digital radar system can operate at the S-band (e.g. in the range of 3 GHz). Advantageously, the S-band frequency range is less susceptible and/or not susceptible to clutter from precipitation and is well suited for long range surveillance applications. The small form factor of the miniaturized digital radar system on the PCB and/or the SOC can be implemented on small and/or low-observable platforms, such as on fixed or rotary wing unmanned aerial vehicles.

Abstract: A temperature sensor of a thermal monitoring system is provided for use in power distribution systems. The temperature sensor comprises ceramic printed circuit board (PCB) and a terminal. The ceramic PCB includes a temperature sensing element disposed on a side of the ceramic PCB. The terminal is configured to be fixed directly in contact with a measured point and is directly in touch with the ceramic PCB such that heat is conducted from the terminal, through the ceramic PCB and then to the temperature sensing element. The temperature sensing element is configured to generate an electrical signal in response to the heat such that the electrical signal is sent through a pair of lead wires to a controller for monitoring a temperature. The temperature sensor further comprises an overmolded plastic material to seal a portion of the terminal, the ceramic PCB in its entirety and a portion of the pair of lead wires to ensure a desired physical strength and a desired dielectric strength.

Abstract: A method for manufacturing a flexible circuit board is provided. The method for manufacturing a flexible circuit board includes the following steps: providing a carrier substrate, forming a flexible substrate on the carrier substrate, and forming a plurality of circuit strings on the flexible substrate. A flexible circuit board manufactured by the above method is also provided.

Abstract: An electronic component includes an element body, an external electrode, and a metal terminal. In the metal terminal, a base includes a first surface and a second surface opposing each other, and a pair of third surfaces coupling the first surface and the second surface. A first metal layer is disposed on the first surface and connected to solder with which the external electrode and the metal terminal are connected together. A second metal layer is disposed on the second surface. A coating layer is disposed on each of the third surfaces. The first metal layer and the second metal layer each include an outermost layer containing Sn. Each of the coating layer includes an outermost layer lower in solder wettability than the respective outermost layers of the first metal layer and the second metal layer.

Abstract: A semiconductor device includes a semiconductor element, a bonding wire that is electrically connected to the semiconductor element, a connection terminal, and sealing material that seals the semiconductor element, the bonding wire, and a part of the connection terminal. In addition, the connection terminal includes a plate-shaped lead part having a bonding area to which the bonding wire is bonded and an anchor part protruding from a first side part of the lead part. In the semiconductor device, since the rear surface of a die pad and the rear surface of the lead part exposed to the outside in a sealing main surface of the sealing material occupy a predetermined area or more, the heat dissipation of the semiconductor device is improved.

Abstract: An electronic device has a sealing part 90, a first main terminal 11 protruding outward from the sealing part 90, a second main terminal 12 protruding outwardly from the sealing part, an electronic element 95 provided in the sealing part and having a front surface electrically connected to the first main terminal 11 and a back surface electrically connected to the second main terminal 12, a head part 40 connected to the front surface of the electronic element 95, a sensing terminal 13 protruding to an outside from the sealing part 90 and used for sensing and a connection part 35 integrally formed with the head part 40 and electrically connected to the sensing terminal 13. A current flowing through the sensing terminal 13 and the connection part 35 among a sensing current path does not overlap a main current path flowing through the second main terminal 12, the electronic element 95 and the first main terminal 11.

Abstract: Provided is an electronic component including a coil portion including a base including a conductive metal, and a terminal portion that is connected to a predetermined circuit board. A front surface of the base is covered, and the terminal portion is exposed.

Abstract: A semiconductor device package includes an electrically conductive die pad having a die attach surface and an outer surface. A semiconductor die is mounted on the die attach surface. An encapsulant material encapsulates the semiconductor die and exposes the outer surface of the die pad. A first lead directly contacts the die pad, extends away from a first sidewall of the encapsulant material, and bends towards a lower side of the encapsulant material. A second lead is electrically connected to a terminal of the semiconductor die, extends away from a second sidewall of the encapsulant material, and bends towards the lower side of the encapsulant material. A first lateral section of the first lead that intersects the first sidewall is vertically offset from a second lateral section of the second lead that intersects the second sidewall.

Abstract: A conductor track which is designed in particular for use with ultrasonic welding. The invention also relates to an associated method and to an associated use.

Abstract: An electrical connection contact (5) for a ceramic component (2) is specified. The connection contact (5) comprises a first material (M1) and a second material (M2) arranged thereon, wherein the first material (M1) has a high electrical conductivity and the second material (M2) has a low coefficient of thermal expansion.

Abstract: A sensor package includes a lead frame, a sensor component, and first and second capacitors. The lead frame has a sensor mounting area and first and second leads. The sensor mounting area, the first lead, and the second lead are characterized by a first side and a second side. The sensor component is attached to the first side of the sensor mounting area of the lead frame. The first capacitor is interconnected between the first and second leads, with the first capacitor being attached to the first side of each of the leads. The second capacitor is interconnected between the first and second leads, with the second capacitor being attached to the second side of each of the leads. The first and second capacitors are arranged in stacked relation with one another on opposing sides of the leads, and the sensor component and capacitors are located in a single housing.

Abstract: A chip stack structure using conductive film bridge adhesive technology comprises a substrate, a first chip, at least one bridge element, a conductive film, and a second chip. The first chip is electrically connected to a first electrode of the substrate. The at least one bridge element has a first bridge surface and a second bridge surface at two ends, and the first bridge surface and the second bridge surface are electrically connected to the first chip and a second electrode of the substrate, respectively. The conductive film is electrically connected to the first bridge surface of the at least one bridge element. The second chip is stacked and electrically connected to the conductive film. Thus, the structure of the present invention not only facilitates the ease of stacking the chips but also increases the effectiveness of the chips heat dissipation and ability of withstanding electrical current.

Abstract: A package component includes a surface dielectric layer having a first planar surface, and a metal pad in the surface dielectric layer. The metal pad includes a diffusion barrier layer that includes sidewall portions, and a metallic material encircled by the sidewall portions of the diffusion barrier layer. The metallic material has a second planar surface level with the first planar surface. An air gap extends from the second planar surface of the metallic material into the metallic material. An edge of the air gap is aligned to an edge of the metallic material.

Abstract: An embodiment of a packaged device includes first and second package leads, a first integrated circuit (IC) die, and a sub-assembly that includes a second IC die coupled to a substrate. The first IC die has a first coil, and the second IC die has a second coil. The first and second IC die are arranged within the device so that the first and second coils are aligned with each other across a gap between the first and second IC die, and the first and second IC die are galvanically isolated from each other. The first IC die is electrically coupled to the first package lead (e.g., with a wirebond), and a substrate bond pad is electrically coupled to the second package lead (e.g., with a wirebond). The sub-assembly also may include encapsulation at least over a wirebond that electrically couples the second IC die to the substrate.

Abstract: It is made for the layout of the mounting wiring at the time of mounting to become efficient by changing the structure of a semiconductor device. A first chip is mounted on a first die pad, and a second chip is also mounted on a second die pad. A first die pad and a second die pad do division structure in parallel to the first side and second side of sealing body 40. As a result, the pin for an output from a first chip and the pin for control of the circuit for a drive can make it able to project from a counter direction, and can set the wiring layout at the time of mounting as the minimum route.

Abstract: Disclosed herein is a power module package including: a substrate having a ceramic layer formed in one surface thereof; a circuit pattern formed on the ceramic layer; a first lead frame having one side contacting the circuit pattern and the other side protruding toward the outside; and a first semiconductor chip mounted on one side of the first lead frame.

Abstract: A Hall sensor is provided having a first Hall element with a first terminal contact and with a second terminal contact and with a third terminal contact, a second Hall element with a fourth terminal contact and with a fifth terminal contact and with a sixth terminal contact, a third Hall element with a seventh terminal contact and with an eighth terminal contact and with a ninth terminal contact, and a fourth Hall element with a tenth terminal contact and with an eleventh terminal contact and with a twelfth terminal contact. The first Hall element and the second Hall element and the third Hall element and the fourth Hall element are connectable in series.

Abstract: A light emitting diode package includes a metallic frame, and an LED chip disposed on the metallic frame. The metallic frame includes first and second metal plates arranged side by side with a space therebetween, and two support arms extending integrally and respectively from two opposite ends of the second metal plate to a level higher than the second top surface and that further extend toward the first metal plate at a level higher than the first top surface crossing the space. The support arms are not in contact with the first metal plate. An encapsulant encapsulates the metallic frame and the LED chip. At least a region of the encapsulant that covers the LED chip is transparent.

Abstract: Electrical component assemblies and other electrical connectors are provided having protective coatings that allow for use in high temperature and highly corrosive environments. Methods for applying protective coatings are also provided. In one embodiment, a connector is provided and includes a protective coating that encapsulates at least a portion thereof. The connector can be, for example, an electrical lead frame, or a connector having a distal side and a proximal side that is disposed in an automotive fuel system such that the distal side is sealed from the proximal side. Methods for coating connectors are also provided.

Abstract: An integrated circuit device includes a support for supporting electrical circuitry, an integrated circuit having electrical circuitry disposed on the support, and a magnetic portion attached to the support around the integrated circuit. The integrated circuit and the magnetic portion are interconnected for converting a power input signal having a first characteristic to a power output signal having a second characteristic different from the first characteristic.

Abstract: The present invention discloses an electronic package structure. The body has a top surface with a cavity thereon, the first conductive element is disposed in the cavity, and the second conductive element is disposed in the body. The first external electrode electrically connected to the first conductive element and the second external electrode electrically connected to the second conductive element are both disposed on the top surface of the body or a first surface formed by the top surface of the encapsulation compound and the exposed portions of the top surface of the body which are not covered by the encapsulation compound.

Abstract: Electronic devices including a semiconductor device package, a substrate, and first and second solder joints. The semiconductor device package includes a die pad, leads and enhancement elements surrounding the die pad, a chip electrically connected to the leads, and a package body encapsulating the chip, portions of the leads, and portions of the enhancement elements, but leaving exposed at least a side surface of each enhancement element. Side surfaces of the enhancement elements and the package body are coplanar. The substrate includes first pads corresponding to the leads and second pads corresponding to the enhancement elements. The first solder joints are disposed between the first pads and the leads. The second solder joints are disposed between the second pads and the enhancement elements. The second solder joints contact side surfaces of the enhancement elements. The surface area of the second pads is greater than the surface area of the corresponding enhancement elements.

Abstract: An assembly for packaging one or more electronic devices in die form. The assembly includes substrates on opposite sides of the assembly, with lead frames between the electronic devices and the substrates. The substrates, lead frames, and electronic devices are sintered together using silver-based sintering paste between each layer. The material and thicknesses of the substrates and lead frames are selected so stress experienced by the electronic devices caused by changes in temperature of the assembly are balanced from the center of the assembly, thereby eliminating the need for balancing stresses at a substrate level by applying substantially matching metal layers to both sides of the substrates.

Abstract: A power switch assembly includes a flip-chip type integrated circuit chip and a lead-frame with a plurality of spaced apart parallel lead sections. The flip-chip type integrated circuit chip includes a distributed transistor, and first and second pluralities of flip-chip interconnects connected to source and drain regions, respectively. The first and second lead sections at least partially overlap along the first axis. Each of the plurality of lead sections includes a contact portion and an extended portion extending laterally from the contact portion. The extended portions of the first and second lead section extend from the contact portion in opposite directions. The first side of the first and second lead section contacts at least two of the first and plurality of flip-chip interconnects, respectively. The second side of the first and second lead are configured to contact a first and second contact area on a printed circuit board, respectively.

Abstract: A module (1) includes a first functional device (2) and a second functional device (3). The first functional device (2) includes a base electrode, an emitter electrode and a collector electrode. The second functional device (3) includes at least one electrode. The module (1) further includes a conductive frame (4). One of the base electrode, the emitter electrode, and the collector electrode of the first functional device (2) is directly connected to the frame (4). The electrode of the second functional device (3) is also directly connected to the frame (4). The frame (4) includes a portion serving as a terminal for external connection.

Abstract: A method of making a stacked semiconductor package having at least a leadframe, a first die mounted above and soldered to the lead frame and a first clip mounted above and soldered to the first die. The method includes positioning the leadframe, first die and first clip in a vertically stacked relationship and nonsolderingly locking the first clip in laterally nondisplaceble relationship with the leadframe. A stacked semiconductor package and an intermediate product produced in making a stacked semiconductor package are also disclosed.

Abstract: A power supply module and a method for manufacturing the same are disclosed. The power supply module includes a coil including a coil body and a connecting terminal; electronic components at least including an integrated circuit chip; a connector configured to be electrically connected with the coil and the electronic component; and a magnetic conductor configured to enclose in and around the coil body and the electronic component, wherein the connector is integrally formed with the integrated circuit chip when manufacturing the latter. The present disclosure can make the structure of the power supply module be more compact to further meet the needs of miniaturization design, reduce material consumption, simplify procedure, and therefore reduce the production costs.

Abstract: A carrier for mounting a piezoelectric device, e.g., a surface acoustic wave (SAW) device, on a circuit board and a method of mounting a piezoelectric device on a circuit board using such a carrier are disclosed. The carrier includes a carrier bottom, a plurality of metal contacts, and a carrier lid attached to the carrier bottom. The carrier bottom has an opening extending partially through the carrier bottom from a top surface thereof and the opening is configured such that when a piezoelectric device to be mounted in the carrier is inserted into the carrier bottom, the piezoelectric device is at least partially recessed within the carrier bottom. The metal contacts include a cantilevered end configured for electrical connection to a piezoelectric device. The carrier lid is configured to retain a piezoelectric device within the carrier bottom and to apply substantially even pressure across a top surface of a piezoelectric device.

Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.

Abstract: A device for carrying high-voltage equipment in an electrically-insulated manner includes a carrier platform which is mounted and electrically insulated by way of support insulators. The high-voltage equipment is supported on the carrier platform. The carrier platform has primary carriers with which the platform rests on the support insulators. In order to achieve a device that prevents deflections of the carrier platform in a cost-effective manner, the high-voltage equipment is at least partially arranged in a carrier structure that is equipped with support feet, with each foot arranged vertically above a primary carrier.

Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.

Abstract: A semiconductor device is formed by molding using a resin with a semiconductor element and one or two heat dissipating plates contained therein, said one or two heat dissipating plates being disposed to face one surface or both the surfaces of the semiconductor element. An intermediate layer is formed by spraying a metal powder to the semiconductor element and to one of or both of the heat dissipating plates using a cold spray method, and the semiconductor element and the heat dissipating plate are bonded together using a solder with the intermediate layer therebetween.

Abstract: A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.

Abstract: According to one embodiment of a capacitor module, the capacitor module includes a substrate having a metallization on a first side of the substrate, a plurality of connectors electrically coupled to the metallization and a plurality of capacitors disposed on the metallization. The plurality of capacitors includes a first set of capacitors electrically connected in parallel between a first set of the connectors and a second set of the connectors. The capacitor module further includes a housing enclosing the plurality of capacitors within the capacitor module.

Abstract: A lead frame includes adjacent die pads which lie adjacent to each other; grounding leads extended from the adjacent die pads; a connecting bar by which the grounding leads extended from the adjacent die pads are interconnected. The grounding leads and the connecting bar are formed to be thinner at one surface than a maximum thickness of leads of the lead frame, the grounding leads extended from the adjacent die pads are aligned on a common axis while providing the connecting bar between the grounding leads, and a support projection is provided at the one surface on the connecting bar in the common axis.

Abstract: A high bandwidth solder-less lead may be connected to an electrical device having land patterns so that signals on the device may be more easily measured through the lead. The lead includes an attachment mechanism to mount the lead on the device, a microspring housing and at least one microspring. The microspring connects one of the particular land patterns on the device to the lead where it may be easier to couple to a measurement device than to the electrical device itself The lead may be coupled to a flexible electrical conduit to make attaching to the testing device even easier. In other versions, a uniform connector may be temporarily attached to the solder-less lead to test the device. Then the connector may be disconnected from the first lead and connected to another lead to test another area of the device.

Abstract: In order to prevent an increase in temperature of a discharge resistance discharging an electric charge accumulated in a smoothing capacitor, the present description discloses a power module. The power module has a first lead frame, a second lead frame, first and second semiconductor switches connected in series between the first lead frame and the second lead frame, a resistor connected between the first lead frame and the second lead frame, and a resin package that encapsulates the first lead frame, the second lead frame, the first semiconductor switch, the second semiconductor switch, and the resistor. In this power module, a radiator portion for radiating heat from the first lead frame and/or the second lead frame is formed in at least a part of the package.

Abstract: A Ferritic stainless steel, non Ferritic stainless steel or carbon steel based lead frame and method for producing same is provided. The lead frame is preferably used for TantalumNiobium capacitors but could possibly be applicable to other integrated circuits with the same operating parameters. Any reference to Tantalum capacitors in this application applies equally to Niobium capacitors unless otherwise noted. The lead frame is prepared by choosing one of Ferritic stainless steel, non Ferritic stainless steel or carbon steel as a base metal and rolling it to a final required thickness. The base metal is then preferably plated with a nickel strike or other conventional barrier layer and then with final outer plating layers(s). The exact thickness and choice of layering varies and can be tailored to meet the requirements of each lead attach process.

Abstract: An integrated circuit package includes an encapsulation and lead frame with a portion of the lead frame disposed within the encapsulation. The lead frame includes a first conductor formed in the lead frame having a first conductive loop and a third conductive loop disposed substantially within the encapsulation. A second conductor is formed in the lead frame galvanically isolated from the first conductor. The second conductor includes a second conductive loop disposed substantially within the encapsulation proximate to the first conductive loop to provide a communication link between the first and second conductors. The third conductive loop is wound in an opposite direction relative to the first conductive loop in the encapsulation.

Abstract: The present technology relates to fused capacitor structures provided with a leadframe design configured to accepting a plurality of selectively placed fuses. The leadframe and fuse configuration enables construction of fused capacitors exhibiting low Equivalent Series Resistance (ESR) and allows construction of a variety of fuse configuration using a single leadframe design.

Abstract: A semiconductor device comprises an aluminum alloy lead-frame with a passivation layer covering an exposed portion of the aluminum alloy lead-frame. Since aluminum alloy is a low-cost material, and its hardness and flexibility are suitable for deformation process, such as punching, bending, molding and the like, aluminum alloy lead frame is suitable for mass production; furthermore, since its weight is much lower than copper or iron-nickel material, aluminum alloy lead frame is very convenient for the production of semiconductor devices.