For Capacitor And Inductor Patents (Class 361/821)
  • Patent number: 10181783
    Abstract: There is provided a power converter which can suppress a surge voltage and reduce noise flowing from an input of a power changer. The power converter includes an inverter circuit 140, a capacitor 514 for smoothing DC power, a capacitor 515 for removing noise, and conductors 564p and 564n. The conductors 564p and 564n are connected to the capacitors 514 and 515 when power side terminals 562p and 562n are connected to an inverter circuit 140, and power source side terminals 561p and 561n are connected to a battery 136. In the conductors 564p and 564n, a parasitic inductance L1 between capacitor terminals 563p and 563n and capacitor terminals 560p and 560n is larger than a parasitic inductance L2 between capacitor terminals 563p and 563n and the power side terminals 562p and 562n.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: January 15, 2019
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Youhei Nishizawa, Kaname Sasaki, Yutaka Okubo, Yuki Fujita
  • Patent number: 10014794
    Abstract: An electronic device for an electric powertrain of a vehicle is disclosed. The device includes a power module assembly having a housing that defines a first side, and an array of power modules disposed within the housing. Each of the power modules includes first electrical contact patches at least partially embedded in the first side and having an attachment surface substantially parallel to the first side. A capacitor assembly includes a housing defining a second side that is substantially coplanar with the first side, and an array of second electrical contact patches at least partially embedded in the second side. The second electrical contact patches have an attachment surface substantially parallel to the second side. A busbar mechanically and electrically couples at least one of the first contact patches to at least one of the second contact patches.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: July 3, 2018
    Assignee: Ford Global Technologies, LLC
    Inventors: Guangyin Lei, Michael W. Degner, Chingchi Chen, Edward Chan-Jiun Jih
  • Patent number: 9991180
    Abstract: A semiconductor device includes: a resin case that houses a semiconductor element; a parallel plate that is disposed inside the resin case while being connected with the semiconductor element, the parallel plate including two flat plates parallel to each other with an insulating material therebetween; two electrodes that are each led out from two electrode lead-out portions in an upper end of the parallel plate and are disposed on an upper surface of the resin case at a predetermined interval; and a metal plate that stands erect on the main surface of the flat plate in a region at the predetermined interval between the two electrode lead-out portions.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: June 5, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideki Tsukamoto, Mituharu Tabata
  • Patent number: 8987054
    Abstract: In one embodiment, methods for making semiconductor devices are disclosed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventor: Darrell Truhitte
  • Publication number: 20150022991
    Abstract: An apparatus includes a case having an elliptical cross-section capable of receiving a plurality of capacitive elements. One or more of the capacitive elements provide at least one capacitor having a first capacitor terminal and a second capacitor terminal. The apparatus also includes a cover assembly that includes a deformable cover mountable to the case, and, a common cover terminal having a contact extending from the cover. The cover assembly also includes at least three capacitor cover terminals, each of the at least three capacitor cover terminals having at least one contact extending from the deformable cover. The deformable cover is configured to displace at least one of the at least three capacitor cover terminals upon an operative failure of at least one of the plurality of the capacitive elements. The cover assembly also includes at least four insulation structures. One of the four insulation structures is associated with one of the at least three capacitor cover terminals.
    Type: Application
    Filed: October 3, 2014
    Publication date: January 22, 2015
    Inventors: Robert M. Stockman, Richard W. Stockman, Shaun Brandon Sirotiak
  • Patent number: 8898894
    Abstract: A welding system component includes a circuit board for the welding system component. An interface has a main riser portion with a fastener passageway formed therethrough. The interface has an extension portion with a terminal passageway formed therethrough. The extension portion is electrically connected to the circuit board with a terminal disposed in the terminal passageway. The extension portion is spaced away from a surface of the circuit board. A capacitor is electrically connected to the main riser portion with a fastener disposed in the fastener passageway.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: December 2, 2014
    Assignee: Lincoln Global, Inc.
    Inventors: George Koprivnak, Robert Dodge, Jeremie Buday, David Perrin
  • Patent number: 8861225
    Abstract: A capacitor mounting construction includes housing, a bracket and an urging member. The housing has a capacitor accommodating space configured to accommodate a capacitor and a wire accommodating space configured to accommodate a wire extended from the capacitor. The bracket is engaged with the housing, is configured to fix and electrically connect the wire to a conductive member in the wire accommodating space, and covers the capacitor accommodating space to define a capacitor accommodating chamber. The urging member is provided on an inner wall of the capacitor accommodating chamber, and is configured to urge the capacitor to contact another inner wall of the capacitor accommodating chamber.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: October 14, 2014
    Assignee: Yazaki Corporation
    Inventor: Shinji Kodama
  • Patent number: 8837119
    Abstract: A matrix converter includes first to third AC reactors connected in series with first- to third-phase outputs of three-phase AC electric power, and a first cooling fan that generates cool air for cooling the first to third AC reactors. The first to third AC reactors are arranged side-by-side in a direction intersecting a direction in which the cool air flows.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventors: Kazutaka Kishimoto, Makoto Kojyo, Takahiro Uchino
  • Patent number: 8830694
    Abstract: The device includes a first inductor, a first insulating layer, a second inductor, and a third inductor. The first inductor includes a helical conductive pattern. The second inductor is located in a region overlapping the first inductor through the first insulating layer. The second inductor includes a helical conductive pattern. The third inductor is connected in series to the second inductor, and includes a helical conductive pattern.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: September 9, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Masaya Kawano, Yasutaka Nakashiba
  • Patent number: 8737089
    Abstract: A Ferritic stainless steel, non Ferritic stainless steel or carbon steel based lead frame and method for producing same is provided. The lead frame is preferably used for TantalumNiobium capacitors but could possibly be applicable to other integrated circuits with the same operating parameters. Any reference to Tantalum capacitors in this application applies equally to Niobium capacitors unless otherwise noted. The lead frame is prepared by choosing one of Ferritic stainless steel, non Ferritic stainless steel or carbon steel as a base metal and rolling it to a final required thickness. The base metal is then preferably plated with a nickel strike or other conventional barrier layer and then with final outer plating layers(s). The exact thickness and choice of layering varies and can be tailored to meet the requirements of each lead attach process.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: May 27, 2014
    Assignee: Micro Stamping Corporation
    Inventors: Frank J. Semcer, Sr., Steven G. Santoro, James McClintock, Frank J. Jankoski, Jr.
  • Patent number: 8717774
    Abstract: A capacitive interposer, electronic package having the capacitive interposer and electronic device with the electronic package is described. The interposer has a first planar face and a second planar face. An array of upper connections is on the first planar face and opposing lower connections are on the second planar face with conduction paths between each upper connection of the upper connections and a lower connection of the lower connections. At least one power feed-through capacitor is provided. The capacitor is mounted on the first planar face with the first external termination in direct electrical contact with a first upper connection and the second external termination is in direct electrical contact with a second upper connection. At least one upper connection, first external termination and second external termination are arranged for direct electrical contact with element contact pads of a common element.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: May 6, 2014
    Assignee: Kemet Electronics Corporation
    Inventors: Michael S. Randall, Garry Renner, John D. Prymak, Azizuddin Tajuddin
  • Publication number: 20140118986
    Abstract: Some embodiments protect aluminum electrolytic capacitors without increasing the thickness or height dimension of a unit case of an onboard electronic control unit, which is provided with the unit case and a circuit board on which the aluminum electrolytic capacitors are mounted. The circuit board includes a first surface and a second surface, and the unit case houses the circuit board. The unit case includes a first main wall facing the first surface, a second main wall facing the second surface, and perimeter walls. The capacitors are mounted on the second surface so as to extend along a specific periphery of the circuit board and be mutually connected in parallel. The unit case has a height dimension capable of housing the aluminum electrolytic capacitors without the aluminum electrolytic capacitors contacting the inside surface of the second main wall.
    Type: Application
    Filed: August 7, 2013
    Publication date: May 1, 2014
    Applicant: SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Kenta SUZUKI, Takaki KISHIDA, Takehiro KANOU
  • Patent number: 8619436
    Abstract: An electrical component (100) includes a housing (1), a number of terminals (2) molded within housing and at least one electrical element (3). The housing has at least a side wall (11) having a number of recesses (112) and an internal cavity (15). Each terminal has a first end (23) extending to a bottom of the side wall and formed with a platform portion (231) located onto the bottom of the side wall and aligned with the corresponding recess. The electrical element has a number of wires (321) wrapped thereon. One end of the wire extends outward the cavity through the recess and is soldered onto the corresponding platform portion.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: December 31, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Hong-Bo Zhang, Zheng-Hua Xu, Chao-Tung Huang
  • Publication number: 20130343029
    Abstract: A capacitor provides a plurality of selectable capacitance values, by selective connection of six capacitor sections of a capacitive element each having a capacitance value. The capacitor sections are provided in a plurality of wound cylindrical capacitive elements. Two vertically stacked wound cylindrical capacitance elements may each provide three capacitor sections. There may be six separately wound cylindrical capacitive elements each providing a capacitor section. The capacitor sections have a common element terminal.
    Type: Application
    Filed: August 14, 2013
    Publication date: December 26, 2013
    Applicant: AMERICAN RADIONIC COMPANY, INC.
    Inventor: Robert M. Stockman
  • Patent number: 8570767
    Abstract: A lower enclosure has a first recess. A first annular retainer is adapted for engaging a lower portion of a capacitor and the first recess. The first annular retainer has a plurality of tabs that extend radially outward from an outer diameter surface of the first annular retainer. Each of the tabs has a sloped surface or a peaked surface for compression of the first annular retainer against the capacitor. An upper enclosure has a plurality of second recesses. A second annular retainer is adapted for engaging an upper portion of the capacitor and the second recesses. The second annular retainer has a plurality of protrusions that extend upward from the second annular retainer. Each of the protrusions has a slit for receiving a wedge, such that if the protrusions engage the wedge the second annular retainer is compressed against the capacitor.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: October 29, 2013
    Assignee: Deere & Company
    Inventors: Christopher J. Schmit, Jeffrey S. Duppong
  • Publication number: 20130141889
    Abstract: An electric storage device includes a plurality of capacitor cells (electric-power storage cells) and a casing that houses the capacitor cells. The casing includes an inspection window through which a condition display unit provided inside the casing is visually checkable. The inspection window includes a through hole that penetrates the casing, a resin plate that closes the through hole from an inside of the casing, and a seal member that is interposed between the resin plate and an inner surface of the casing around the through hole.
    Type: Application
    Filed: March 19, 2012
    Publication date: June 6, 2013
    Inventors: Junichirou Tsuchiya, Akihiko Souda
  • Patent number: 8338912
    Abstract: Disclosed herein is an inductor module including a substrate functioning as a printed wiring board or an interposer; an IC mounting part formed on a surface of the substrate; an inductor which is formed in the substrate at such a position as to overlap with the IC mounting part on a plan-view basis and which is connected to an IC mounted on the IC mounting part; and a magnetic body including a magnetic material selected from among a NiZn ferrite, a NiZnCu ferrite and a Ba ferrite, the magnetic body being disposed intermediately between the IC mounting part and the inductor.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Patent number: 8331103
    Abstract: Disclosed herein is a wiring board including: a shield layer; and n layers (n is an integer of two or more) of inductor wiring formed above the shield layer and forming an inductor; wherein of the n layers of inductor wiring, the inductor wiring closest to the shield layer has a smallest wiring area.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: December 11, 2012
    Assignee: Sony Corporation
    Inventor: Shuichi Oka
  • Publication number: 20120120546
    Abstract: In a feed-through capacitor, a conduction unit having a plurality of conduction inner electrodes can fully secure a tolerable level of DC. A capacitor unit is formed on the mount surface side in a capacitor body, so that high-frequency noise components can be removed by the capacitor unit before reaching the conduction unit. The distance between the grounding inner electrode located closest to the conduction unit and the conduction inner electrode in the conduction unit is greater than that between the signal inner electrode and grounding inner electrode in the capacitor unit. This enhances the impedance between the capacitor unit and the conduction unit, so as to inhibit the high-frequency noise components from flowing into the conduction unit.
    Type: Application
    Filed: September 16, 2011
    Publication date: May 17, 2012
    Applicant: TDK CORPORATION
    Inventors: Masaaki TOGASHI, Takashi AOKI
  • Patent number: 8179695
    Abstract: A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: May 15, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Uei-Ming Jow, Chin-Sun Shyu, Chang-Sheng Chen, Min-Lin Lee, Shinn-Juh Lai
  • Patent number: 8149589
    Abstract: A holder for mounting multiple capacitors onto a circuit board includes a main structure and a plurality of latching member. The main structure has a top plate and a plurality of side plates. The top plate includes a plurality of holding slots, with the latching members off the side plates. Each latching member has an extension portion and an engaging member. The engaging member is located at the end of the extension under the bottom edge of the side plate. The capacitor includes a main body and a pair of electric leads at one end of the main body. At the opposite end of the electric leads, the main body is bounded on top by the top plate of the main structure, where the main body of each capacitor emerges partially above the upper surface of the top plate.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: April 3, 2012
    Assignee: Lien Chang Electronic Enterprise Co., Ltd.
    Inventors: Chun-Kong Chan, Chi-Ching Chen
  • Patent number: 8085549
    Abstract: The circuit device includes a first transmitting inductor, a first insulating layer, a first receiving inductor, and a second receiving inductor. The first transmitting inductor is constituted of a helical conductive pattern and receives a transmitted signal. The first receiving inductor is located in a region overlapping the first transmitting inductor through the first insulating layer. The first receiving inductor is constituted of a helical conductive pattern, and generates a received signal corresponding to the transmitted signal input to the first transmitting inductor. The second receiving inductor is connected in series to the first receiving inductor, and constituted of a helical conductive pattern. The second receiving inductor generates a voltage in an opposite direction to that generated by the first receiving inductor, in response to a magnetic field of the same direction.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: December 27, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Masaya Kawano, Yasutaka Nakashiba
  • Publication number: 20110249421
    Abstract: A power conversion device for a vehicle includes: a power module that includes a switching device and, upon operation of the switching device, converts DC power into AC power to be supplied to an electric machine for driving a vehicle; a capacitor module that includes a smoothing capacitor element, an input-side power source terminal for receiving DC power, and an output-side power source terminal for supplying DC power to the power module; and a noise removal capacitor for removing noise, wherein: the noise removal capacitor is built in the capacitor module, and the noise removal capacitor is electrically connected to the input-side power source terminal in a position where a distance between a connection position of the noise removal capacitor and the input-side power source terminal is less than a distance between a connection position of the noise removal capacitor and the output-side power source terminal of the capacitor module.
    Type: Application
    Filed: October 26, 2009
    Publication date: October 13, 2011
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Takeshi Matsuo, Kinya Nakatsu, Toshiya Satoh, Ken Maeda
  • Publication number: 20110205725
    Abstract: An element array and a footprint layout for an element array are disclosed. The element array can have a rectangular configuration defining two side surfaces and two end surfaces. The element array can include a plurality of stacked dielectric-electrode layers. One dielectric-electrode layer can include a plurality of element electrodes, such as eight element electrodes. Each of the plurality of element electrodes forms a part of an individual element for the element array. The element array device can further include a common electrode. The common electrode is used as part of each of the individual elements for the element array. The common electrode can include a lead for termination to one of the two end surfaces of the element array or, in a particular embodiment, to one of the two side surfaces of the element array.
    Type: Application
    Filed: February 22, 2011
    Publication date: August 25, 2011
    Applicant: AVX CORPORATION
    Inventors: Ronald S. Demcko, Jeff Cheng, Michael Kirk
  • Publication number: 20110090665
    Abstract: Surface mount components and related methods of manufacture involve one or more thin film circuits provided between first and second insulating substrates. The thin film circuits may include one or more passive components, including resistors, capacitors, inductors, arrays of one or more passive components, networks or filters of multiple passive components. Such thin film circuit(s) can be sandwiched between first and second insulating substrates with internal conductive pads being exposed between the substrates on end and/or side surfaces of the surface mount component. The exposed conductive pads are then electrically connected to external terminations. The external terminations may include a variety of different materials, including at least one layer of conductive polymer and may be formed as termination stripes, end caps or the like. Optional shield layers may also be provided on top and/or bottom device surfaces to protect the surface mount components from signal interference.
    Type: Application
    Filed: October 14, 2010
    Publication date: April 21, 2011
    Applicant: AVX CORPORATION
    Inventors: Gheorghe Korony, Andrew P. Ritter
  • Publication number: 20110090648
    Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.
    Type: Application
    Filed: December 17, 2010
    Publication date: April 21, 2011
    Applicant: CYNTEC CO., LTD.
    Inventors: Da-Jung CHEN, Chau-Chun WEN, Chun-Tiao LIU
  • Patent number: 7898822
    Abstract: A holder holds an electrical component having wire ends that act as electrical connections. The holder includes a body having a center part. The center part has a recess for holding the component. Side walls of the recess have slots for guiding wire ends of the component. The recess and the slots are open at a same side of the body.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: March 1, 2011
    Assignee: EPCOS AG
    Inventors: G√ľnter Feist, Klaus Zimmermann
  • Patent number: 7859080
    Abstract: The invention provides an electronic component which has an improved breakdown limit value of withstand voltage and improved insulation properties and which can be made compact and provided with a multiplicity of layers and a great capacity. The electronic component includes a first conductor having a bottom conductor formed on a substrate and a raised conductor formed to protrude from the bottom conductor, a dielectric film formed on the raised conductor, and a second conductor formed on the dielectric film to constitute a capacitor element in combination with the raised conductor and the dielectric film.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: December 28, 2010
    Assignee: TDK Corporation
    Inventors: Hajime Kuwajima, Akira Furuya, Masahiro Miyazaki, Makoto Shibata
  • Patent number: 7813140
    Abstract: The present invention describes methods for enhancing the performance of two-capacitor low-pass filters. In certain embodiments of the invention, the capacitors are placed on opposite sides of a PCB board.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: October 12, 2010
    Assignee: Apple Inc.
    Inventor: Cheung-Wei Lam
  • Patent number: 7764512
    Abstract: A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: July 27, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Uei-Ming Jow, Chin-Sun Shyu, Chang-Sheng Chen, Min-Lin Lee, Shinn-Juh Lai
  • Publication number: 20100177493
    Abstract: Disclosed is a method for providing a protective film over a capacitor. The method includes the steps of providing a capacitor with a first leg, a second leg and a shell, spraying paint onto the shell so that the thickness of the paint over the shell is even, and drying the paint so that the paint is turned into a protective film over the shell.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 15, 2010
    Inventors: Ming-Hsi Tsou, Chia Pang Chen, Chin-Chang Lin
  • Patent number: 7751205
    Abstract: This invention provides a small package board integrated with power supply capable of supplying a low level of voltage and high level of current to an IC while achieving a low height of its power supply. It becomes hard to saturate an inductor magnetically when the surface of a copper wire is coated with a magnetic layer, and the inductor can accordingly be provided with a sufficient degree of inductance. A multiplicity of inductors can be provided within a confined space by arranging a multiplicity of inductors in parallel, and by fixing them with resin so as to form an inductor array, thereby making it possible to divide a power supply. The number of power supply lines is increased by dividing the power supply so as to reduce the level of current in an individual power supply line, so that a high level of current can be supplied to an IC chip.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: July 6, 2010
    Assignee: IBIDEN Co., Ltd.
    Inventors: Takashi Kariya, Yasuhiko Mano, Shuichi Kawano, Liyi Chen
  • Publication number: 20100134974
    Abstract: An energy storage cell pack cradle assembly for holding multiple rows of energy storage cells oriented along a dominant axis of vibration includes a first cradle member including a plurality of energy storage cell body supporting structures including respective holes; a second cradle member including a plurality of energy storage cell body supporting structures including respective holes; and one or more fasteners connecting the first cradle member and the second cradle member together. The energy storage cell body supporting structures are configured to structurally support the energy storage cells, with the energy storage cells oriented along a dominant axis of vibration, by energy storage cell bodies of the energy storage cells with respective electrically conductive terminals extending through the respective holes without structural support of the electrically conductive terminals by the cradle members.
    Type: Application
    Filed: December 24, 2008
    Publication date: June 3, 2010
    Applicant: ISE CORPORATION
    Inventors: Vinh-duy Nguyen, Alexander J. Smith, Kevin T. Stone, Alfonso O. Medina
  • Publication number: 20100014271
    Abstract: The capacitor material of the present invention is comprised by laminating a titanium dioxide layer and a titanate compound layer having perovskite crystals.
    Type: Application
    Filed: January 25, 2008
    Publication date: January 21, 2010
    Applicant: Showa Denko K.K.
    Inventors: Akihiko Shirakawa, Ryuichi Mitsumoto, Koji Tokita
  • Publication number: 20100002408
    Abstract: A filter for an HVDC system. The filter includes a capacitor and a reactor arranged in an indoor location having a first space for erecting filter components. The first space includes a high voltage area and a low voltage area defining a first electric potential direction.
    Type: Application
    Filed: December 13, 2005
    Publication date: January 7, 2010
    Applicant: ABB TECHNOLOGY LTD.
    Inventors: Lars-Tommy Andersson, Britt-Marie Pira
  • Publication number: 20100002409
    Abstract: Energy storage modules generally include a housing with component parts arranged therein. The component parts are in this case either capacitors, for example double-layer capacitors and/or electrolyte capacitors. According to the invention, a filler is provided in the housing and binds electrolyte liquid occurring in the even of damage or else electrolyte gases. Beds of material with a large specific surface area, such as zeolites or else active carbons, are suitable as fillers. The surfaces are also possibly catalytically coated.
    Type: Application
    Filed: September 27, 2007
    Publication date: January 7, 2010
    Inventors: Hans Heinrich Ebeling, Walter Ehrhardt, Andreas Fuchs, Markus Matthias Gaudenz, Alexander Hahn, Armin Kessler, Jochen Neutz, Karsten Rechenberg, Manfred Waidhas
  • Patent number: 7480153
    Abstract: An exemplary Electromagnetic Interference (EMI) shielding package (1) includes a substrate (10), a metal cap (15), and a potting compound (18). The substrate has a plurality of electronic components (11a, 11b, 12) fixed thereon. The metal cap includes a horizontal base panel (152) and a plurality of peripheral walls (151) vertical to the base panel. A related method for making the EMI shielding package includes: providing a substrate with a plurality of electronic components fixed thereon; providing a metal cap including a horizontal base panel and a plurality of peripheral walls vertical to the base panel; attaching the walls to the substrate, thereby covering selected one or more of the electronic components that need to be shielded with the metal cap; sealing the electronic components and the metal cap with a potting compound; and curing the potting compound to form an encapsulation.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: January 20, 2009
    Assignees: Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Xiao-Hua Kong
  • Patent number: 7471501
    Abstract: A device includes a base plate, a first cell, a second cell, and a housing in which the-first cell and the second cell are arranged. The first cell and the second cell each include at least one capacitor. The device also includes a first metal plate configured connected to a capacitor in the first cell and second metal plate connected to a capacitor in the second cell. The first and second metal plates each having at least one hole configured to receive the conductive fastening element. The device also includes an electrically conductive fastening element connected through the hole in the first metal plate and the hole in the second metal plate such that the first metal plate and the second metal plate are-electrically connected to one another and mechanically attached to one another and to the base plate.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: December 30, 2008
    Assignee: EPCOS AG
    Inventors: Werner Erhardt, Hubertus Goesmann
  • Publication number: 20080233468
    Abstract: A releasing pressure and a pressure releasing position, when enclosing films are expanded by gas produced at an abnormal time, are easily and positively configured. A film-enclosed battery (1) has a battery element (2) and two enclosing films (4, 5) for sealing the battery element (2). The enclosing films (4, 5) include heat-sealable resin layers and air-impermeable layers, and the heat-sealable resin layers and air-impermeable layers, and the heat-sealable resin layers that are face each other hold the battery element (2) and seal the battery element (2) when their peripheral edges are thermally fused. A cross-linking structure (8) formed by cross-linking heat-sealable resin layer is formed in one of the enclosing films (4, 5) so that a region in part of a heat-sealed area (6) has a position exposed to a battery element housing unit and another portion in contact with outside air.
    Type: Application
    Filed: August 5, 2005
    Publication date: September 25, 2008
    Applicant: NEC CORPORATION
    Inventors: Makihiro Otohata, Hiroshi Yageta
  • Publication number: 20080218990
    Abstract: A method of mounting an electronic component on a substrate includes forming at least one trench in a surface of the substrate. The trenches formed in the substrate reduce a stiffness of the substrate, which provides less resistance to shear. Accordingly, the trenches reduce the amount of strain on the joints, which mount the electronic component to the substrate, which enhances the life of the joints.
    Type: Application
    Filed: April 8, 2008
    Publication date: September 11, 2008
    Applicant: International Business Machines Corporation
    Inventors: David Questad, Vijayeshwar D. Khanna, Jennifer V. Muncy, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit
  • Patent number: 7417869
    Abstract: The present invention describes methods for enhancing the performance of two-capacitor low-pass filters. In certain embodiments of the invention, the capacitors are placed on opposite sides of a PCB board.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: August 26, 2008
    Assignee: Apple Inc.
    Inventor: Cheung-Wei Lam
  • Patent number: 7279771
    Abstract: In a capacitor-mounted wiring board, a plurality of wiring layers each patterned in a required shape are stacked with insulating layers interposed therebetween and are connected to each other via conductors formed to pierce the insulating layers in the direction of thickness. A decoupling capacitor is electrically connected to a wiring layer used as a power supply line or a ground line in the vicinity of the wiring layer, and mounted such that, when a current is passed through the capacitor, the direction of the current is reversed to that of the current flowing through the relevant wiring layer.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: October 9, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshio Gomyo, Yukiharu Takeuchi
  • Patent number: 7180749
    Abstract: A circuit board comprises a base film that is a base layer, a first conductive circuit manufactured by hardening conductive paste material formed in a predetermined shape on the base film, a first insulating layer manufactured by hardening insulating paste material formed on the base film and the first conductive circuit, and a second conductive circuit manufactured by hardening conductive paste material in a predetermined shape on the first insulating layer, wherein an electronic part built-in by the first insulating layer and second insulating layer is connected to the second conductive circuit, and the first conductive circuit is connected to the second conductive circuit through a via hole.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: February 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7140085
    Abstract: A capacitive vacuum measuring cell includes first and second ceramic housing bodies (1, 4) joined by an edge seal (3). A thin ceramic membrane (2) is supported between first and second housing bodies (1, 4) by the edge seal (3) at a small distance from the first housing body (1) creating a reference vacuum chamber (25) therebetween. An electrically conductive material (7) coats opposing surfaces of the first housing body (1) and the membrane (2) to form a capacitor. A measurement vacuum chamber (26) is provided between the membrane (2) and the second housing body (4). A port (5) communicates with the second housing body (4) to connect the measurement vacuum chamber (26) of the measuring cell to the medium to be measured. The membrane (2) is made from an Al2O3 slurry that is sintered in a first heating step, cooled, and then reheated to smooth the membrane.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: November 28, 2006
    Assignee: Inficon GmbH
    Inventors: Per Bjoerkman, Ray Olsson
  • Patent number: 6972967
    Abstract: An assembly for mitigating at least one of an electrostatic discharge and electromagnetic interference is provided. The assembly includes (a) first and second spaced apart electrical conductors 108 and 116 and (b) a mitigation module 300 electrically coupled to the first and second spaced apart electrical conductors to control a magnitude of an electrostatic discharge and/or electromagnetic interference in the first and second electrical conductors 108 and 116. One or more of the following statements is true: (i) the mitigation module 300 comprises a ferrite material 304; (ii) the mitigation module 300 comprises a lossy dielectric material 308; and (iii) an equivalent electrical circuit for at least part of the mitigation module 300 comprises at least a first circuit segment 512 comprising a first inductor and a first capacitor electrically connected in parallel and a second capacitor 504 electrically connected in series with the first circuit segment 512.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: December 6, 2005
    Assignee: Avaya Technology Group
    Inventors: David A. Norte, Woong K. Yoon, Thu-Duyen Ngoc Tran
  • Patent number: 6773532
    Abstract: A method of positioning a heat generating component on a header to enhance heat sinking characteristics includes positioning the header on a first pedestal, wherein the first pedestal and the header are bounded by an air trench having a vertical surface, and positioning the heat generating component only in areas on the header having an associated heat dissipation conical region extending from the heat generating component downward through the first pedestal at an angle that satisfies Fourier's Law of Heat Conduction, wherein the conical region does not intersect the vertical surface of the air trench.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: August 10, 2004
    Assignee: JDS Uniphase Corporation
    Inventors: Robert K. Wolf, Hui Fu
  • Patent number: 6739027
    Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: May 25, 2004
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Konstantinos Papathomas
  • Publication number: 20040090752
    Abstract: A combination run capacitor/positive temperature coefficient resistor/overload (CAP/PTCR/OL) module is described. The cover of the combination housing includes a capacitor compartment and terminal openings for receiving blade terminals of a run capacitor. The terminal openings in the cover align with blade receiving receptacles coupled to the PTCR start circuit. The blade terminals of a run capacitor are inserted into the receptacle openings and into electrical engagement with the blade receiving receptacles. The capacitor is supported and protected by a potting mixture filling the capacitor compartment.
    Type: Application
    Filed: November 7, 2002
    Publication date: May 13, 2004
    Inventors: Alan Joseph Janicek, Kennett Ray Fuller, Mark Alan Heflin
  • Patent number: 6707366
    Abstract: A filtering induction device is provided to improve the filter effect via the increase of an insertion loss resulting from stray capacitance. The induction device includes at least one core structure, and first and second flat coils that interlacing with each other. The first flat coil is used as an inductor, and the second flat coil is used as an electrode belonging to a capacitor formed between the circles of the first flat coil.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: March 16, 2004
    Assignee: Delta Electronics Inc.
    Inventors: Han-Cheng Hsu, Wen-Te Ko
  • Patent number: RE42658
    Abstract: A multi-chip module (MCM) provides power circuitry on a computer motherboard in a package of reduced size without sacrificing performance. The MCM co-packages essential power circuit components on a ball grid array (BGA) substrate. Two power MOSFETs disposed on the BGA substrate are connected in a half-bridge arrangement between an input voltage and ground. A MOSFET gate driver is electrically connected to respective gate inputs of the two power MOSFETs for alternately switching the power MOSFETs to generate an alternating output voltage at a common output node between the power MOSFETs. At least one Schottky diode is disposed on the BGA substrate and connected between the common output node and ground to minimize losses during deadtime conduction periods. The input capacitor of the circuit is contained within the MCM housing and is located close to the MOSFETs, reducing stray inductance in the circuit. The MCM package is thin and has dimensions of about 1 cm by 1 cm or less.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: August 30, 2011
    Assignee: International Rectifier Corporation
    Inventor: David Jauregui