Overvoltage And Undervoltage Patents (Class 361/90)
  • Patent number: 6487059
    Abstract: The power supply device includes a DC-DC converter circuit having a power switch and a driving stage. The driving stage has a compensation terminal on which a compensation voltage is present, and which receives a biasing current. The driving stage includes a control circuit having an output terminal connected to a control terminal of the power switch and disconnection-detecting circuitry connected to the compensation terminal and generating a signal for permanent turning-off of the power switch when the biasing current drops below a current-threshold value. The driving stage moreover includes over-voltage detecting circuitry connected to the compensation terminal and generating a signal for temporary turning-off of the power switch when the compensation voltage exceeds a voltage-threshold value.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gregorio Bontempo, Claudio Adragna, Mauro Fagnani, Albino Pidutti, Francesco Pulvirenti, Roberto Quaglino, Giuseppe Gattavari
  • Publication number: 20020171985
    Abstract: The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply.
    Type: Application
    Filed: March 22, 2002
    Publication date: November 21, 2002
    Inventors: Thomas P. Duffy, Ryan Goodfellow, Malay Trivedi, Kevin Mori, Benjamim Tang
  • Patent number: 6473282
    Abstract: A latch-up protection circuit for an integrated circuit powered through a first power rail and a second power rail is disclosed, the integrated circuit having at least one semiconductor bulk of a conductivity type. The latch-up protection circuit comprises a control circuit and a switch circuit. The control circuit is connected to the first power rail and the second power rail for detecting a relative voltage therebetween and generating a first control signal and a second control signal. The switch circuit connected to the first power rail and the control circuit. When the relative voltage is greater than a first predetermined value, the switch circuit in response to the first control signal electrically connects the first power rail with the at least one semiconductor bulk. When the relative voltage is smaller than the first predetermined value, the switch in response to the first control signal electrically disconnects the first power rail from the at least one semiconductor bulk.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: October 29, 2002
    Assignee: Winbond Electronics Corporation
    Inventors: Shi-Tron Lin, Ta-Lee Yu, Yung-Chow Peng
  • Patent number: 6452235
    Abstract: A floating body ESD protection circuit positioned between and coupled to an I/O pad and an internal circuit. A p-type depletion mode transistor is used to control the body of an n-type enhancement mode transistor. When the p-type depletion mode transistor is triggered, the body of n-type enhancement mode transistor remains grounded. If the p-type depletion mode transistor has not been triggered, the body remains in a floating state, lowering the range of the snapback voltage. As a consequence the ESD protection circuit is able to function more rapidly. Similarly, an n-type depletion mode transistor is used to control the body of a p-type enhancement mode transistor. When the n-type depletion mode transistor is triggered, the body remains coupled to a high voltage. If the n-type depletion mode transistor has not been triggered, the body is in a floating state. Thus, the range of the snapback voltage can be lowered, enabling the ESD protection circuit to function more rapidly.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: September 17, 2002
    Assignee: United Microelectronics Corp.
    Inventor: Liang-Choo Hsia
  • Patent number: 6445556
    Abstract: A multi processor computer system includes processors 102 in processor receptacles 104, and voltage modules 106 and voltage module receptacle 108. The system accepts both direct voltage processors powered directly from the system power plane, and regulated voltage processors which require a voltage regulator 300. The regulated voltage processors require the voltage regulator while the direct voltage processors cannot operate with a voltage regulator. Voltage module control circuit 110 tests and compares processor type signals from the processor receptacles and voltage module type signals from the voltage module receptacles, and produces a voltage validation signal which indicates the presence of a mismatch between any of the processors and its respective voltage module. The voltage validation signal modifies the conventional processor presence signal from the processor receptacles if a mismatch exists, preventing the system from being powered on.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventor: Daniel H. Bax
  • Patent number: 6441675
    Abstract: A circuit that senses changes in the electrical characteristics of one or more circuit elements and generates one or more signals based, at least in part, on the electrical characteristics that are sensed, is incorporated into an integrated circuit. In a further aspect of the present invention, the one or more signals generated by the circuit are indicative of the reliability of an electronic device into which an embodiment of the present invention is incorporated.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: August 27, 2002
    Assignee: Intel Corporation
    Inventors: Terrance J. Dishongh, David H. Pullen
  • Patent number: 6433616
    Abstract: A circuit that senses changes in the electrical characteristics of one or more circuit elements and generates one or more signals based, at least in part, on the electrical characteristics that are sensed, is incorporated into an integrated circuit. In a further aspect of the present invention, the one or more signals generated by the circuit are indicative of the reliability of an electronic device into which an embodiment of the present invention is incorporated.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: August 13, 2002
    Assignee: Intel Corporation
    Inventors: Terrance J. Dishongh, David H. Pullen
  • Publication number: 20020097543
    Abstract: The invention refers to a charge/discharge protection circuit for a rechargeable battery which is protected by a fusible link, where the rechargeable battery comprises a control logic which opens or closes a load switch depending on the magnitude of the battery voltage, the voltage on the charge/discharge terminals of the protection circuit and the charge/discharge current. The protection circuit is designed so that the electric strength needs to match only the actual maximum battery voltage, thus requiring little real estate on an IC chip and also allowing most components to be integrated.
    Type: Application
    Filed: January 24, 2002
    Publication date: July 25, 2002
    Applicant: Dialog Semiconductor GmbH
    Inventors: Axel Pannwitz, Hans Martin Von Staudt, Achim Stellberger
  • Patent number: 6424511
    Abstract: A battery disconnect device includes a housing with a trip/sense circuit, a sealed solenoid and two bars. The solenoid includes a spring loaded contactor disposed in a sealed chamber which normally bridges the bars and is constructed to provide a very low resistivity between the bars. When a coil of the solenoid is activated, in response, for example, to a low battery voltage, the contactor moves away from the bars and is kept in an open position by a magnet. The contactor can be closed or returned to the original position by a manual push button or by a close circuit operated from a remote switch. Additionally the contactor may be opened by using a remote button to act as an anti-theft device.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: July 23, 2002
    Assignee: Purisys, Inc.
    Inventor: Aharon Y. Levinas
  • Patent number: 6418002
    Abstract: A power supply supervisor having a line voltage detector is used to monitor a power supply. A peak detector detects the line voltage by measuring the PWM switching signal in the secondary of the transformer. A logic circuit couples to the peak detector and the under-voltage detector, etc. to generate a power good (PG) signal when the power supply outputs meet the specifications. The logic circuit outputs a FAIL signal to turn off the power supply when an abnormal situation, such as over-voltage, occurs. Furthermore, when AC power is lost or turned off, the logic circuit detects a low line voltage and generates a power-down-warning PG signal before the output voltages are disabled. When an abnormal situation occurs before the low line voltage is detected, the logic circuit latches the power supply in a power off state. If the abnormal situation occurs after the low line voltage is detected, the logic circuit turns off the power outputs, but disables the latch function.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 9, 2002
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Rui-hong Lu
  • Publication number: 20020080542
    Abstract: A power switch connecting a load to an ac source is turned off when the RMS value of the supply voltage is outside selected limits and is turned back on when the RMS voltage returns to within the limits. Adaptive hysteresis is applied to the switch controller to eliminate chattering of the power switch when the voltage fluctuates around the selected limits. To this end, the selected limits are repetitively, incrementally narrowed each time the power switch is turned off and back on a selected number of times, such as twice, within a selected time interval. The RMS voltage is rapidly determined from samples gathered over ¼ cycle so that the voltages in a three phase system can be successively repetitively calculated. Phase loss is rapidly determined by checking for the leading edge of a square wave generated from the supply voltage wave form.
    Type: Application
    Filed: December 22, 2000
    Publication date: June 27, 2002
    Inventors: Anthony-Cernan Mendoza, Chi Thuong Ha
  • Publication number: 20020044400
    Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a stress-follower circuit configuration. The stress-follower circuit of the configuration is coupled to a pad of the integrated circuit. The stress-follower circuit configuration is coupled so as to reduce the voltage stress on the gate of a transistor in a transistor stack so that in operation the transistor in the stack tolerates an operating voltage approximately 1.5 volts above its nominal voltage. The transistor stack is also coupled to the pad.
    Type: Application
    Filed: November 1, 2001
    Publication date: April 18, 2002
    Inventor: Michael J. Allen
  • Patent number: 6362942
    Abstract: An extraneous voltage protection circuit and method transforms an overvoltage input signal or undervoltage input signal to a suitable voltage level for a protected circuit. An input voltage dependent variable reference voltage is used to protect overvoltage protection circuitry against unsuitable undervoltage conditions. In one embodiment, an overvoltage protection circuit, an undervoltage protection circuit, and an input voltage dependent variable reference voltage source is made of single gate oxide MOS devices.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: March 26, 2002
    Assignee: ATI International SRL
    Inventors: Oleg Drapkin, Grigori Temkine
  • Patent number: 6357012
    Abstract: A microcontroller with a self-prompting (self-wake-up) device, particularly for use in electrical adjusting drives, having a control device for specifying an active and an inactive operating state to economize on supply power, contains an oscillator for emitting a prompting signal or a clock frequency. This oscillator is a low-frequency, power-saving oscillator. Provided in the microcontroller is a circuit, preferably a disconnectible phase-locking loop, which, from the low frequency of the oscillator, generates a substantially higher clock frequency for microcontroller core. The low-frequency oscillator is also integrated as an original component into the microcontroller. An undervoltage detection, whose output signal is able to be supplied directly to the microcontroller core, indicates undervoltage conditions immediately. Using a time-switch logic which monitors a non-operative time of the microcontroller core, the core is activated again via a prompting circuit.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: March 12, 2002
    Assignee: Robert Bosch GmbH
    Inventor: Volker Aab
  • Patent number: 6351358
    Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a stress-follower circuit configuration. The stress-follower circuit of the configuration is coupled to a pad of the integrated circuit. The stress-follower circuit configuration is coupled so as to reduce the voltage stress on the gate of a transistor in a transistor stack so that in operation the transistor in the stack tolerates an operating voltage approximately 1.5 volts above its nominal voltage. The transistor stack is also coupled to the pad.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: February 26, 2002
    Assignee: Intel Corporation
    Inventor: Michael J. Allen
  • Patent number: 6344960
    Abstract: An electrostatic discharge protecting circuit for a semiconductor device is provided and includes a first circuit portion including an N-type MOS field effect transistor formed on a P-type silicon substrate and a P-type MOS field effect transistor formed on an N-type well in the P-type silicon substrate. The electrostatic discharge protecting circuit operates in a normal operating mode and an electrostatic discharge evaluation mode. In the normal operating mode, the N- and P-type MOS transistors operate as an output buffer connected to an internal circuit. In the electrostatic discharge characteristic mode, an electrostatic discharge signal is applied from an external source through a pad and switching devices included in a second portion of the electrostatic discharge protecting circuit connect a bulk terminal of the N-type MOS transistor to a ground voltage, thereby improving electrostatic discharge characteristics of the semiconductor device.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: February 5, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Dong-Hyun Seo, Hong-Bae Park
  • Patent number: 6344957
    Abstract: The present invention has the object of providing an overshoot/undershoot prevention device and overshoot/undershoot prevention method that are highly effective against both overshoot and undershoot. The overshoot/undershoot prevention device is provided with an overshoot shaping device that selects the portion of a waveform signal that equals or exceeds an overshoot determining potential when the potential of the waveform signal equals or exceeds the overshoot determining potential, outputs the selected portion as an overshoot waveform, attenuates the overshoot component of the waveform signal, and outputs the result as a shaped waveform in accordance with the time that the overshoot waveform continues.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: February 5, 2002
    Assignee: NEC Corporation
    Inventor: Hiroshi Kamiya
  • Patent number: 6344959
    Abstract: The presently disclosed method and apparatus provides the sensing of an output voltage of a charge pump without applying a load to the output stage. In the charge pump the voltage change which occurs across a capacitor of a stage of the charge pump when the charge pump transfers charge to the next stage is proportional to the difference between the voltage at the output of the charge pump under load, and the voltage which will be developed at the output of the charge pump with no load. There is an interval in the timing of the charge pump cycle after the first stage capacitor has transferred its charge to a second stage capacitor where the high side of the first capacitor has not yet been connected to the line voltage. During this interval the charge pump undervoltage detection circuit measures the voltage at the high side of the capacitor and compares this measured voltage to a reference voltage.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: February 5, 2002
    Assignee: Unitrode Corporation
    Inventor: Ciro W. Milazzo
  • Patent number: 6329754
    Abstract: A diagnostic system for a ballast of a high-pressure gas discharge lamp in a motor vehicle includes the ballast and a separate light control module that controls the ballast via a supply line and in case of a fault, the ballast gives a modulated diagnostic signal via the supply line to the light control module. For this, in case of a fault, the ballast modulates a current that is received, using a switchable current sink, such that the light control module receives coded diagnostic information via the supply line.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: December 11, 2001
    Assignee: Hella KG Hueck & Co.
    Inventors: Wolfgang Daub, Volker Radtke
  • Patent number: 6324040
    Abstract: A sensor circuit (10) device for detecting an open circuit to an electronic component (20) is disclosed. The sensor circuit (10) includes a detector circuit (12) operatively coupled to the electronic component (20), with the electronic component (20) drawing a known current and with the detector circuit (12) including an energy storage component (24). A charging circuit (14) is arranged to charge the energy storage component (24), and a processing system (16) is operatively coupled to the detector circuit (12). The processing system (16) is arranged to monitor the voltage across the energy storage component, and the processing system determines the fault status indicative of an actual current drawn by the electronic component.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: November 27, 2001
    Assignee: Motorola, Inc.
    Inventors: Peter Saladin, Michael Moroz
  • Patent number: 6300815
    Abstract: A voltage reference overshoot protection circuit senses unwanted ringing voltage levels in a driven device such as a backplane and controls the gate voltage to a voltage level control transistor such that a ringing output signal produced by an associated output driver is reduced in response to a control signal dependent on the ringing voltage level.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: October 9, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Eugene B. Hinterscher, Timothy A. Ten Eyck
  • Patent number: 6294943
    Abstract: A fail-safe Input/Output buffer bias circuit for digital CMOS chips provides protection for Input/Output buffers which have high voltages applied to the Input/output node and are subjected to power supply failure resulting in a collapsing supply voltage decaying to zero volts while said Input/output circuit has a high voltage remaining applied to its Input/output node. The Input/output buffer bias circuit is comprised of a sensing circuit and a bias generator circuit which acts to drive protection transistors in a manner which optimally minimizes the voltage impressed on input or output devices under all conditions which could persist in the event of VDD supply voltage failure. Protection circuitry holds all three combinations of voltage stress, gate-to-source, gate-to-drain, and drain-to-source voltages, to acceptable levels.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: September 25, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Frederick G. Wall, Bernhard H. Andresen
  • Publication number: 20010021092
    Abstract: The protection circuit (30) comprises at least one switch (FET1, FET2) comprising at least one control means (G1, G2) for adjusting the conductivity of said at least one switch (FET1, FET2). The conductivity is arranged to be adjustable by means of an electrical control conducted to the control means (G1, G2).
    Type: Application
    Filed: December 29, 2000
    Publication date: September 13, 2001
    Applicant: Nokia Mobile Phones Ltd.
    Inventor: Jari Astala
  • Publication number: 20010006447
    Abstract: The protection circuit for a power supply unit comprises a switching stage, at which at least two output voltages to be monitored are connected, these voltages being isolated from one another by means of resistors. Arranged here in the connection path of the output voltages is a diode, which turns on and thereby triggers the switching stage in the event of a fault, when there is a drop in one of the output voltages. In this way, the switching stage provides information which acts on a control loop of the power supply unit, so that the power supply unit switches off. The protection circuit also includes a passive network with a resistor and a capacitor, which prescribes a time constant, after which the protection circuit permits renewed starting of the power supply unit. The switching stage may be realized, for example, by a transistor stage, which provides the information signal for the event of a fault for the power supply unit when turning on occurs.
    Type: Application
    Filed: December 15, 2000
    Publication date: July 5, 2001
    Inventors: Eugen Kizmann, Reinhard Kogel, Jean-Paul Louvel
  • Patent number: 6222712
    Abstract: In a device means having connections means for applying a direct voltage (DCV) and having an undervoltage detection circuit (31), a control voltage (CV) having two different direct voltage values (V5, V6) can be applied via the connection elements (2) and the undervoltage detection circuits (3) can generate a detection signal (DS) which alternates between two different voltage values (V1, V2) similarly to the two direct voltage values (V5, V6). A transition detector (58) is part of a processor (16) , The transaction detectr is means are adapted to detect transitions (TR) between the two values (V1, V2) of the detection signal and by which at least one given program sequence can be started in the processor upon the detection of such transitions.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: April 24, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Christian Scherabon
  • Patent number: 6198403
    Abstract: In this micro-controller-based line voltage meter/monitor instrument, an AC signal-under-test is sensed from the line voltage via a broadband isolation transformer, and processed to provide RMS and fast peak signals. These are A/D converted in the micro-controller in a sampling process synchronized from a zero-cross signal detected from the AC voltage-under-test. An LED (light-emitting diode) display with 40 LED segments provides resolution of one volt RMS per LED step/segment, and is color-coded to overlay the CBEMA nominal limits. RMS values ranging from 95 to 135 volts are indicated on a bar graph, and fast peak values ranging from 120 to 500 volts at the waveform crest are indicated by the selected LED cell flashing at a 1 Hz rate, with selectable peak hold time. An internal real time calendar/clock enables accumulation of time-related data regarding the ongoing quality of the power line voltage levels.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: March 6, 2001
    Inventors: Michael L. Dorrough, Michael J. Cane
  • Patent number: 6185082
    Abstract: A protection circuit for a boost power converter provides input under-voltage protection and output over-voltage and over-current protection. The protection circuit includes a control power MOSFET connected in series between the ground of the boost power converter and the ground of the load. The arrangement of the circuit makes it easy to drive the gate of an N-channel power MOSFET and is ideal for current-limiting control, which utilizes the Rds-on of the MOSFET as a current sensing element. Neither a specific gate-driver nor a current sensing resistor is required, and thus high efficiency can be achieved. Furthermore, the slow slew-rate at the gate of the MOSFET provides a soft-start to the load. The protection circuit includes a temperature compensation circuitry to offset the variation of the Rds-on. A time delay circuit prevents the switching elements and protection elements from overload damage.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: February 6, 2001
    Assignee: System General Corporation
    Inventor: Ta-yung Yang
  • Patent number: 6178076
    Abstract: In a power-electronic circuit arrangement for compensating for mains system voltage reductions and mains system disturbances, a second auxiliary voltage source is provided, whose voltage is chosen to be less than that of the first auxiliary voltage source. The second auxiliary voltage source can be coupled to the feeder converter with the aid of a switch. The circuit according to the invention can thus operate in two different modes: when the first auxiliary voltage source is coupled to the feeder converter, the available voltage is sufficiently high to compensate for mains system failures or mains system voltage reductions. However, when less severe disturbances occur, the second, lower auxiliary voltage source is coupled to the feeder converter, and mains system disturbances can in consequence be compensated for without any major switching losses.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: January 23, 2001
    Assignee: Asea Brown Boveri AG
    Inventors: Peter D{umlaut over (a)}hler, Horst Gr{umlaut over (u)}ning
  • Patent number: 6169311
    Abstract: Disclosed is a MOS-type semiconductor integrated circuit, which has: an input circuit section connected to an input pad; an output circuit section connected to an output pat; and an internal circuit section connected between the input circuit section and the output circuit section; wherein the input circuit section includes a first n-channel transistor, a first p-channel transistor and a first protective resistance connected between the first n-channel transistor and the first p-channel transistor, the input pad being connected between the first p-channel transistor and the first protective resistance, the internal circuit section being connected between the first n-channel transistor and the first protective resistance; and the output circuit section includes a second nchannel transistor, a second p-channel transistor and a second protective resistance connected between the second n-channel transistor and the second p-channel transistor, the output pad being connected between the second p-channel transistor
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: January 2, 2001
    Assignee: NEC Corporation
    Inventor: Tadashi Iwasaki
  • Patent number: 6150792
    Abstract: A phase monitor for a short-circuited asynchronous three-phase motor comprises a first and a second sensing unit, both of which are connected to a supply voltage line to the motor in order to sense the voltage conditions on the line, and a control switch which is controlled by the two sensing units and connected in a control circuit for a supply voltage switch for the motor, connected in the supply voltage line. When the supply voltage line is connected to a supply voltage source, the first sensing unit causes an immediate switching-on operation of the control circuit if the voltage conditions on the supply voltage line sensed by the first sensing unit at that moment are acceptable.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: November 21, 2000
    Inventor: Hans Andersson
  • Patent number: 6141200
    Abstract: Series-connected stacked PFETS are employed in an off-chip driver output stage. When the output driver is enabled, the gate of the PFET transistor directly connected to the output is biased by a latch at a voltage level of either one threshold voltage above ground or one threshold voltage below the power supply, depending on the data signal. This provides overvoltage protection even for overshoots and undershoots of one threshold voltage or less, and provides overvoltage protection below the threshold voltages required to activate conventional overvoltage protection devices. Tight tolerances for maximum gate voltages may thus be achieved, and smaller devices having thinner gate oxides utilized in the off-chip drivers of a processor or other device.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: October 31, 2000
    Assignees: International Business Machines Corporation, Motorola, Inc.
    Inventors: Fahd Hinedi, Lakshmikant Mamileti
  • Patent number: 6121759
    Abstract: An arrangement of switched-mode power supplies is disclosed. The arrangement includes at least two switched-mode-type power supplies that are provided with a transformer and that have outputs connected in parallel without a separation diode at the output of each power supply. Each parallel-connected switched-mode power supply includes means for generating in a reference voltage output a voltage that is proportional to the pulse duty factor of the secondary voltage of the transformer. The reference voltage outputs of each switched-mode power supply are connected in parallel. Each parallel-connected switched-mode power supply also includes means for detecting a current that flows through the reference voltage output, and for generating a correction voltage proportional to this current in order to correct the output voltage of the switched-mode power supply.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: September 19, 2000
    Assignee: Nokia Telecommunications Oy
    Inventor: Jouni Uusitalo
  • Patent number: 6104585
    Abstract: Induced voltages of two tertiary coils magnetically coupled with two secondary coils, respectively, are detected separately by two voltage detector circuits, and the detected voltages V1 and V2 are compared by two comparators with a reference voltage VS. When wiring connected to either one of the two secondary coils or a neon tube is grounded, the induced voltage of the corresponding tertiary coil decreases, then the output from the corresponding comparator is reduced down to zero volt, then a light emitting element emits light, and a phototriac is turned ON to actuate a relay to turn OFF its contact switch, shutting off the supply of AC power.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: August 15, 2000
    Assignee: Kabushiki Kaisha Sanyo Denki Seisakusho
    Inventors: Yoshihiro Matsui, Takayuki Ando, Kazuyuki Hayakawa
  • Patent number: 6101076
    Abstract: An electromagnetic safety (EMS) enhancement circuit is provided for a USB (Universal Serial Bus) system, which can simulate an unplugging and replugging action so as to ensure continuous operation of the USB device after being disconnected from the USB interface due to electromagnetic interferences. The EMS enhancement circuit utilizes an EMS detection unit to detect the EMS condition of the data communication between the USB device and the USB interface; if abnormal, the EMS detection unit will output an overflow signal to a resume-control unit.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: August 8, 2000
    Assignee: Novatek Microelectronics Corp.
    Inventors: Edward Tsai, Roger Chen, Dean Jau
  • Patent number: 6080022
    Abstract: A connection system for providing a consumer-friendly connection between an expansion card and a host device. The host device includes a male connection while the expansion card includes a female connection. The male and female connections are arranged in a pattern that allows a combination of keyed voltage connections between the host device and expansion card when the supply voltage of the host and operating voltage of the card are compatible. The male connection includes six different supply voltage combinations that include a first voltage only, a second voltage only, a third voltage only, a first and second voltage only, a second and third voltage only, and a first, second and third voltage combination. In addition, the female connection includes six different expansion card operating voltage combinations that include a first voltage only, a second voltage only, a third voltage only, a first and second voltage only, a second and third voltage only, and a first, second and third voltage combination.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: June 27, 2000
    Assignee: Intel Corporation
    Inventors: Anthony J. Shaberman, Michael Sean Casey
  • Patent number: 6075687
    Abstract: An X-ray protection device adapted to be incorporated into a monitor that includes a cathode ray tube actuated by a high voltage from a transformer powered by a low voltage power supply. The X-ray protection device includes a circuit which is coupled to a low voltage output of the transformer to obtain a signal from the transformer to represent the high voltage applied by the transformer to the cathode ray tube.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: June 13, 2000
    Assignee: Mag Technology Co., Ltd.
    Inventors: Kuei-Pi Cheng, Gary Hsieh
  • Patent number: 6072676
    Abstract: A protection circuit for an excitation current source protects against excessive compliance voltage by using a cascode transistor between the current source and an output terminal, and a transistor coupled to the output terminal and to the control lead of the cascode transistor to cause the cascode transistor to turn off if the voltage exceeds a threshold level.
    Type: Grant
    Filed: April 13, 1998
    Date of Patent: June 6, 2000
    Assignee: Analog Devices, Inc.
    Inventors: Chan Tran, Steven Martin, A. Paul Brokaw
  • Patent number: 6054888
    Abstract: A level shifter interfaces a digital system having devices designed for low operating voltages to an external system having higher operating voltages. The level shifter is comprised of two level shifting stages. Each level shifting stage includes a pull-up stack of a plurality of pull-up devices, coupled between a high power supply and a coupling node, which turn on when the coupling node is driven to a high shifted voltage, which is substantially the voltage at the high power supply, and which turn off when the coupling node is driven to a low shifted voltage, which is substantially the voltage at a low power supply. Each level shifting stage further includes a pull-down stack of a plurality of pull-down devices, coupled between the low power supply and the coupling node, which turn on when the coupling node is driven to the low shifted voltage and which turn off when the coupling node is driven to the high shifted voltage.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: April 25, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Reading Maley
  • Patent number: 6052053
    Abstract: The present invention provides automated systems for performing electrostatic discharge (ESD) device efficacy monitoring and recording the results for an ESD auditing program. Systems of the present invention comprise at least one ESD device monitoring unit. A communication system allows the monitoring unit to communicate with a central computer which collects, stores and allows the manipulation of the test data. Systems of the present invention are therefore useful in testing the ESD devices, documenting their performance, and controlling access to particular work areas based on testing results.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: April 18, 2000
    Assignee: Semtronics Corporation
    Inventors: Bradford Tyler Jubin, Michael Albert Sanchez
  • Patent number: 6023178
    Abstract: A pulse width control IC circuit that greatly reduces price, increases packaging density,and improves reliability for switching power supply units, wherein the IC circuit is on a single chip and includes a main converter control section that controls the ON and OFF actions of a main switch outside the IC, an output MOSFET, and an auxiliary converter control section that controls the ON and OFF actions of the output MOSFET.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: February 8, 2000
    Assignee: Yokogawa Electric Corporation
    Inventors: Masaki Shioya, Hideaki Matsumura, Takumi Ooe, Iwao Nakanishi, Masuo Hanawaka
  • Patent number: 6020702
    Abstract: The present invention involves a refrigeration system. The refrigeration system comprises an electrical compressor motor, a line adapted to be connected to an electrical power line and a thermostat control circuit. The thermostat control circuit comprises a thermostat responsive logic circuitry coupled to a temperature sensor associated with the compressor and a solid state motor control circuit. The solid state motor control circuit includes a relay circuitry, power switch circuitry, compressor starting circuitry with an overload timer, high voltage protection circuitry, under voltage protection circuitry and run current limiting circuitry. The relay circuitry includes an optical coupler and triac to provide line voltage to the compressor through a start resistor. The power switch circuitry includes a pair of SCR's connected in parallel as a switch to allow current to flow through the compressor.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: February 1, 2000
    Assignee: Tecumseh Products Company
    Inventor: James B. Farr
  • Patent number: 6018450
    Abstract: A output driving circuit having an output driving element, an overshoot protection mechanism, and an undershoot protection mechanism. When the overshoot protection mechanism senses an overshoot voltage at the output terminal of the output driving element, it raises the voltage at the control terminal of the output driving element. This serves to maintain the voltage between the output terminal and the control terminal of the output driving element within a safe range, thereby preventing overstress or damage to the element. When the undershoot protection mechanism senses an undershoot voltage at the output terminal of the output driving element, it lowers the voltage at the control terminal of the output driving element. This serves to maintain the voltage between the output terminal and the control terminal of the output driving element within a safe range, which in turn prevents overstress and damage to the element.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: January 25, 2000
    Assignee: Sun Microsystems, Inc.
    Inventors: Waseem Ahmad, Raoul B. Salem
  • Patent number: 6011680
    Abstract: Connector, in particular a plug-in connector for TT and TN networks, in which an electronic monitoring and control unit supplied with a voltage switches through conductors or releases the connection, by means of a switching device, from the supply side to the load side of the connector as a function of information or measured data. Potential-measuring devices measure conductor potentials continuously or at regular intervals on the supply side and/or on the load side, and the switch is activated if the result falls short of or exceeds specific limits. Also,the electronic monitoring and control unit is designed to generate a signal if the connection is briefly released or established a certain number of times within a predetermined period;the conductors to be switched through are monitored by a fault current detecting device which acts upon the switching device; andinformation and/or command data are present at a bus interface.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: January 4, 2000
    Assignee: Siemens AG
    Inventors: Reinhard Solleder, Reinhard Schmid
  • Patent number: 6008508
    Abstract: Disclosed is a floating gate neuron MOS transistor that may be incorporated into devices such as low voltage silicon control rectifiers for protection of internal circuits against electrostatic discharge. The transistor includes two or more input gates capacitively coupled to the floating gate. By adjusting the coupling ratio of the input gates, it is possible to control the transistor drain turn-on voltage very precisely and thereby turn on the rectifier without relying on avalanche breakdown of the transistor.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: December 28, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Albert Bergemont, Min-hwa Chi
  • Patent number: 6005759
    Abstract: A system for monitoring and controlling an electrical distribution network comprises an electrical distribution substation having a local area network (LAN), a feeder subsystem and a gateway. The feeder subsystem is coupled to the substation and receives electrical energy therefrom for distribution to customers, and includes slave devices for performing switching functions. The gateway provides remote access to the slave devices and the LAN.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: December 21, 1999
    Assignee: ABB Power T&D Company Inc.
    Inventors: David G. Hart, William L. Peterson, David Uy, W. Michael Egolf
  • Patent number: 5990724
    Abstract: In a method and apparatus used for detecting and handling a short circuit in a circuit having a plurality of power semiconductors connected in series the voltage is divided across the electrodes and each power semiconductor and the magnitude of a small proportion of the voltage is measured. The magnitude of the voltage is compared to a reference voltage at least from when the power semiconductor is turned on. The reference voltage is higher than the maximum voltage across the power semiconductor during normal operation. A short circuit is detected when the magnitude of the measured voltage exceeds the reference voltage.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: November 23, 1999
    Assignee: Asea Brown Boveri AB
    Inventors: Bo Bijlenga, Peter Lundberg
  • Patent number: 5949632
    Abstract: A power supply comprising: a power source including a capacitive, nuclear or an electrochemical device for storing electrical energy; sensing circuitry for sensing when the voltage on power source is above or below a certain level; a DC-DC converter coupled to the power source switching circuitry coupled to the sensing circuitry and operable to connect the DC-DC converter to an output load and disconnect the power source from the output load when the voltage on the power source falls below a certain level and for connecting the power source to the output load and disconnecting the DC-DC converter from the output load when the voltage on the power source rises above a certain level; circuitry for activating the DC to DC Converter when the voltage on the power source falls below a certain level; and circuitry means for shutting down the DC to DC Converter when the voltage on the power source rises above a certain level.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: September 7, 1999
    Assignee: Exonix Corporation
    Inventors: Francisco Jose Barreras, Sr., Guillermo Echarri, Roberto Echarri
  • Patent number: 5943246
    Abstract: A digital voltage detector uses a running average to detect utility service disturbances in real time. An isolation transformer taps the main electrical AC power supply line and provides an analog voltage waveform to a system controller. The analog waveform is sampled digitally in real time, and the samples are squared to create respective instantaneous squared voltage values. A running average is kept of the instantaneous squared voltage values for a preselected period of time, preferably one half-cycle for the main power supply waveform. The running average is compared to a preselected under-voltage threshold value and a preselected over-voltage threshold value, and a disturbance detection signal is generated if the running average violates either threshold value. The disturbance detection signal is preferably used to activate a standby electrical AC power supply, and contemporaneously to disable the main electric AC power supply.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: August 24, 1999
    Assignee: Omnion Power Engineering Corporation
    Inventor: David G. Porter
  • Patent number: 5926384
    Abstract: An electronic circuit includes a dynamic regulator connected to a load and a dc-to-dc converter to reduce a need for bulky and expensive capacitors which would otherwise be required to suppress transients. The dynamic regulator comprises one or both of a current source circuit for actively sourcing current to the load during load current demand transients, and a current sink circuit for actively sinking current from the load during load current excess transients. The dynamic regulator preferably senses the load voltage, and tracks the load voltage. The current source circuit preferably includes a current source switch, and a current source controller for operating the current source switch responsive to the load voltage falling rapidly with respect to the tracked load voltage. In a similar fashion, the current sinking circuit may include a current sink switch, and a current sink controller for operating the current source switch responsive to the load voltage rising quickly above the tracked load voltage.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: July 20, 1999
    Assignee: Harris Corporation
    Inventors: Thomas Andrew Jochum, Michael Mark Walters, Charles Edward Hawkes, Matthew Harris
  • Patent number: 5923513
    Abstract: A snubber device for a power switch comprising a sensing device coupled in the output circuit of the power switch, the sensing device having a reference input and providing an output indicating if a transient pulse of a magnitude greater than a preset range occurs in the output circuit of the power switch. A further electronic switch is provided having an input coupled to an output of the sensing device and coupled across the power switch, the further electronic switch being turned on by the sensing device in the event the sensing device detects a transient pulse beyond the preset range, thereby completing a shunt circuit across the electronic switch and dissipating the transient pulse.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: July 13, 1999
    Assignee: International Rectifier Corp.
    Inventor: Brian Pelly