Having Voltage Protection Patents (Class 363/56.05)
  • Patent number: 6587356
    Abstract: The invention is a scheme for high power isolated full-bridge boost DC/DC converters to minimize the effect of in-rush current during start-up. A single pulse width modulation controller (PWM) is possible for the present invention for not only start-up but also normal boost modes. A primary circuit can have a clamping switch or at least two choke diodes. The choke diode can include “push-pull” and “L”-type configurations. A resistor can be used to dissipate energy clamped from the voltage spike. A startup circuit can be used to eliminate the in-rush current experienced during start-up. The proposed start-up schemes have been experimentally verified using a 1.6 kW, 12V/288 V prototype. Since the present invention eliminates the need to match characteristics of multiple controllers, it significantly reduces the cost associated with implementing this type of technology.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: July 1, 2003
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Lizhi Zhu, Jin-Sheng Lai, Fred C. Lee
  • Patent number: 6583997
    Abstract: A wide input range switching power supply for a circuit protection device includes a rectifier circuit for rectifying an AC line voltage at a supply input, and a switch-mode DC-to-DC converter coupled to the rectifier circuit for providing a low voltage DC power to a load at a supply output. The converter includes a switch having an open state and a closed state and a control circuit for controlling the state of the switch. The control circuit is operatively coupled to receive operating power from the supply output.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: June 24, 2003
    Assignee: Square D Company
    Inventors: Paul A. Reid, Randall J. Gass
  • Patent number: 6490182
    Abstract: A semiconductor electric power converter in accordance with the present invention comprises an arm consisting of an IGBT, a capacitor connected between a collector and a gate of said IGBT, and a gate circuit connected to the gate of said IGBT for controlling the switching operation of said IGBT, wherein a plurality of said arms connected in series are connected in parallel and each midpoint of said arms connected in of series is connected to a load. Thereby the impedance between the gate terminal of the IGBT and the gate circuit is decreased when the gate voltage is higher than the gate voltage command value or the impedance between the gate and the emitter of the IGBT is decreased when the collector voltage is high so that an electric charge stored in the gate is rapidly discharged.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: December 3, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Katoh, Hiromitsu Sakai, Shigeta Ueda, Tomomichi Ito, Hidetoshi Aizawa
  • Patent number: 6466465
    Abstract: A method reducing transient overshoot of an output signal of an uninterruptable power supply, the uniterruptable power supply including: (a) an inverter having at least one power switch; (b) a digital controller that generates a pulse width modulated (PWM) signal for controlling the power switch, the PWM signal having a fixed period TPWM and (c) an analog to digital signal corresponding to the sampled output signal, the method comprising the steps of (1) operating the A/D converter to sample the output signal at a first time to generate a first sampled output value; (2) operating the A/D converter to sample the output signal at a second time to generate a second sampled output value, the period between the second time and the first time being equal to TPWM; (3) generating a control input value that is equal to 1.5 times the second sampled output value minus 0.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: October 15, 2002
    Assignee: Liebert Corporation
    Inventor: Mohammad N. Marwali
  • Patent number: 6452815
    Abstract: This invention is an efficient and cost effective bi-directional DC/DC converter that can effectively reduce the switch voltage stress (such as a semiconductor) with an accelerated commutation circuit, and thus allowing a low-cost passive clamp circuit to be used. Specifically, the invention is a method and system to accelerate commutation for passive-clamped isolated boost converters, which can also be a boost mode in a bi-directional DC/DC converter. A primary circuit has a snubber comprising a diode, a capacitor and an energy dissipater (such as a resistor or small buck converter). The primary circuit can be a “full bridge converter” or a “push-pull converter” or an “L-type converter” configuration. The commutation of the present invention protects the primary circuit switches from voltage spikes during switching conditions.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: September 17, 2002
    Inventors: Lizhi Zhu, Jih-Sheng Lai, Fred C. Lee
  • Patent number: 6434019
    Abstract: The invention provides a method by which losses are reduced during the commutation of a free-running, driven power converter valve (T2) of an invertor phase (2) to a current-accepting power converter valve (T1) of said invertor phase (2). The current-accepting power converter valve (T1) is switched on at the beginning of the commutation process and the free-running, driven power converter valve (T2) is rapidly switched off as soon as the value of its drain voltage (UD) is zero.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: August 13, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventors: Eric Baudelot, Manfred Bruckmann, Heinz Mitlehner, Benno Weis
  • Patent number: 6407937
    Abstract: The present invention relates to an active overvoltage protection apparatus for a bidirectional power switch which has two back-to-back in series connected semiconductor switches in the “common collector mode” topology. The overvoltage protection apparatus has a diode network which is linked to gate and emitter connections of the bidirectional power switch in the in such a manner as to provide a voltage clamping circuit for each of the semiconductor switches in the bidirectional power switch.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: June 18, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventors: Manfred Bruckmann, Walter Springmann
  • Patent number: 6396714
    Abstract: The present invention discloses an active clamp forward converter that reduces the charging voltage of clamp capacitors as well as the voltage applied to switching elements, making it possible to reduce the on loss of the switching elements while also enabling the size of the capacitance elements to be reduced. The active clamp forward converter comprises first and second FETs which respectively connects first and second ends of a primary coil of the transformer to positive and negative terminals of a direct current power supply, and third and fourth FETs which respectively connects the first and second ends to the negative and positive terminals of a direct current power supply via capacitors, wherein the pair of first and second FETs and the pair of third and fourth FETs are alternately switched on and off sandwiched about a period when both are off.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: May 28, 2002
    Assignee: NEC Corporation
    Inventor: Tsutomu Kato
  • Patent number: 6373731
    Abstract: A power inverter using a voltage driven switching element, capable of suppressing an excessive surge voltage which is generated on high-speed switching of IGBTs or MOSFETs, and suppressing radio frequency oscillation after the suppression of the surge voltage. The power inverter includes a switching element rendering a power path conducting and non-conducting, and a speeding-up circuit of a feedback path in an active clamping circuit added to the switching element.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: April 16, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Iwamura, Hideki Miyazaki, Katsunori Suzuki, Junichi Sakano, Mutsuhiro Mori, Koji Tateno
  • Patent number: 6351399
    Abstract: To prevent malfunction or breakdown due to a surge voltage in a power converter for converting DC into AC or the like so as to supply electric power to a load, not only a control signal is transmitted via a level shift circuit which is provided correspondingly to each of switching semiconductor elements forming a main circuit and shifts a level of a reference potential at its output side so as to follow variations of a reference potential of the switching semiconductor element to the switching semiconductor element, but a DC control power source for supplying electric power to the level shift circuit and a negative pole of the switching semiconductor element are connected to each other through at least one of an inductor and a resistance.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: February 26, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Takanashi, Shinji Hatae, Kazuaki Hiyama, Khalid Hassan Hussein, Fumitaka Tametani
  • Patent number: 6349044
    Abstract: A three-level DC-to-DC converter is provided having zero-voltage and zero-current switching (ZVZCS). A flying capacitor is provided on the primary side of the converter to achieve zero voltage switching (ZVS). In addition, during freewheeling (i.e., when no power is being transferred from the primary side to the secondary side), an auxiliary power source is provided to eliminate the circulating energy and to achieve zero current switching (ZCS) for the commutation switches.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: February 19, 2002
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Francisco Canales-Abarca, Peter M. Barbosa, Fred C. Lee
  • Publication number: 20020015319
    Abstract: An active transient-control circuit included in a power supply responds swiftly to changes occurring in the output-power voltage produced by a power converter to reduce transient changes in the output-power voltage caused by sudden, substantial changes in the electrical current drawn by the load. To respond in this way, when the output-power voltage has a magnitude less than a lower pre-established-voltage threshold, the active transient-control circuit supplies electrical energy directly to the load from the input electrical power thereby augmenting output electrical power supplied to the load by the power converter. Correspondingly, when the output-power voltage has a magnitude that exceeds an upper pre-established-voltage threshold, the active transient-control circuit draws electrical energy directly from the output of the power converter.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 7, 2002
    Inventors: Alexandru Hartular, Sorin Laurentiu Negru, Laszlo Lipcsei
  • Publication number: 20010046143
    Abstract: The present invention relates to an active overvoltage protection apparatus for a bidirectional power switch which has two back-to-back in series connected semiconductor switches in the “common collector mode” topology. The overvoltage protection apparatus has a diode network which is linked to gate and emitter connections of the bidirectional power switch in the in such a manner as to provide a voltage clamping circuit for each of the semiconductor switches in the bidirectional power switch.
    Type: Application
    Filed: March 23, 2001
    Publication date: November 29, 2001
    Applicant: SIEMENS AG
    Inventors: Manfred Bruckmann, Walter Springmann
  • Patent number: 6272028
    Abstract: A power converter apparatus, including a DC power source, a semiconductor stack, connected to the DC power source in parallel, having a plurality of semiconductor devices and a cooler for refrigerating the semiconductor devices, the semiconductor devices and the cooler are stacked and pressured to each other, and a snubber circuit, connected to the DC power source in parallel, having a serial circuit of a capacitor and a diode, and a resistor connected in parallel to the diode, one terminal of the capacitor is disposed adjacent to the semiconductor stack so that magnetic flux generated by current flowing in the terminal cancels magnetic flux caused by current flowing in the semiconductor stack.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: August 7, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Satoh, Ryo Nakajima, Kosaku Ichikawa