Including Semiconductor Means Patents (Class 363/60)
  • Patent number: 10862392
    Abstract: A charge pump circuit has a plurality of charge pump stages cascaded to one another between an input terminal and an output terminal to provide an output voltage having a boosted value with respect to the input voltage. A clock generator is configured to generate a clock signal provided to the charge pump stages to perform the boosting of the input voltage. An output-voltage regulation feedback closed-loop is coupled to the clock generator to perform a regulation of the output voltage based on a feedback voltage. A discharge control stage is configured to control a discharge of the charge pump circuit by generating a first discharge control signal configured to disable the output-voltage regulation feedback closed-loop or a second discharge control signal configured to reduce the frequency of the clock signal.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: December 8, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Fabio de Santis, Dario Livornesi
  • Patent number: 10845835
    Abstract: A voltage regulator device and a control method thereof are provided. The voltage regulator device includes a voltage regulator and a path switch. The voltage regulator includes an output node and a voltage divider circuit. The output node is used to generate a control voltage. The voltage divider circuit generates an overshoot reference voltage according to an input voltage. A first node of the path switch is coupled to the output node, a second node of the path switch is coupled to a reference voltage node, and a control node of the path switch receives the overshoot reference voltage. When the control voltage is greater than the sum of the overshoot reference voltage and a threshold voltage of the path switch, the path switch is turned on to direct a charge at the output node to the reference voltage node.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: November 24, 2020
    Assignee: Winbond Electronics Corp.
    Inventors: Jyun-Yu Lai, Hsing-Yu Liu
  • Patent number: 10840805
    Abstract: An integrated power supply and modulator system includes integrated power supply and modulator system includes three subsystems: a switched-capacitor voltage balancer stage; a magnetic regulation stage; and at least one output switching stage. In one embodiment, the integrated power supply and modulator system further includes startup circuitry, feedback/feedforward circuitry and control circuitry.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: November 17, 2020
    Inventors: David J. Perreault, Wei Li, Yevgeniy A. Tkachenko
  • Patent number: 10833585
    Abstract: Described herein is a technology for implementing a scalable SCIB regulator for high conversion step down application. Particularly, the SCIB is configured to include stacked input switch circuits with parallel-connected output switch circuits. The input switch circuits are stacked with or without DC shift switch circuits in between. Furthermore, the input voltage is stepped down to a biasing voltage by input switch circuits and then is regulated to one or more output voltages having one or more independent and predetermined values by output switch circuits. The input switch circuits, output switch circuits and DC shift switch circuits can be modified for scalable power capability and ease of control and manufacturing.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 10, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yichao Tang, Sombuddha Chakraborty
  • Patent number: 10826493
    Abstract: A gate driving circuit for providing a high driving voltage includes a first N-type high-voltage transistor and a second N-type high-voltage transistor connected in series between a driving voltage output node and a system low-voltage source. A voltage difference between a system high-voltage source and the system low-voltage source is greater than a withstand voltage of the first or second N-type high-voltage transistor. When the driving voltage output node is to output a system high voltage, the first N-type high-voltage transistor and the second N-type high-voltage transistor are turned off. Deep N-type well regions of the first N-type high-voltage transistor and the second N-type high-voltage transistor are applied with a first bias voltage. A voltage difference between the first bias voltage and the system low-voltage source is smaller than an interface breakdown voltage between the deep N-type well region and a P-type well region of the second N-type high-voltage transistor.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: November 3, 2020
    Assignee: ITE Tech. Inc.
    Inventors: Yi-Chung Chou, Chih-Yuan Kuo, Dong-Shan Chen
  • Patent number: 10819230
    Abstract: Disclosed are a DC voltage conversion circuit, a DC voltage conversion method and a liquid crystal display device.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 27, 2020
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Wenfang Li, Dan Cao
  • Patent number: 10819228
    Abstract: This disclosure describes techniques for controlling a power supply voltage for a high-side gate driver that is used in a power converter. In some examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may decouple a terminal of a charge pump capacitor from the input voltage lead, and couple the terminal of the capacitor to a reference voltage lead. In further examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may turn off both switching transistors.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 27, 2020
    Assignee: Texas Instruments Incorporated
    Inventor: Indumini W. Ranmuthu
  • Patent number: 10797660
    Abstract: Various buck-boost amplifier architectures are disclosed. In some architectures, a plurality of amplifiers use one or more inductors from a shared bank of inductors as needed to deliver variable amounts of power to respective loads. In some architectures, each amplifier includes multiple inductors and switches that are controlled to vary the number of inductors used in an amplifier based on a power requirement of the amplifier to drive its load. In some architectures, the switches include well switching devices. In some architectures, each amplifier drives multiple loads and is operated in a single inductor multiple output (SIMO) mode. In all architectures, the loads include speakers, piezo elements, and motors.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: October 6, 2020
    Assignee: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Cary Delano, Doug Heineman, Graeme Docherty, Feng Yu
  • Patent number: 10784764
    Abstract: A gate driver for a high-side NMOS power transistor in a DC/DC boost converter includes first and second switches coupled in series between an output pin and the gate of the high-side transistor. A third switch is coupled between the gate and a switch-node between the high-side and low-side transistors, the switch node also being coupled to an input pin. Fourth and fifth switches are coupled in series between the output pin and a clamp pin. Sixth and seventh switch are coupled in series between the output pin and a ground pin. First and second bootstrap capacitors have respective first terminals coupled to a first node between the first and second switches. The first capacitor has a second terminal coupled to a node between the fourth and fifth switches; the second capacitor has a second terminal coupled to a node between the sixth and seventh switches.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: September 22, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Eduardas Jodka, Julian Becker, Carsten Stoerk
  • Patent number: 10778091
    Abstract: An electronic device includes: a clock booster configured to generate a boosted intermediate voltage greater than a source voltage, wherein the clock booster includes: a controller capacitor configured to store energy for providing a gate signal, wherein the gate signal is for controlling charging operations to generate the boosted intermediate voltage based on the source voltage, and a booster capacitor configured to store energy according to the gate signal for providing the boosted intermediate voltage, wherein the booster capacitor has greater capacitance level than the controller capacitor; and a secondary booster operatively coupled to the clock booster, the secondary booster configured to generate an output voltage based on the boosted intermediate voltage, wherein the output voltage is greater than both the source voltage and the boosted intermediate voltage.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: September 15, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Michele Piccardi
  • Patent number: 10770118
    Abstract: A reverse bias voltage adjuster is provided. The reverse bias voltage adjuster includes an operating voltage generating circuit and a voltage adjusting circuit. The operating voltage generating circuit generates an operating voltage according to a burnin-test signal, a power start signal, and a reverse bias enable signal. In a normal operation mode, the operating voltage is a first voltage value, and in a burnin-test mode, the operating voltage is a second voltage value, wherein the second voltage value is less than the first voltage value. The voltage adjusting circuit is provided with a switch, and in an initial time interval in the burnin-test mode, the voltage adjusting circuit adjusts voltage value of the reverse bias by turning on the switch.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: September 8, 2020
    Assignee: Winbond Electronics Corp.
    Inventor: Yuji Nakaoka
  • Patent number: 10763746
    Abstract: A charge pump having only NMOS devices charges a plurality of capacitors to a parallel charged voltage level by electrically connecting the capacitors in parallel between an input voltage node and a ground by activating a plurality of first NMOS transistor switches and a plurality of second NMOS transistor switches and deactivating a plurality of third NMOS transistor switches. The charge pump then generates a series capacitor output voltage level at a capacitor series output node by electrically connecting and discharging the capacitors in series between the input voltage node and the capacitor series output node by activating the third NMOS transistor switches and deactivating the first NMOS transistor switches and the second NMOS transistor switches.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: September 1, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 10756643
    Abstract: A flipping-capacitor rectifier circuit that enhances an output power of a piezoelectric energy harvester (PEH). The flipping-capacitor rectifier circuit includes a flipping capacitor, a plurality of switches, and an active rectifier. The flipping capacitor is connected in parallel with the PEH and forms at least three reconfiguration phases by turning on one or more of the switches. The active rectifier connects with the flipping capacitor in parallel and rectifies an AC voltage of the PEH. The flipping capacitor flips a voltage across a capacitor of the PEH to enhance the output power of the PEH by extracting power from the capacitor of the PEH.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: August 25, 2020
    Assignee: UNIVERSITY OF MACAU
    Inventors: Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Rui Paulo da Silva Martins
  • Patent number: 10749218
    Abstract: Certain aspects of the present disclosure provide apparatus and techniques for charging a multi-stack battery pack. For example, certain aspects provide a circuit for charging a battery pack having multiple battery cells. The circuit generally includes a voltage regulator circuit and charge pump circuitry having an input coupled to an output of the voltage regulator circuit, and an output coupled to a first battery charging terminal. In certain aspects, the first battery charging terminal may be configured to be coupled to a terminal of a first battery cell of the multiple battery of the battery pack.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: August 18, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Steve Hawley, Giuseppe Pinto
  • Patent number: 10734894
    Abstract: A charge pump system including charge pump circuitry, a charge pump controller, and current limit circuitry. The charge pump circuitry has an input coupled to a supply input node and has an output for developing a drive voltage. The charge pump controller controls the charge pump circuitry to increase the drive voltage above a supply voltage provided to the supply input node. The current limit circuitry limits current through the charge pump circuitry to a limited current level that is less than a maximum current level during a current limit mode to reduce current spikes at the nodes of the charge pump system that may generate EMI. A current mirror may be used as the current limit circuitry to directly limit current through switches of the charge pump circuitry. The timing of the charge pump switches may also be modified such as inserting strategic delays to reduce the current spikes.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: August 4, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Chao Yang, Mohamed Elsayed
  • Patent number: 10718880
    Abstract: A downhole tool may include a voltage multiplier within a housing. The voltage multiplier may transform input power to the downhole tool from a first voltage to a second voltage higher than the first. The downhole tool may also include multiple shielding rings surrounding at least the voltage multiplier to reduce electric field stresses within the downhole tool. Additionally, the downhole tool may include an insulator located between the shielding rings and the housing.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: July 21, 2020
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Matthieu Simon, Jani Reijonen
  • Patent number: 10693368
    Abstract: During its first and second residence times, corresponding first and second currents flow between a charge pump and a circuit that connects to one of the charge pump's terminals. Based on a feedback measurement from the charge pump, a controller adjusts these first and second currents.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: June 23, 2020
    Assignee: pSemi Corporation
    Inventors: Tim Wen Hui Yu, Gregory Szczeszynski
  • Patent number: 10693367
    Abstract: In some examples, an electrical power system includes a differential bus including a high-side rail and a low-side rail, a power source configured to generate power, and a bulk capacitor coupled between the high-side rail and the low-side rail, the bulk capacitor configured to filter the power generated by the power source. The electrical power system also includes a converter configured to convert the power filtered by the bulk capacitor and a pre-charging circuit comprising one or more switches and a middle capacitor, the pre-charging circuit configured to pre-charge the bulk capacitor.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: June 23, 2020
    Assignees: Rolls-Royce North American Technologies, Inc., Rolls-Royce Singapore Pte. Ltd.
    Inventors: Pradip Chatterjee, Chandana Jayampathi Gajanayake, Eric D. Schneider, Devinda A. Molligoda, Amit Kumar Gupta
  • Patent number: 10693455
    Abstract: A thyristor or triac control circuit includes a first capacitive element that is series-connected with a first diode between a first terminal and a second terminal intended to be coupled to a gate of the thyristor or triac. A second capacitive element is coupled between the second terminal and a third terminal intended to be connected to a conduction terminal of the thyristor or triac on the gate side of the thyristor or triac. A second diode is coupled between the third terminal and a node of connection of the first capacitive element and first diode.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: June 23, 2020
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Ghafour Benabdelaziz, Cedric Reymond
  • Patent number: 10666245
    Abstract: A circuit and a method for providing a switchable current linkage between a first terminal and a second terminal is presented. The circuit has a transistor switch and a charge pump circuit An output node of the charge pump circuit is coupled to a control terminal of the transistor device, and an input node of the charge pump circuit is coupled to a predetermined voltage. The charge pump generates a boosted voltage. A drive circuit provides feedback control for the current flowing through the transistor. The drive circuit also controls the voltage magnitude at the input node of the charge pump circuit in accordance with the feedback control or to control a magnitude of a voltage at the control terminal of the transistor device in accordance with the feedback control.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: May 26, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Jerome Sanchez, Fabio Rigoni, Jan Grabinski, Ali Zahabi
  • Patent number: 10615686
    Abstract: An embodiment provides a technology of sharing electric charges of two or more flying capacitors in a time interval in which a plurality of flying capacitors are floated, so as to control the charging/discharging balance of the flying capacitors, in a step-up converter.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: April 7, 2020
    Assignee: SILICON WORKS CO., LTD.
    Inventor: Young Jin Woo
  • Patent number: 10608528
    Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: March 31, 2020
    Assignee: WISPRY, INC.
    Inventors: David Zimlich, Vincent Cheung
  • Patent number: 10541613
    Abstract: The power supply apparatus includes an inductor; a switching element connected to another end of the inductor, the switching element configured to drive the inductor by being turned on or turned off in accordance with an input pulse signal; a boost converter circuit connected to both ends of the inductor and including a plurality of rectification units, the boost converter circuit configured to amplify a voltage generated in the inductor, each of the plurality of rectification units including a diode and a capacitor; and a voltage boosting element configured to supply a voltage obtained by boosting an input voltage to the inductor.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: January 21, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Jun Hirabayashi
  • Patent number: 10498230
    Abstract: A voltage control device includes a charge pump, a driving circuit, and a control circuit. The charge pump provides a first voltage. The driving circuit is coupled to the charge pump, and receives the first voltage and a reference voltage. The driving circuit outputs a driving signal according to an input signal, the first voltage and the reference voltage. The control circuit is coupled to the charge pump and the driving circuit. Before the first voltage reaches a threshold level, the control circuit adjusts the reference voltage to increase the voltage gap between the first voltage and the reference voltage.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: December 3, 2019
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Tien-Yun Peng
  • Patent number: 10491111
    Abstract: Circuits and methods are provided for soft-starting a switched-capacitor converter (SCC), so as to limit inrush current at the start-up of the SCC. This is accomplished by using the first power switch of the SCC, i.e., the switch coupled to the input of the SCC, to reduce the voltage provided at the SCC input, such that the full input voltage is not directly applied to the SCC circuitry downstream from the first power switch during the SCC start-up. The reduced voltage provided to the SCC circuitry (other than the first power switch) serves to limit the current drawn by the remainder of the SCC circuit during the SCC start-up. This reduced voltage begins at zero and ramps to the voltage provided at the SCC input. Once the reduced voltage reaches the input voltage level, steady-state operation of the SCC may begin.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Otto Wiedenbauer, Christian Rainer
  • Patent number: 10447151
    Abstract: Circuits, devices, and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 15, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Bo Zhou, Guillaume Alexandre Blin
  • Patent number: 10367412
    Abstract: To provide a power factor correction circuit capable of maintaining loop gain properly while maintaining current sensing accuracy even when different AC input voltages are input and a switching power source device using the power factor correction circuit. A power factor correction circuit includes: a power factor correction control circuit including an input voltage detection terminal to which voltage corresponding to input voltage to a boost chopper is input, a current sensing terminal to which voltage corresponding to inductor current in the boost chopper is input, an output voltage detection terminal to which voltage corresponding to output voltage from the boost chopper is input, and an output terminal outputting a drive signal for a switching element; and a voltage adjustment circuit configured to detect the input voltage and adjust voltage at the current sensing terminal and voltage at the input voltage detection terminal according to the detected input voltage.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: July 30, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masatoshi Sugimoto
  • Patent number: 10366734
    Abstract: A system and method for efficient power, performance and stability tradeoffs of memory accesses under a variety of conditions are described. A system management unit in a computing system interfaces with a memory and a processing unit, and uses boosting of word line voltage levels in the memory to assist write operations. The computing system supports selecting one of multiple word line boost values, each with an associated cross-over region. A cross-over region is a range of operating voltages for the memory used for determining whether to enable or disable boosting of word line voltage levels in the memory. The system management unit selects between enabling and disabling the boosting of word line voltage levels based on a target operational voltage for the memory and the cross-over region prior to updating the operating parameters of the memory to include the target operational voltage.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: July 30, 2019
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Alexander W. Schaefer, Ravi T. Jotwani, Samiul Haque Khan, David Hugh McIntyre, Stephen Victor Kosonocky, John J. Wuu, Russell Schreiber
  • Patent number: 10355593
    Abstract: An inductor; a first switch having a first side connected to a first voltage source (VS1); a second switch having a first side connected to a second side of the first switch (2SS1), and a second side connected to a first side of the inductor (1SI); a third switch having a first side connected to the 1SI; a fourth switch having a first side connected to a second side of the third switch (2SS3), and a second side connected to a second voltage source (VS2); a fifth switch having a first side connected to the 1SI, and a second side connected to the VS1 and/or the VS2; a first capacitor having a first side connected to the 2SS1, and a second side connected to the 2SS3; and a second capacitor having a first side connected to a second side of the inductor, and a second side connected to the VS2.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: July 16, 2019
    Assignee: Lion Semiconductor Inc.
    Inventors: Alberto Puggelli, Minbok Lee, Hans Meyvaert, Zhipeng Li
  • Patent number: 10340783
    Abstract: The present invention provides a pulse modulating power source, which comprises: a plurality of discharging modules connected in series during discharging; a plurality of triggers corresponding to said plurality of discharging modules, wherein each trigger provides a trigger signal to the corresponding discharging module to turn it on; a control logic module for controlling the trigger signals so as to turn on said plurality of discharging modules successively with a time delay; an output terminal for outputting a voltage.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: July 2, 2019
    Assignees: Nuctech Company Limited, Tsinghua University
    Inventors: Yaohong Liu, Chuanxiang Tang, Xinshui Yan, Wei Jia, Jianjun Gao, Jinsheng Liu, Wei Yin, Xiying Liu, Hao Shi
  • Patent number: 10312791
    Abstract: A negative high-voltage generation device with multi-stage selection includes an input, an output, negative charges pumps, electrical switches, and a control device. The negative charge pumps are electrically cascaded between the input and the output and configured to receive zero voltage through the input. The control device turns off at least one of the electrical switches close to the output and turns on the remains of the plurality of electrical switches, and the negative charge pumps and the electrical switches use zero voltage to generate a negative voltage at the output.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: June 4, 2019
    Assignee: National Chiao Tung University
    Inventors: Ming-Dou Ker, Shiau-Pin Lin
  • Patent number: 10270339
    Abstract: A charger integrated circuit is provided which includes a DC-DC converter configured to receive an input voltage and generate an output voltage through a switching operation for charging a battery, and a charging controller configured to control the switching operation such that the output voltage is supplied to the battery through charging paths chargeable according to a level of the input voltage.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: April 23, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang Chan Lee, Sanghee Kang, Jungwook Heo, Sungwoo Lee, Daewoong Cho
  • Patent number: 10222777
    Abstract: An input-output device includes an input circuit unit including an input-signal-setting storing unit that stores a plurality of ON conditions of the input signal and an input circuit that determines whether any one of the ON conditions of the stored input signal holds, a computing unit including an output-signal-setting storing unit that stores information in which the ON conditions of the input signal, output ports for outputting an output signal, and specifications of the output signal are associated and an output-signal selecting unit that generates, on the basis of a determination result of the input circuit and the stored information, an output command indicating the output ports and the specifications of the output signal, and an output circuit unit including an output circuit that outputs, to the output ports indicated by the output command, the output signal according to the specifications indicated by the output command.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: March 5, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventor: Masahiro Takahashi
  • Patent number: 10216009
    Abstract: A lens driver or lens driver circuitry for an ophthalmic apparatus comprising an electronic system which actuates a variable-focus optic is disclosed herein. The lens driver is part of an electronic system incorporated into the ophthalmic apparatus. The electronic system includes one or more batteries or other power sources, power management circuitry, one or more sensors, clock generation circuitry, control algorithms and circuitry, and lens driver circuitry. The lens driver circuitry includes one or more power sources, one or more high voltage generators and one or more switching circuits. Specifically, the lens driver comprises an H-bridge/H-bridge controller for providing the proper voltage, including polarity, to drive the electronic included in the ophthalmic apparatus.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: February 26, 2019
    Assignee: Johnson & Johnson Vision Care, Inc.
    Inventors: Donald Whitney, Adam Toner
  • Patent number: 10217921
    Abstract: A display apparatus is provided. The display apparatus includes a display panel, a chassis configured to support the display panel, a backlight unit configured to be installed on the chassis, and an electricity generator configured to use the backlight unit as a heat source to generate electricity. The electricity generator includes a heat transfer unit which contacts the backlight unit, at least one heat storage unit which contacts the heat transfer unit, and at least one thermoelectric device comprising a heat generator and a heat absorber contacting the heat transfer unit. The at least one thermoelectric device absorbs heat, which is generated from the backlight unit, through the heat transfer unit in response to the backlight unit being driven and absorbs heat from the at least one heat storage unit through the heat transfer unit in response to the backlight unit not being driven.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: February 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Su-hwan Jin, Hyun-taek Na, Dae-hyun Nam, Dae-yeon Yun, Jeong-il Kang, Jin-hyun Cho
  • Patent number: 10211727
    Abstract: A voltage multiplier circuit operates in response to a received clock signal to perform a voltage multiplication operation on an input voltage to generate an output voltage. The voltage multiplier circuit includes a pair of intermediate nodes that are capacitively coupled to receive, respectively, opposite phases of a clock signal. A first CMOS driver circuit is coupled to one of the intermediate nodes and has an output configured to generate one phase of a level shifted output clock signal. A second CMOS driver circuit is coupled to another one of the intermediate nodes and has an output configured to generate another phase of the level shifted output clock signal.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: February 19, 2019
    Assignee: STMicroelectronics International N.V.
    Inventor: Vikas Rana
  • Patent number: 10163418
    Abstract: A driver circuit for an electronic display, including a power supply system configured to provide a reference voltage, a DC-DC converter having an input connected to the power supply system and having at least a first output configured to provide a first driving voltage, a second output configured to provide a second driving voltage and a third output configured to provide a third output voltage, wherein the second output voltage is higher than the first output voltage and wherein the third output voltage is higher than the second output voltage, wherein the DC-DC converter includes at least a first charge pump, and wherein the input is directly connectable to the second output to provide the reference voltage as the second output voltage.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: December 25, 2018
    Assignee: The Swatch Group Research and Development Ltd
    Inventor: Alberto Ramon Ruiz Donate
  • Patent number: 10147796
    Abstract: The present disclosure is directed to a plurality of waffle gate parallel transistors having a shared gate on a surface of a semiconductor substrate. The shared gate has connected channels that form a plurality of squares, lines of each of the squares over the perimeter of a respective source or drain region of the plurality of waffle gate parallel transistors. The shared gate includes squares of a first size and shape and a second size and shape. The squares having the first size and shape are each over a respective source region and the squares having the second size and shape are each over a respective drain region. Each of the squares having a first size and shape share at least one side with one of the squares having the second size and shape.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: December 4, 2018
    Assignee: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
    Inventors: Patrik Vacula, Milos Vacula, Vlastimil Kote, Adam Kubacak, Milan Lzicar
  • Patent number: 10141847
    Abstract: A switched capacitor DC-DC convertor circuit and a production method thereof are described. The switched capacitor DC-DC convertor circuit includes two switched-capacitor circuits each including at least one capacitor, multiple internal switches and the same circuit layout. The internal switches of the two switched-capacitor circuits corresponding in position to each other are controlled by different control signals, and the turn-on durations of the control signals do not overlap. The capacitors of the two switched capacitor circuits are connected by an interconnection switch, and a turn-on duration of a control signal for the interconnection switch also does not overlap with that of the control signals for the internal switches. The switched capacitor DC-DC convertor circuit has a lower switching power loss compared to current state of the art.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: November 27, 2018
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chung-Ming Hsieh, Wei-Chan Hsu
  • Patent number: 10050515
    Abstract: In described examples, a DC-DC converter provides electrical power. The converter includes an inductor and a flying capacitor. In response to an input voltage transitioning from below a normal operation threshold to above the threshold, a first transition phase and a second transition phase are repeatedly performed. The first transition phase comprises coupling an input terminal of the inductor to a ground, and the second transition phase comprises delivering power through the inductor by discharging the flying capacitor through the inductor. After the input voltage is above the normal operation threshold, and a voltage across the flying capacitor has reached a target voltage proportional to the input voltage, a charging phase, a freewheeling phase and a discharging phase are repeatedly performed. The charging phase comprises charging the flying capacitor by coupling the flying capacitor to the input voltage, and delivering current from the input voltage through the inductor.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: August 14, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sombuddha Chakraborty, Jeff Lee Nilles, Mervin John
  • Patent number: 10050091
    Abstract: A display device includes a display panel displaying an image. A light source unit provides light to the display panel. A cover member covers a portion of an upper surface of the display panel and a side surface of the display panel. The cover member exposes a display area of the display panel. A thermoelectric device is disposed between the cover member and the light source unit. The thermoelectric device contacts the cover member, and the thermoelectric device generates an electromotive force due to a difference in temperature between the light source unit and the cover member.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: August 14, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Taehee Lee, Myungim Kim, Hongshik Shim, Yong-Suk Yeo, Byunghan Yoo
  • Patent number: 10044259
    Abstract: A DC-DC converter comprises an oscillator and a charge pump, to ensure operation at low voltage. The oscillator comprises one or more source degenerated transistors comprising a degeneration impedance located between a source of the transistor and a ground connection. The degeneration impedance comprises an inductor and a capacitor. Also provided is an energy harvesting device comprising such a DC-DC converter.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: August 7, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Stefano D'Amico, Francesco Dalena, Mirko Pasca
  • Patent number: 9966851
    Abstract: A buck-boost converter automatically chooses work mode between buck mode, boost mode and buck-boost mode, in response to an input voltage and an output voltage. The buck-boost converter is with simple structure, convenient mode transition and lower output voltage ripple.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 8, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Qian Ouyang
  • Patent number: 9960754
    Abstract: These various embodiments serve to facilitate interlaced amplitude pulsing using a hard-tube type pulse generator having at least one energy-storage unit each comprising at least one energy-storing capacitor. Generally speaking, this comprises controlling an amount of energy withdrawn from the energy-storage unit and provided to an output load to form productive electric pulses by controlling at least one of: (1) energy replenishment; and (2) non-productive energy withdrawal of the energy-storage unit, to thereby achieve a series of productive interlaced amplitude electric pulses.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: May 1, 2018
    Assignee: Varex Imaging Corporation
    Inventors: Gongyin Chen, Robert Edward Drubka
  • Patent number: 9948177
    Abstract: A system for supplying a load comprising: an input inductor configured to receive an input voltage, a selection module connected to the inductor via a switching node, and a multi-level half-bridge stage comprising a plurality of half-bridge stages, each half-bridge stage comprising a pair of switches connected between a switching node; a power combining stage coupled to each half-bridge stage using parallel bus voltage lines output from the multi-level half-bridge stage, the power combining stage configured to output a voltage to the load; and a controller configured, based on the input voltage, to selectively control a half-bridge stage to operate in a half-bridge mode to provide a stepped-up voltage on a bus voltage line, wherein the controller is further configured to control the power combining stage to provide a voltage between the bus voltage lines and the sum of these voltages is higher than a peak of the input voltage.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: April 17, 2018
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Eduardo-Jose Alarcon-Cot, Julia Delos Ayllon, Toni Lopez, Reinhold Elferich, Harald Josef Gunther Radermacher, Machiel Antonius Martinus Hendrix
  • Patent number: 9923457
    Abstract: An intellectual property (IP) block portion in an integrated circuit includes a first regulator, a first circuit, a power converter, and a second circuit. The first regulator is configured to receive a supply voltage and to generate a first output voltage. The first circuit is coupled with the first regulator and configured to receive the first output voltage. The power converter includes a charge pump configured to receive the supply voltage and to generate a pumped voltage; and a second regulator configured to receive the supply voltage or the pumped voltage and to generate a second output voltage. The second output voltage has a voltage level greater than a voltage level of the first output voltage. The second circuit is coupled with the power converter and configured to receive the second output voltage.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: March 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Tien-Chun Yang
  • Patent number: 9906122
    Abstract: A capacitive voltage converter providing multiple gain modes comprising a switched capacitor array having a voltage input and a voltage output. A skip gating control coupled to the switched capacitor array and configured to control a switch resistance value of the switched capacitor array, and to control a switching sequence of the switched capacitor array. An override control coupled to the skip gating control and the switched capacitor array, the override control configured to detect transitions in a gain mode and to modify the switch resistance value of the switched capacitor array and the switching sequence of the switched capacitor array for a finite amount of time following the gain mode transition.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: February 27, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Lorenzo Crespi, Lakshmi Murukutla
  • Patent number: 9906127
    Abstract: Various circuits, apparatuses and methods are disclosed for generating a DC voltage conversion. In an example embodiment, an apparatus includes a DC voltage multiplier having a first capacitor. In a first mode, the first capacitor is charged to store a first voltage between first and second terminals of the capacitor. In a second mode, the DC voltage multiplier shifts a voltage of the second terminal up to a second voltage, thereby shifting the first terminal to a third voltage. The apparatus also includes a fractional output control circuit that when enabled, connects a second capacitor between the first terminal of the first capacitor and the ground reference voltage. The connecting of the second capacitor causes the first terminal of the first capacitor to be pulled down to a voltage between the first and third voltages when the second terminal is shifted up to the second voltage.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 27, 2018
    Assignee: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Patent number: 9843313
    Abstract: The present invention provides a high voltage pulse modulating power source based on alternate group triggering, which comprises: a DC stabilized voltage source for supplying power to the high voltage pulse modulating power source; a plurality of solid-state switches; a plurality of triggers corresponding to said plurality of solid-state switches, wherein each trigger provides a trigger signal to its corresponding solid-state switch to turn on said corresponding solid-state switch, wherein said plurality of triggers are divided into at least two groups of triggers; a time sequence control module, which, at time t1, controls said plurality of triggers to generate trigger signals so as to turn on said plurality of solid-state switches simultaneously, and at time t2, controls one group of said at least two groups of triggers to generate trigger signals to turn on solid-state switches corresponding to this group of triggers, wherein time t1 and time t2 appear alternately.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 12, 2017
    Assignees: Nuctech Company Limited, Tsinghua University
    Inventors: Yaohong Liu, Chuanxiang Tang, Xinshui Yan, Wei Jia, Jianjun Gao, Jinsheng Liu, Wei Yin, Xiying Liu, Hao Shi
  • Patent number: 9837891
    Abstract: A power circuit includes a first charge pump for converting a supply voltage into a first high voltage and a first low voltage, at least one second charge pump, each for increasing the first high voltage by a first variance value to a second high voltage, and at least one third charge pump, each for decreasing the first low voltage by a second variance value to a second low voltage. A difference between the first high and low voltages is less than a breakdown threshold. The second and third variance margins are less than the breakdown threshold.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: December 5, 2017
    Assignee: Sitronix Technology Corp.
    Inventor: Min-Nan Liao