Including Semiconductor Means Patents (Class 363/60)
  • Patent number: 11368107
    Abstract: A multi-level switched capacitor boost inverter includes a series connection of a two-switched capacitor circuit, a source module and at least one one-switched capacitor circuit. Level-shifted pulse width modulation is used to apply gate pulses to the switches. The multi-level switched capacitor boost inverter uses only three capacitors and a single DC voltage source to generate thirteen voltage levels at load terminals with a voltage gain of three. The capacitors of the two-switched capacitor circuit are self-balancing. Additional one-switched capacitor circuits can be added in series with the inverter. Each additional one-switched capacitor circuit increases the number of levels and increases the gain by one.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: June 21, 2022
    Assignee: King Abdulaziz University
    Inventors: Hussain Bassi, Muhyaddin Rawa, Saad Mekhilef, Marif Daula Siddique, Noraisyah Binti Mohamed Shah
  • Patent number: 11336176
    Abstract: An internal voltage generation circuit may include an oscillation circuit, a signal generation circuit, and a pumping circuit. The oscillation circuit may generate an oscillation signal. The signal generation circuit may generate first and second pumping driving signals on the basis of the oscillation signal. The pumping circuit may generate a pumping voltage through a pumping operation on the basis of the first and second pumping driving signals.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: May 17, 2022
    Assignee: SK hynix Inc.
    Inventor: Seok In Hong
  • Patent number: 11336175
    Abstract: Operating a charge pump in which switches from a first set of switches couple capacitor terminals to permit charge transfer between them and in which switches from a second set of switches couple capacitor terminals of capacitors to either a high-voltage or a low-voltage terminal includes cycling the switches through a sequence of states, each state defining a corresponding configuration of the switches. At least three of the states define different configurations of the switches. During each of the configurations, charge transfer is permitted between a pair of elements, one of which is a first capacitor and another of which is either a second capacitor or the first terminal.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: May 17, 2022
    Assignee: pSemi Corporation
    Inventors: Aichen Low, Gregory Szczeszynski, David Giuliano
  • Patent number: 11294438
    Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may: receive, by an information handling system that includes a first portion and a second portion, power from a first power supply; determine that the second portion, coupled to the first portion, requires a portion of the power from the first power supply; determine a first voltage value associated with the power from the first power supply; charge multiple capacitors of first circuitry at a first voltage associated with the first voltage value; discharge the multiple capacitors of the first circuitry to the second circuitry; charge multiple capacitors of second circuitry at a second voltage associated with a second voltage value; and discharge the multiple capacitors of the second circuitry to provide the portion of the power from the first power supply to one or more components of the second portion.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: April 5, 2022
    Assignee: Dell Products L.P.
    Inventors: Jace William Files, Gerald Rene Pelissier
  • Patent number: 11271475
    Abstract: Disclosed is an N:1 (where N is an integer such as 3 or higher) resonant star topology converter to generate an input supply (e.g., 1.8V) for a processor (e.g., a system-on-chip (SOC)) from a higher power supply source (e.g., 12.6V) such as a battery or other source. The resonant star topology based regulator can be realized by a combination of on-die and on-package components as opposed to voltage regulators on motherboard with discrete inductor and capacitors. In one example, capacitors of the N:1 resonant star topology are implemented as multilayer ceramic capacitors (MLCC). The architecture of the N:1 resonant star topology based regulator results in high bandwidth. For example, compared to traditional step-down voltage regulators, the N:1 resonant star topology based regulator exhibits ten times higher bandwidth.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Rinkle Jain, Jonathan Douglas, Shivadarshan Rajeurs
  • Patent number: 11258358
    Abstract: A charge pump circuit generates a charge pump output signal at a first node and is enabled by a control signal. A diode has an anode coupled to the first node and a cathode coupled to a second node. A current mirror arrangement sources a first current to the second node and sinks a second current from a third node. A comparator causes the control signal to direct the charge pump circuit to generate the charge pump output signal as having a voltage that ramps upwardly in magnitude (but negative in sign) if the voltage at the second node is greater than the voltage at the third node, and causes the control signal to direct the charge pump circuit to cease the ramping of the voltage of the charge pump output signal if the voltage at the second node is at least equal to the voltage at the third node.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: February 22, 2022
    Assignee: STMicroelectronics International N.V.
    Inventors: Vikas Rana, Shivam Kalla
  • Patent number: 11251705
    Abstract: A switched mode power supply includes a multilevel buck power converter and a control circuit. The power converter includes a first buck circuit and a second buck circuit each having a power switch, a rectifier, and an inductor. The power supply may further include a resonant power converter coupled to the multilevel buck power converter. In some examples, the control circuit is configured to generate control signals for the first buck circuit's power switch and the second buck circuit's power switch to control the power converter, and adjust a switching frequency of the control signals to control the amount of reverse current flowing in the first buck circuit and the second buck circuit to achieve zero voltage switching of the first buck circuit's power switch and the second buck circuit's power switch. Other example multilevel buck power converters and power supplies are also disclosed.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: February 15, 2022
    Assignee: Astec International Limited
    Inventors: James Sigamani, Jonathan Ross Bernardo Fauni
  • Patent number: 11251719
    Abstract: Switched capacitor multilevel inverter (SCMLI) configuration for high-frequency medium voltage applications is presented. A 5L-SCMLI basic configuration is further extended to 9L operation with a reduced number of active switches having self voltage boosting and balancing ability. Further, the proposed 9L-SCMLI is extended up to n level being considered as the basic configuration for the extension of horizontal extension (HE) and vertical extension (VE). A generalized switching table is provided for the proposed extensions. Design of the size of capacitor demonstrated for the proposed 9L-SCMLI.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: February 15, 2022
    Assignee: KING ABDULAZIZ UNIVERSITY
    Inventors: M. Jagabar Sathik, Kaustubh Bhatnagar, Yam P. Siwakoti, Hussain M. Bassi, Muhyaddin Rawa, N. Sandeep
  • Patent number: 11251710
    Abstract: A non-isolated multiport DC/DC converter topology is provided. The non-isolated multiport DC/DC converter topology is modular and can incorporate an unlimited number of independent input or output ports. The efficiency of the non-isolated multiport DC/DC converter topology is improved through partial power processing techniques without having isolation in the converter. The non-isolated multiport DC/DC converter topology also provides a balanced DC neutral point, making it an ideal candidate for bipolar DC grid or as the front-end of a multilevel DC/AC converter.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: February 15, 2022
    Inventors: Yunwei Li, Zhongyi Quan
  • Patent number: 11245324
    Abstract: A control circuit having: a logic circuit, configured to provide a high side boot-strap capacitor control signal set and a low side boot-strap capacitor control signal set; a high side boot-strap capacitor control circuit, configured to provide a high side power signal to control a high side power switch; a high side boot-strap capacitor, having a first terminal coupled to a control terminal of the high side power switch, and a second terminal coupled to the high side boot-strap capacitor control circuit; a low side boot-strap capacitor control circuit, configured to provide a low side power signal to control a low side power switch; and a low side boot-strap capacitor, having a first terminal coupled to a control terminal of the low side power switch, and a second terminal coupled to the low side boot-strap capacitor control circuit.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: February 8, 2022
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventor: Naixing Kuang
  • Patent number: 11239836
    Abstract: A circuit and a method for providing a switchable current linkage between a first terminal and a second terminal is presented. The circuit has a transistor switch and a charge pump circuit. An output node of the charge pump circuit is coupled to a control terminal of the transistor device, and an input node of the charge pump circuit is coupled to a predetermined voltage. The charge pump generates a boosted voltage. A drive circuit provides feedback control for the current flowing through the transistor. The drive circuit also controls the voltage magnitude at the input node of the charge pump circuit in accordance with the feedback control or to control a magnitude of a voltage at the control terminal of the transistor device in accordance with the feedback control.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: February 1, 2022
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Jerome Sanchez, Fabio Rigoni, Jan Grabinski, Ali Zahabi
  • Patent number: 11190182
    Abstract: Disclosed herein are non-limiting examples of charge pumps that reduce the introduction of noise into a circuit in which they are implemented and/or lower the output impedance when providing certain voltages (e.g., negative voltage generators). The disclosed technologies utilize a plurality of smaller charge pumps (or charge pump units) working in parallel that operate on different clock phases rather than using a single charge pump with a relatively large flying capacitor or a plurality of charge pumps in series. This can, for example, reduce spurious signals or spurs that arise due at least in part to the characteristics of the clock signal. The disclosed technologies may be particularly advantageous for SOI-based components and circuits.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: November 30, 2021
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Florinel G. Balteanu, Paul T. DiCarlo
  • Patent number: 11190098
    Abstract: The present application discloses a voltage booster circuit and a related circuit, chip and wearable device. The voltage booster circuit has an output terminal, which provides an output voltage and a load current. The voltage booster circuit includes: a first charge pump, which provides a first bias current; a second charge pump, which provides the load current; an output voltage fixing circuit, which draws the first bias current from the first charge pump to the output terminal, wherein the output voltage fixing circuit fixes a first charge pump voltage of the first charge pump by fixing the first bias current and further fixes the output voltage based on the fixed first charge pump voltage; and a load current generation circuit, which draws the load current from the second charge pump to the output terminal based on a second charge pump voltage of the second charge pump.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 30, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Wen-Chi Wang
  • Patent number: 11177735
    Abstract: During its first and second residence times, corresponding first and second currents flow between a charge pump and a circuit that connects to one of the charge pump's terminals. Based on a feedback measurement from the charge pump, a controller adjusts these first and second currents.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: November 16, 2021
    Assignee: pSemi Corporation
    Inventors: Tim Wen Hui Yu, Gregory Szczeszynski
  • Patent number: 11169182
    Abstract: A voltage divider circuit arrangement includes a resistive divider circuit portion constructed from first and second resistors (R1, R2) The first and second resistors are connected in series and are arranged to provide a refresh voltage (Vrefresh) at a refresh node between them. A capacitive divider circuit portion is constructed from first and second capacitors (C1, C2). The first and second capacitors are connected in series and are arranged to provide an output voltage (Vout) at an output node. A switching circuit portion is arranged intermittently to switch the voltage divider circuit arrangement between a first mode wherein the resistive divider is enabled and the output node is connected to the refresh node, and a second mode wherein the resistive divider is disabled and the output node is not connected to the refresh node.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: November 9, 2021
    Assignee: Nordic Semiconductor ASA
    Inventors: Lukasz Farian, Ola Bruset, Werner Luzi
  • Patent number: 11133742
    Abstract: A current control circuit can include: a current detection circuit configured to obtain a current detection signal for characterizing an output current of a switched capacitor converter, where the switched capacitor converter includes a plurality of first switch groups coupled between an input terminal and a ground, and where each first switch group comprises two switches coupled in series; and a voltage regulation circuit configured to regulate the output current by adjusting an equivalent impedance of the switched capacitor converter in accordance with the current detection signal.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: September 28, 2021
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Wang Zhang, Chen Zhao
  • Patent number: 11095282
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed. An example apparatus includes a gate controller coupled between an input terminal and an intermediate node, the gate controller including a first transistor coupled between the input terminal and a first node; a second transistor coupled between the first node and the intermediate node; a third transistor coupled between the input terminal and the intermediate node; and a charge pump coupled to the intermediate node; a switching network coupled between the intermediate node and an output terminal, the switching network including a high-side drive (HSD) transistor having a HSD gate terminal coupled to the intermediate node, the HSD transistor coupled between an input voltage and a switch node.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: August 17, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Pavol Balaz
  • Patent number: 11074983
    Abstract: What is provided is a voltage-generating circuit that uses dynamic reference voltage to accurately control the step-up of a generated voltage. A voltage-generating circuit 100 of the invention includes a charge pump 110 outputting voltage Vpump, a regulator 120, and a controlling circuit 140. The regulator 120 includes a comparator 122 and a comparator 132. The comparator 122 compares voltage Vdivide generated by the charge pump 110 with a reference voltage Vref, and outputs a comparison result CMP_OUT. The comparator 132 compares voltage Vdivide2 generated by the charge pump 110 with a reference voltage VrefRRC with a controlled rising speed, and outputs a comparison result CMP2_OUT. The controlling circuit 140 controls the charge pump 110 based on CMP_OUT and CMP2_OUT.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: July 27, 2021
    Assignee: WINBOND ELECTRONICS CORP.
    Inventor: Masafumi Nakatani
  • Patent number: 11019700
    Abstract: A light-emitting diode driving system including a load, a power supply circuit and a light-emitting diode driving device is provided. The load includes one or more light-emitting diode strings. The power supply circuit outputs an output voltage to drive the load according to a feedback signal. The light-emitting diode driving device includes at least one current source, at least one comparator and a control logic circuit. The current source outputs a current to drive the load. The comparator compares a first voltage from the current source to a reference voltage and outputs a second voltage according to a comparison result. The control logic circuit includes a control node. The control logic circuit receives the second voltage through the control node and converts the second voltage to a control signal to adjust a resistance value of a variable resistor circuit. A light-emitting diode driving device is also provided.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: May 25, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventor: Wei-Jen Lai
  • Patent number: 11005366
    Abstract: A power converter includes a switched-capacitor conversion circuit and an inductor buck circuit. The switched-capacitor conversion circuit receives an input voltage, and is operated, according to the first switching frequency, to convert the input voltage into an intermediate voltage. The inductor buck circuit and the switched-capacitor conversion circuit are connected in series. The inductor buck circuit receives the intermediate voltage, and generates an output voltage on a conversion output terminal thereof according to the intermediate voltage. The minimum value of the first switching frequency is determined by the intermediate voltage.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: May 11, 2021
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Po-Hsun Huang, Chung-Ming Hsieh
  • Patent number: 10972010
    Abstract: A control method used in a switched tank converter with a first conversion unit, a second conversion unit and a rectification unit, includes: based on current flowing through the resonant tanks in the first and second conversion units, determining when to turn on the high side switches of the first and second conversion units, and when to turn on the low side switches of the first and second conversion units; detecting whether current flowing through the first, second, third and fourth rectification switches crosses zero; and based on the detection result, respectively determining when to turn off the high side switch of the first conversion unit, when to turn off the high side switch of the second conversion unit, when to turn off the low side switch of the second conversion unit, and when to turn off the low side switch of the first conversion unit.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: April 6, 2021
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventor: Hao-Chien Cheng
  • Patent number: 10903758
    Abstract: A method comprises during a first half cycle, configuring a first switch to operate as an always-on switch, turning on a second switch prior to turning on a third switch and turning off the third switch prior to turning off the second switch, wherein the first switch and the second switch are connected in series and further in parallel with the third switch between a first terminal of a power source and a filter and during a second half cycle, configuring a fourth switch to operate as an always-on switch, turning on a fifth switch prior to turning on a sixth switch and turning off the sixth switch prior to turning off the fifth switch, wherein the fourth switch and the fifth switch are connected in series and further in parallel with the sixth switch between a second terminal of the power source and the filter.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: January 26, 2021
    Assignee: Futurewei Technologies, Inc.
    Inventors: Dianbo Fu, Zhaohui Wang, Lei Shi
  • Patent number: 10895856
    Abstract: A system, supplied by a power supply, is switched into standby mode by an electronic device that includes a charging input coupled to a charge voltage obtained from the voltage delivered by the power supply. A first input is coupled to the power supply and a power supply output is coupled to the system. A storage capacitive element is coupled to the charging input and configured to be charged by the charge voltage. A switching circuit, coupled between the first input and the power supply output, disconnects the power supply output from the first input when the voltage across the terminals of the storage capacitive element is higher than a threshold. A discharge circuit discharges the storage capacitive element so that the capacitor voltage becomes lower than the threshold. The switching circuit further re-connects the first input to the power supply output at the end of the discharge period.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: January 19, 2021
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Pascal Fornara
  • Patent number: 10862392
    Abstract: A charge pump circuit has a plurality of charge pump stages cascaded to one another between an input terminal and an output terminal to provide an output voltage having a boosted value with respect to the input voltage. A clock generator is configured to generate a clock signal provided to the charge pump stages to perform the boosting of the input voltage. An output-voltage regulation feedback closed-loop is coupled to the clock generator to perform a regulation of the output voltage based on a feedback voltage. A discharge control stage is configured to control a discharge of the charge pump circuit by generating a first discharge control signal configured to disable the output-voltage regulation feedback closed-loop or a second discharge control signal configured to reduce the frequency of the clock signal.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: December 8, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Fabio de Santis, Dario Livornesi
  • Patent number: 10845835
    Abstract: A voltage regulator device and a control method thereof are provided. The voltage regulator device includes a voltage regulator and a path switch. The voltage regulator includes an output node and a voltage divider circuit. The output node is used to generate a control voltage. The voltage divider circuit generates an overshoot reference voltage according to an input voltage. A first node of the path switch is coupled to the output node, a second node of the path switch is coupled to a reference voltage node, and a control node of the path switch receives the overshoot reference voltage. When the control voltage is greater than the sum of the overshoot reference voltage and a threshold voltage of the path switch, the path switch is turned on to direct a charge at the output node to the reference voltage node.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: November 24, 2020
    Assignee: Winbond Electronics Corp.
    Inventors: Jyun-Yu Lai, Hsing-Yu Liu
  • Patent number: 10840805
    Abstract: An integrated power supply and modulator system includes integrated power supply and modulator system includes three subsystems: a switched-capacitor voltage balancer stage; a magnetic regulation stage; and at least one output switching stage. In one embodiment, the integrated power supply and modulator system further includes startup circuitry, feedback/feedforward circuitry and control circuitry.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: November 17, 2020
    Inventors: David J. Perreault, Wei Li, Yevgeniy A. Tkachenko
  • Patent number: 10833585
    Abstract: Described herein is a technology for implementing a scalable SCIB regulator for high conversion step down application. Particularly, the SCIB is configured to include stacked input switch circuits with parallel-connected output switch circuits. The input switch circuits are stacked with or without DC shift switch circuits in between. Furthermore, the input voltage is stepped down to a biasing voltage by input switch circuits and then is regulated to one or more output voltages having one or more independent and predetermined values by output switch circuits. The input switch circuits, output switch circuits and DC shift switch circuits can be modified for scalable power capability and ease of control and manufacturing.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 10, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yichao Tang, Sombuddha Chakraborty
  • Patent number: 10826493
    Abstract: A gate driving circuit for providing a high driving voltage includes a first N-type high-voltage transistor and a second N-type high-voltage transistor connected in series between a driving voltage output node and a system low-voltage source. A voltage difference between a system high-voltage source and the system low-voltage source is greater than a withstand voltage of the first or second N-type high-voltage transistor. When the driving voltage output node is to output a system high voltage, the first N-type high-voltage transistor and the second N-type high-voltage transistor are turned off. Deep N-type well regions of the first N-type high-voltage transistor and the second N-type high-voltage transistor are applied with a first bias voltage. A voltage difference between the first bias voltage and the system low-voltage source is smaller than an interface breakdown voltage between the deep N-type well region and a P-type well region of the second N-type high-voltage transistor.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: November 3, 2020
    Assignee: ITE Tech. Inc.
    Inventors: Yi-Chung Chou, Chih-Yuan Kuo, Dong-Shan Chen
  • Patent number: 10819228
    Abstract: This disclosure describes techniques for controlling a power supply voltage for a high-side gate driver that is used in a power converter. In some examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may decouple a terminal of a charge pump capacitor from the input voltage lead, and couple the terminal of the capacitor to a reference voltage lead. In further examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may turn off both switching transistors.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 27, 2020
    Assignee: Texas Instruments Incorporated
    Inventor: Indumini W. Ranmuthu
  • Patent number: 10819230
    Abstract: Disclosed are a DC voltage conversion circuit, a DC voltage conversion method and a liquid crystal display device.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 27, 2020
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Wenfang Li, Dan Cao
  • Patent number: 10797660
    Abstract: Various buck-boost amplifier architectures are disclosed. In some architectures, a plurality of amplifiers use one or more inductors from a shared bank of inductors as needed to deliver variable amounts of power to respective loads. In some architectures, each amplifier includes multiple inductors and switches that are controlled to vary the number of inductors used in an amplifier based on a power requirement of the amplifier to drive its load. In some architectures, the switches include well switching devices. In some architectures, each amplifier drives multiple loads and is operated in a single inductor multiple output (SIMO) mode. In all architectures, the loads include speakers, piezo elements, and motors.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: October 6, 2020
    Assignee: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Cary Delano, Doug Heineman, Graeme Docherty, Feng Yu
  • Patent number: 10784764
    Abstract: A gate driver for a high-side NMOS power transistor in a DC/DC boost converter includes first and second switches coupled in series between an output pin and the gate of the high-side transistor. A third switch is coupled between the gate and a switch-node between the high-side and low-side transistors, the switch node also being coupled to an input pin. Fourth and fifth switches are coupled in series between the output pin and a clamp pin. Sixth and seventh switch are coupled in series between the output pin and a ground pin. First and second bootstrap capacitors have respective first terminals coupled to a first node between the first and second switches. The first capacitor has a second terminal coupled to a node between the fourth and fifth switches; the second capacitor has a second terminal coupled to a node between the sixth and seventh switches.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: September 22, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Eduardas Jodka, Julian Becker, Carsten Stoerk
  • Patent number: 10778091
    Abstract: An electronic device includes: a clock booster configured to generate a boosted intermediate voltage greater than a source voltage, wherein the clock booster includes: a controller capacitor configured to store energy for providing a gate signal, wherein the gate signal is for controlling charging operations to generate the boosted intermediate voltage based on the source voltage, and a booster capacitor configured to store energy according to the gate signal for providing the boosted intermediate voltage, wherein the booster capacitor has greater capacitance level than the controller capacitor; and a secondary booster operatively coupled to the clock booster, the secondary booster configured to generate an output voltage based on the boosted intermediate voltage, wherein the output voltage is greater than both the source voltage and the boosted intermediate voltage.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: September 15, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Michele Piccardi
  • Patent number: 10770118
    Abstract: A reverse bias voltage adjuster is provided. The reverse bias voltage adjuster includes an operating voltage generating circuit and a voltage adjusting circuit. The operating voltage generating circuit generates an operating voltage according to a burnin-test signal, a power start signal, and a reverse bias enable signal. In a normal operation mode, the operating voltage is a first voltage value, and in a burnin-test mode, the operating voltage is a second voltage value, wherein the second voltage value is less than the first voltage value. The voltage adjusting circuit is provided with a switch, and in an initial time interval in the burnin-test mode, the voltage adjusting circuit adjusts voltage value of the reverse bias by turning on the switch.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: September 8, 2020
    Assignee: Winbond Electronics Corp.
    Inventor: Yuji Nakaoka
  • Patent number: 10763746
    Abstract: A charge pump having only NMOS devices charges a plurality of capacitors to a parallel charged voltage level by electrically connecting the capacitors in parallel between an input voltage node and a ground by activating a plurality of first NMOS transistor switches and a plurality of second NMOS transistor switches and deactivating a plurality of third NMOS transistor switches. The charge pump then generates a series capacitor output voltage level at a capacitor series output node by electrically connecting and discharging the capacitors in series between the input voltage node and the capacitor series output node by activating the third NMOS transistor switches and deactivating the first NMOS transistor switches and the second NMOS transistor switches.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: September 1, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 10756643
    Abstract: A flipping-capacitor rectifier circuit that enhances an output power of a piezoelectric energy harvester (PEH). The flipping-capacitor rectifier circuit includes a flipping capacitor, a plurality of switches, and an active rectifier. The flipping capacitor is connected in parallel with the PEH and forms at least three reconfiguration phases by turning on one or more of the switches. The active rectifier connects with the flipping capacitor in parallel and rectifies an AC voltage of the PEH. The flipping capacitor flips a voltage across a capacitor of the PEH to enhance the output power of the PEH by extracting power from the capacitor of the PEH.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: August 25, 2020
    Assignee: UNIVERSITY OF MACAU
    Inventors: Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Rui Paulo da Silva Martins
  • Patent number: 10749218
    Abstract: Certain aspects of the present disclosure provide apparatus and techniques for charging a multi-stack battery pack. For example, certain aspects provide a circuit for charging a battery pack having multiple battery cells. The circuit generally includes a voltage regulator circuit and charge pump circuitry having an input coupled to an output of the voltage regulator circuit, and an output coupled to a first battery charging terminal. In certain aspects, the first battery charging terminal may be configured to be coupled to a terminal of a first battery cell of the multiple battery of the battery pack.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: August 18, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Steve Hawley, Giuseppe Pinto
  • Patent number: 10734894
    Abstract: A charge pump system including charge pump circuitry, a charge pump controller, and current limit circuitry. The charge pump circuitry has an input coupled to a supply input node and has an output for developing a drive voltage. The charge pump controller controls the charge pump circuitry to increase the drive voltage above a supply voltage provided to the supply input node. The current limit circuitry limits current through the charge pump circuitry to a limited current level that is less than a maximum current level during a current limit mode to reduce current spikes at the nodes of the charge pump system that may generate EMI. A current mirror may be used as the current limit circuitry to directly limit current through switches of the charge pump circuitry. The timing of the charge pump switches may also be modified such as inserting strategic delays to reduce the current spikes.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: August 4, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Chao Yang, Mohamed Elsayed
  • Patent number: 10718880
    Abstract: A downhole tool may include a voltage multiplier within a housing. The voltage multiplier may transform input power to the downhole tool from a first voltage to a second voltage higher than the first. The downhole tool may also include multiple shielding rings surrounding at least the voltage multiplier to reduce electric field stresses within the downhole tool. Additionally, the downhole tool may include an insulator located between the shielding rings and the housing.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: July 21, 2020
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Matthieu Simon, Jani Reijonen
  • Patent number: 10693367
    Abstract: In some examples, an electrical power system includes a differential bus including a high-side rail and a low-side rail, a power source configured to generate power, and a bulk capacitor coupled between the high-side rail and the low-side rail, the bulk capacitor configured to filter the power generated by the power source. The electrical power system also includes a converter configured to convert the power filtered by the bulk capacitor and a pre-charging circuit comprising one or more switches and a middle capacitor, the pre-charging circuit configured to pre-charge the bulk capacitor.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: June 23, 2020
    Assignees: Rolls-Royce North American Technologies, Inc., Rolls-Royce Singapore Pte. Ltd.
    Inventors: Pradip Chatterjee, Chandana Jayampathi Gajanayake, Eric D. Schneider, Devinda A. Molligoda, Amit Kumar Gupta
  • Patent number: 10693368
    Abstract: During its first and second residence times, corresponding first and second currents flow between a charge pump and a circuit that connects to one of the charge pump's terminals. Based on a feedback measurement from the charge pump, a controller adjusts these first and second currents.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: June 23, 2020
    Assignee: pSemi Corporation
    Inventors: Tim Wen Hui Yu, Gregory Szczeszynski
  • Patent number: 10693455
    Abstract: A thyristor or triac control circuit includes a first capacitive element that is series-connected with a first diode between a first terminal and a second terminal intended to be coupled to a gate of the thyristor or triac. A second capacitive element is coupled between the second terminal and a third terminal intended to be connected to a conduction terminal of the thyristor or triac on the gate side of the thyristor or triac. A second diode is coupled between the third terminal and a node of connection of the first capacitive element and first diode.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: June 23, 2020
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Ghafour Benabdelaziz, Cedric Reymond
  • Patent number: 10666245
    Abstract: A circuit and a method for providing a switchable current linkage between a first terminal and a second terminal is presented. The circuit has a transistor switch and a charge pump circuit An output node of the charge pump circuit is coupled to a control terminal of the transistor device, and an input node of the charge pump circuit is coupled to a predetermined voltage. The charge pump generates a boosted voltage. A drive circuit provides feedback control for the current flowing through the transistor. The drive circuit also controls the voltage magnitude at the input node of the charge pump circuit in accordance with the feedback control or to control a magnitude of a voltage at the control terminal of the transistor device in accordance with the feedback control.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: May 26, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Jerome Sanchez, Fabio Rigoni, Jan Grabinski, Ali Zahabi
  • Patent number: 10615686
    Abstract: An embodiment provides a technology of sharing electric charges of two or more flying capacitors in a time interval in which a plurality of flying capacitors are floated, so as to control the charging/discharging balance of the flying capacitors, in a step-up converter.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: April 7, 2020
    Assignee: SILICON WORKS CO., LTD.
    Inventor: Young Jin Woo
  • Patent number: 10608528
    Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: March 31, 2020
    Assignee: WISPRY, INC.
    Inventors: David Zimlich, Vincent Cheung
  • Patent number: 10541613
    Abstract: The power supply apparatus includes an inductor; a switching element connected to another end of the inductor, the switching element configured to drive the inductor by being turned on or turned off in accordance with an input pulse signal; a boost converter circuit connected to both ends of the inductor and including a plurality of rectification units, the boost converter circuit configured to amplify a voltage generated in the inductor, each of the plurality of rectification units including a diode and a capacitor; and a voltage boosting element configured to supply a voltage obtained by boosting an input voltage to the inductor.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: January 21, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Jun Hirabayashi
  • Patent number: 10498230
    Abstract: A voltage control device includes a charge pump, a driving circuit, and a control circuit. The charge pump provides a first voltage. The driving circuit is coupled to the charge pump, and receives the first voltage and a reference voltage. The driving circuit outputs a driving signal according to an input signal, the first voltage and the reference voltage. The control circuit is coupled to the charge pump and the driving circuit. Before the first voltage reaches a threshold level, the control circuit adjusts the reference voltage to increase the voltage gap between the first voltage and the reference voltage.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: December 3, 2019
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Tien-Yun Peng
  • Patent number: 10491111
    Abstract: Circuits and methods are provided for soft-starting a switched-capacitor converter (SCC), so as to limit inrush current at the start-up of the SCC. This is accomplished by using the first power switch of the SCC, i.e., the switch coupled to the input of the SCC, to reduce the voltage provided at the SCC input, such that the full input voltage is not directly applied to the SCC circuitry downstream from the first power switch during the SCC start-up. The reduced voltage provided to the SCC circuitry (other than the first power switch) serves to limit the current drawn by the remainder of the SCC circuit during the SCC start-up. This reduced voltage begins at zero and ramps to the voltage provided at the SCC input. Once the reduced voltage reaches the input voltage level, steady-state operation of the SCC may begin.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Otto Wiedenbauer, Christian Rainer
  • Patent number: 10447151
    Abstract: Circuits, devices, and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 15, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Bo Zhou, Guillaume Alexandre Blin
  • Patent number: 10367412
    Abstract: To provide a power factor correction circuit capable of maintaining loop gain properly while maintaining current sensing accuracy even when different AC input voltages are input and a switching power source device using the power factor correction circuit. A power factor correction circuit includes: a power factor correction control circuit including an input voltage detection terminal to which voltage corresponding to input voltage to a boost chopper is input, a current sensing terminal to which voltage corresponding to inductor current in the boost chopper is input, an output voltage detection terminal to which voltage corresponding to output voltage from the boost chopper is input, and an output terminal outputting a drive signal for a switching element; and a voltage adjustment circuit configured to detect the input voltage and adjust voltage at the current sensing terminal and voltage at the input voltage detection terminal according to the detected input voltage.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: July 30, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masatoshi Sugimoto