Including Semiconductor Means Patents (Class 363/60)
  • Patent number: 8624663
    Abstract: In one general aspect, an apparatus can include a complementary switch circuit including a first portion and a second portion, and a first driver circuit coupled to the first portion of the complementary switch circuit. The apparatus can include a positive charge pump device coupled to the first driver, and a second driver circuit coupled to the second portion of the complementary switch circuit. The apparatus can also include a negative charge pump device coupled to the second driver circuit.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: January 7, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Nickole Gagne, Kenneth P Snowdon
  • Patent number: 8618868
    Abstract: Disclosed is a charge pump having first and second outputs and at least one capacitor. A plurality of switches are coupled to the at least one capacitor for selectively coupling the at least one capacitor between a high voltage node and a low voltage node, and for selectively coupling the at least one capacitor to the first output and the second output. A switch controller is adapted to generate control signals for the plurality of switches to selectively couple the at least one capacitor between the high voltage node and the low voltage node during charging, and to selectively couple the at least one capacitor to the first output and the second output during discharging that output a first voltage pulse from the first output and a second voltage pulse from the second output such that the first voltage pulse and the second voltage pulse are asymmetrical and coincidental.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: December 31, 2013
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Joseph Hubert Colles
  • Patent number: 8619444
    Abstract: A voltage booster system of a charge pump type includes a regulator for outputting a constant voltage and a charge pump circuit for boosting a voltage of an output terminal of the regulator. The regulator includes a differential amplifier unit for inputting a reference voltage and a feedback voltage according to the voltage of the output terminal, and an output stage portion including an PN connection element having one end portion connected to an application terminal of a power source voltage and another end portion connected to the output terminal. The PN connection element is configured to be controlled according to an output signal of the differential amplifier unit. The charge pump circuit includes a first capacitor to which the voltage of the output terminal is applied to be charged; a second capacitor; a third capacitor; a first switching section; and a second switching section.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: December 31, 2013
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Suguru Kawasoe
  • Patent number: 8598946
    Abstract: A method of operating a programmable charge pump includes configuring each of a plurality of cascaded charge pump stages to be in a first set of charge pump stages or in a second set of charge pump stages based on an indicator of a target output voltage level. The first set of charge pump stages is configured to level-shift a first voltage level to a second voltage level. Each charge pump stage of the second set of charge pump stages has a disabled pump circuit portion. The second set of charge pump stages is configured to pass a version of the second voltage level to an output node of the programmable charge pump.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: December 3, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Brian G. Drost, Aaron J. Caffee
  • Patent number: 8593840
    Abstract: One object is to provide a boosting circuit whose boosting efficiency is enhanced. Another object is to provide an RFID tag including a boosting circuit whose boosting efficiency is enhanced. A node corresponding to an output terminal of a unit boosting circuit or a gate electrode of a transistor connected to the node is boosted by bootstrap operation, so that a decrease in potential which corresponds to substantially the same as the threshold potential of the transistor can be prevented and a decrease in output potential of the unit boosting circuit can be prevented.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: November 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Junpei Sugao
  • Patent number: 8582332
    Abstract: An apparatus includes a first switch coupled to a first voltage reference and a second switch coupled to a second voltage reference. A third switch is coupled to a first terminal of a first capacitor and a first terminal of a second capacitor. A fourth switch is coupled to a second terminal of the first capacitor and the first terminal of the second capacitor. A fifth switch is coupled to the second terminal of the first capacitor and a first terminal of a third capacitor. A sixth switch is coupled to the first terminal of the first capacitor and the first terminal of the third capacitor. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are controlled to maintain a first voltage level at a first output and a second voltage level at a second output.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: November 12, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Ashutosh Verma, Shafiq M. Jamal, Thomas B. Cho, Sehat Sutardja
  • Patent number: 8582333
    Abstract: Switched capacitor networks for power delivery to packaged integrated circuits. In certain embodiments, the switched capacitor network is employed in place of at least one stage of a cascaded buck converter for power delivery. In accordance with particular embodiments of the present invention, a two-stage power delivery network comprising both switched capacitor stage and a buck regulator stage deliver power to a microprocessor or other packaged integrated circuit (IC). In further embodiments, a switched capacitor stage is implemented with a series switch module comprising low voltage MOS transistors that is then integrated onto a package of at least one IC to be powered. In certain embodiments, a switched capacitor stage is implemented with capacitors formed on a motherboard, embedded into an IC package or integrated into a series switch module.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: November 12, 2013
    Assignee: Intel Corporation
    Inventors: Bradley S. Oraw, Telesphor Kamgaing
  • Publication number: 20130294123
    Abstract: A charge pump includes a timing signal generator for generating complementary first and second timing signals, and a voltage booster including a plurality of voltage boosting circuits. Each of the voltage boosting circuits includes input and output terminals, first and second capacitors each having first and second ends, and a switch module. The switch module is controllable to make or break electrical connection between the second end of the first capacitor and each of the input and output terminals and between the second end of the second capacitor and each of the input and output terminals. The first end of each of the first and second capacitors of a first one of the voltage boosting circuits receives a respective one of the first and second timing signals.
    Type: Application
    Filed: October 31, 2012
    Publication date: November 7, 2013
    Inventors: Chen-Jung Chuang, Wei-Chih Chen
  • Publication number: 20130279221
    Abstract: A power supply to convert AC power to DC power with a relatively constant voltage and linear current delivery. The DC power may be positive and/or negative voltage. A fluctuating voltage from an AC voltage source (e.g., a transformer) is utilized to charge and substantially discharge a storage device on a cycle by cycle basis. Both the output of the storage device and the output of the transformer is combined to provide relatively constant voltage to a load. Unlike a typical power supply, (a) the discharge of the storage device forces power into a load, (b) total capacitance may be substantially less than the capacitance of a typical power supply, (c) a shunt capacitor is not required, and (d) the transformer may be continuously utilized throughout the entire cycle (rather than for only a brief portion of each cycle), reducing noise.
    Type: Application
    Filed: April 1, 2013
    Publication date: October 24, 2013
    Inventor: Robert H. BACKERT
  • Patent number: 8564985
    Abstract: A voltage converter comprises at least two capacitive charge pump stages, each comprising a capacitor, a charging switch through which a capacitor charging current is adapted to flow, and a control circuit for controlling the charging switch. wherein the control circuit for at least one charge pump stage comprises current limiting means for limiting the current through the charging switch. By limiting the current flowing through the switch, current spikes are avoided, which reduces high frequency distortion.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventor: Bram van Straaten
  • Patent number: 8547070
    Abstract: A method for manufacturing and operating a semiconductor device is disclosed. The semiconductor device includes a first capacitor node, a second capacitor node, a first capacitor electrode, a second capacitor electrode, a first switch and a second switch. The first switch is coupled between the first capacitor electrode and the first and second capacitor nodes such that the first switch has a first position that couples the first capacitor electrode to the first capacitor node and a second position that couples the first capacitor electrode to the second capacitor node. The second switch is coupled between the second capacitor electrode and the first and second capacitor nodes such that the second switch has a first position that couples the second capacitor electrode to the first capacitor node and a second position that couples the second capacitor electrode to the second capacitor node.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 1, 2013
    Assignee: Infineon Technologies AG
    Inventors: Karl-Heinz Allers, Reiner Schwab
  • Patent number: 8542169
    Abstract: A DC/DC converter of a liquid crystal display includes a charge pump having a thin film transistor, a capacitor and a diode. The thin film transistor is formed on an insulating substrate. A first main electrode of the thin film transistor is connected to an output terminal and a control electrode of the thin film transistor receives a control signal. The thin film transistor includes a non-monocrystal semiconductor. The capacitor has a first electrode connected to a second main electrode of the thin film transistor and a second electrode receiving a variable voltage. The diode is electrically connected between the second main electrode of the thin film transistor, the first electrode of the capacitor, and a power terminal in series. The diode includes a mono-crystal semiconductor.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: September 24, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Michiru Senda
  • Publication number: 20130229841
    Abstract: An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.
    Type: Application
    Filed: February 20, 2013
    Publication date: September 5, 2013
    Applicant: ARCTIC SAND TECHNOLOGIES, INC.
    Inventor: David M. Giuliano
  • Patent number: 8514025
    Abstract: An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: August 20, 2013
    Assignee: Wolfson Microelectronics plc
    Inventor: John Paul Lesso
  • Patent number: 8508288
    Abstract: A method of generating a voltage supply (Vout+, Vout?) from a single input supply (+VDD), comprising connecting at least one flying capacitor (Cf) to at least one reservoir capacitor (CR1, CR2) and to the input supply in repeated cycles so as to generate a voltage on said reservoir capacitor, the cycles differing between at least two modes so that each mode generates a different voltage on said reservoir capacitor the method including changing from an existing one of said modes to enter a new one of said modes during operation, and operating in at least one transitional mode for a period prior to entering fully said new mode.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: August 13, 2013
    Assignee: Wolfson Microelectronics plc
    Inventor: Douglas James Wallace MacFarlane
  • Patent number: 8508287
    Abstract: Some embodiments of the present disclosure relate to regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: August 13, 2013
    Assignee: Infineon Technologies AG
    Inventors: Thomas Kern, Ulrich Loibl
  • Patent number: 8503203
    Abstract: An apparatus for voltage conversion includes a switched capacitor circuit, a pre-charge circuit, a voltage divider stage, and a driver stage. The switched capacitor circuit has pump capacitors to transfer energy and a steady-state operating mode and a pre-charge mode. The pre-charge circuit initially charges the pump capacitors when the switched capacitor circuit operates in the pre-charge mode. It includes a voltage divider stage having one or more nodes, each of which provides voltage at one of a corresponding one or more voltage levels, and a driver stage having one or more cascoded drivers, each of which comprises a first terminal for receiving a drive signal that depends at least in part on a voltage level at a corresponding one of the nodes, and a second terminal for coupling to a pump capacitor and to another of the drivers.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: August 6, 2013
    Assignee: Arctic Sand Technologies, Inc.
    Inventors: Gregory Szczeszynski, David Guiliano, Raymond Barrett, Jr.
  • Patent number: 8482552
    Abstract: A method is described comprising conducting a first current through a switching transistor. The method also comprises conducting a second current through a pair of transistors whose conductive channels are coupled in series with respect to each other and are together coupled in parallel across the switching transistor's conductive channel. The second current is less than and proportional to the first current.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: July 9, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Gerhard Schrom, Peter Hazucha, Vivek De, Tanay Karnik
  • Patent number: 8476963
    Abstract: An exponential multistage charge pump is provided wherein node voltages in a pumpcell in one stage of the charge pump are used to control operation of clock drivers in a subsequent stage of the charge pump.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: July 2, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Thomas D. Cook, Jeffrey C. Cunningham, Karthik Ramanan
  • Patent number: 8476962
    Abstract: A system includes a first circuit, a first charge pump, a second circuit, and a second charge pump. The first circuit has a first power supply terminal coupled to a positive power supply terminal and a second power supply terminal. The first charge pump has an input coupled to positive power supply terminal and an output coupled to the second power supply terminal of the first circuit. The second circuit has a first power supply terminal coupled the second power supply terminal of the first circuit and a second power supply terminal. The second charge pump has an input coupled to the first power supply terminal of the second circuit and an output coupled to the second power supply terminal of the second circuit.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: July 2, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Perry H. Pelley
  • Patent number: 8472218
    Abstract: The charge-pump apparatus is disclosed having a substantially fixed current source for outputting a first current of a first polarity; a variable current source for outputting a second current of a second polarity opposite to the first polarity; a first current steering network for steering the first current into either an output node or a termination node in accordance with a first control signal; a second current steering network for steering the second current into either the output node or the termination node in accordance with a second control signal; a voltage follower for receiving a first voltage associated with the output node and outputting a second voltage at an internal node; a current sensor inserted between the termination node and the internal node for sensing a current flowing between the termination node and the internal node; and a feedback network for adjusting the variable current source in accordance with an output of the current sensor.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: June 25, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8471537
    Abstract: A high-voltage regulator includes a charge pump for generating a high voltage, a voltage regulator for generating a regulated voltage, and an oscillator having an oscillation frequency. The voltage regulator includes an operational amplifier having the high voltage as power supply, a first input, a second input coupled to a voltage reference, and an output. The voltage regulator further includes a first transistor having gate coupled to the output of the operational amplifier, a first terminal coupled to the high voltage and a second terminal coupled to a first voltage divider. The first voltage divider generates a first divided voltage that is coupled to the first input of the operational amplifier. The voltage regulator also includes a second voltage divider for providing a second divided voltage, wherein the second divided voltage controls the oscillator frequency.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: June 25, 2013
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Young Dong Joo
  • Patent number: 8467204
    Abstract: A high voltage power supply is provided. The high voltage power supply includes an inverter which converts a DC voltage input to the high voltage power supply into a first AC voltage, a transformer including an input winding unit and a plurality of output winding units, wherein the input winding unit receives the first AC voltage from the inverter and the plurality of output winding units generates and outputs a second AC voltage, and a voltage multiplier unit which boosts the second AC voltage output by the transformer and outputs a boosted voltage, and the voltage multiplier unit includes a plurality of voltage multipliers which are connected to each other in series and the plurality of voltage multipliers may be connected to the plurality of output winding units respectively.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: June 18, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pankaj Agarwal, Kang-hyun Yi, Sung-jin Choi, Joon-hyun Yang
  • Patent number: 8466670
    Abstract: A power supply for a gated load includes a power current source controlled by a current magnitude signal. A capacitor integrates the power current to produce load voltage. The power current is sampled, and compared with a reference voltage appearing across a reference capacitor, to produce the current magnitude signal. The reference voltage is controlled by a window comparator which charges the reference capacitor when the load voltage exceeds an upper threshold, and discharges the reference capacitor when the load voltage is less than a lower threshold. The window comparator is enabled by the load gating signal.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: June 18, 2013
    Assignee: Lockheed Martin Corporation
    Inventor: Viorel M. Pacala
  • Patent number: 8461911
    Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a driver, a switch section, and a power supply controller. The voltage generator is configured to generate a first potential and a negative second potential. The first potential is higher than a power supply voltage supplied to a power supply terminal. The driver is connected to an output of the voltage generator and is configured to output the first potential in response to input of high level and to output the second potential in response to input of low level. The switch section is configured to switch connection between terminals in response to an output of the driver. The power supply controller is configured to control the output of the voltage generator.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiki Seshita
  • Patent number: 8462525
    Abstract: A power supply provides dc power over a wide range of output voltages at full operating power by utilizing multiplying circuits (200) supplied by a source of high-frequency alternating current (90). The multiplier circuits include a plurality of multiplier cells containing at least two diodes (207, 209) and a driving capacitor (208). The multiplier cells are shunted by bypass rectifiers (205, 206) arranged such that currents are allowed to flow from multiplier input terminals to power supply output terminals. The bypass rectifiers do not conduct current for low output current levels, but conduct increasing levels of current when output currents increase beyond a conduction threshold value, thereby increasing the maximum available output current. Interactions among the diodes and capacitors in the multiplier circuits cause the amplitudes of the multiplier input currents to remain relatively constant as the output voltage is varied while operating at full power.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: June 11, 2013
    Assignee: Colorado Power Electronics, Inc.
    Inventors: Geoffrey N. Drummond, Bryce L. Hesterman
  • Patent number: 8461910
    Abstract: A charge-pump circuit includes at least one flying capacitor stage having a capacitor with a first terminal selectively coupled between a negative voltage input through a first electronic switch and a negative voltage output through a second electronic switch. A second terminal of the capacitor is selectively coupled between a fixed voltage node through a third electronic switch and an error signal input through a fourth electronic switch. A positive voltage source is coupled to the negative voltage output through a feedback network. A feedback amplifier having an error signal output, a reference voltage input, and a feedback input is coupled to the feedback network. A switch controller having a first clock output drives the first electronic switch and the third electronic switch, while a second clock output drives the second electronic switch and the fourth electronic switch.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: June 11, 2013
    Assignee: RF Micro Devices, Inc.
    Inventor: Praveen Varma Nadimpalli
  • Patent number: 8456225
    Abstract: Generally, this disclosure provides negative charge pump circuitry that is configured to supply a voltage that is less than a reference voltage (such as ground). The charge pump circuitry includes blocking circuitry that reduces or eliminates charge leakage so that a negative voltage may be developed at the output. The charge pump circuitry generally includes complimentary pairs of MOS switches that switch in a complimentary fashion according to charge developed on complimentary capacitors to provide a negative voltage power supply.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: June 4, 2013
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Kenneth P. Snowdon
  • Patent number: 8456874
    Abstract: A direct current (DC) to DC converter, including: input ports for receiving an input DC voltage; output ports for outputting an output DC voltage; a first matrix of capacitors and switches; a second matrix of capacitors and switches; and a control circuit, coupled to the switches of the first and second matrices, configure d to repetitively: (i) configure the first matrix to a charge configuration and couple the first matrix to the input ports while configuring the second matrix to a discharge configuration and coupling the second matrix to the output ports; (ii) maintain the charge and discharge configurations for a first period of time; (iii) configure the second matrix to the charge configuration and couple the second matrix to the input ports while configuring the first matrix to the discharge configuration and couple the first matrix to the output ports; and (iv) maintain the charge and discharge configurations for a second period of time; (a) wherein the charge configuration and the discharge configurat
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: June 4, 2013
    Assignee: Ramot at Tel Aviv University Ltd.
    Inventors: Sigmund Singer, Yuval Beck
  • Patent number: 8446211
    Abstract: An internal voltage generation circuit includes a first detection unit, a second detection unit, a control unit, and a voltage pumping unit. The first detection unit compares an internal voltage with a first reference voltage to generate a first detection signal when the first detection unit is activated in response to a first enable signal. The second detection unit compares the internal voltage with a second reference voltage to generate a second detection signal. The control unit generates the first enable signal and a second enable signal in response to the first detection signal and the second detection signal. The voltage pumping unit generates the internal voltage in response to the second enable signal.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: May 21, 2013
    Assignee: SK Hynix Inc.
    Inventor: Sang Don Lee
  • Patent number: 8441307
    Abstract: A charge pump circuit comprises a plurality of subcircuits, where the subcircuits are connected to each other in a single or a dual array having a repeating pattern. Each of the subcircuits comprises one or more of the following: an X-channel device having an X-gate terminal, an X-source terminal and an X-drain terminal, a Y-channel device having a Y-gate terminal, a Y-source terminal and a Y-drain terminal, and a capacitor; wherein a first end of the capacitor, the X-drain terminal, and the Y-drain terminal are connected with each other to form the common drain terminal; and wherein a second end of the capacitor is the clock terminal.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: May 14, 2013
    Assignee: Aptus Power Semiconductor
    Inventor: Brian Harold Floyd
  • Patent number: 8432116
    Abstract: In a torque motor driving device for wire cut electrical discharge machines, a voltage waveform rectified by a full-wave rectifying circuit, not using a high-capacitance electrolytic capacitor, is applied as an AC voltage to a single-phase torque motor by a bridge circuit including semiconductor switches. A PWM signal whose duty is adjusted so that the current flowing through the torque motor matches an instructed value is generated and the generated PWM signal is used for the operation of the bridge circuit.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: April 30, 2013
    Assignee: Fanuc Corporation
    Inventors: Tomoyuki Furuta, Akiyoshi Kawahara, Masao Murai
  • Patent number: 8427229
    Abstract: Integrated circuits such as memory arrays are coupled to a bi-directional charge pump that includes an input circuit and output circuit, and one or more pump stages coupled between the input circuit and the output circuit of the bi-directional charge pump. The output circuit includes a diode having an input and output and a transistor connected to the output of the diode and a ground potential. The input of the diode is electrically connected to the pump stages in a configuration that allows the charge pump to apply a positive or negative voltage to the memory array or other load.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: April 23, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yvonne Lin, Tien-Chun Yang
  • Publication number: 20130094256
    Abstract: The present solution relates operation of a power conversion device (200, 500). A first gate (205, 505) is operated (901) to provide a voltage pulse (309,609) travelling from an input (201,501) to a wave propagation medium (105) through the first gate (205,505). The voltage pulse has duration (307,607) less than the propagation time through the medium (105) to one end of the medium (105) and back to the input (201,501). The pulse generates a reflected wave. The first gate (205,505) is operated (902) periodically providing a voltage pulse in synchronization with the reflected wave to accumulate the reflected wave travelling in the medium (105), performing the accumulation through an accumulation interval (303,603). A second gate (207,507) is operated (903) periodically to provide a discharge pulse (312,612) in synchronization with the reflected wave to discharge the wave travelling in the medium (105), performing the discharge through a discharge interval (310,610).
    Type: Application
    Filed: June 11, 2010
    Publication date: April 18, 2013
    Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventor: Sverker Sander
  • Publication number: 20130083573
    Abstract: A regulator includes a current path unit coupled between an input terminal and a ground terminal and including a first current determination unit coupled between the input terminal and a control node and configured to supply the high voltage to the control node so that a first or second current path is selected depending on a voltage of the control node, and a second current determination unit coupled between the control node and the ground terminal and configured to control the voltage of the control node depending on an input voltage, a voltage supply unit configured to supply the high voltage to an output terminal depending on the voltage of the control node, a voltage division unit configured to create a division voltage, and an amplification unit configured to amplify a difference between the division voltage and a first reference voltage.
    Type: Application
    Filed: August 31, 2012
    Publication date: April 4, 2013
    Applicant: SK hynix Inc.
    Inventor: Je Il RYU
  • Patent number: 8411475
    Abstract: A power supply to convert AC power to DC power with a relatively constant voltage and linear current delivery. The DC power may be positive or negative voltage, or both may be produced. A fluctuating voltage from an AC voltage source (e.g., a transformer) is utilized to charge and substantially discharge a storage device on a cycle by cycle basis. The voltage of the storage device continuously supplements the fluctuating voltage to result in relatively constant voltage. Unlike a typical power supply, (a) the discharge of the storage device forces power into a load, (b) total capacitance may be substantially less than (e.g., 1% or less of) the capacitance of a typical power supply, (c) a shunt capacitor is not required, and (d) the transformer may be continuously utilized throughout the entire cycle (rather than for only a brief portion of each cycle), which may reduce noise.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: April 2, 2013
    Inventor: Robert H. Backert
  • Patent number: 8395914
    Abstract: The present invention relates to a configurable trench multi-capacitor device comprising a trench in a semiconductor substrate. The trench has a lateral extension exceeding 10 micrometer and a trench filling includes a number of at least four electrically conductive capacitor-electrode layers. A switching unit is provided that comprises a plurality of switching elements electrically interconnected between different capacitor-electrode layers of the trench filling. A control unit is connected with the switching unit and configured to generate and provide to the switching unit respective control signals for forming a respective one of a plurality of multi-capacitor configurations using the capacitor-electrode layers of the trench filling.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: March 12, 2013
    Assignee: NXP B.V.
    Inventors: Johan H. Klootwijk, Hendrik J. Bergveld, Freddy Roozeboom, Derk Reefman, Jaap Ruigrok
  • Patent number: 8395437
    Abstract: Provided is a charge pump circuit which is preferably used for reducing noise generated when electric charges are accumulated in a capacitor of the charge pump circuit. A load driving system 1 includes a charge pump circuit 2, a clock generation circuit 4, an amplifier circuit 6, and a load 8. The charge pump circuit 2 includes capacitors C1 and C2, a transistor PTr3 which is a P-channel MOS transistor and controls current supply to the C1, switching elements SW1 to SW3, and a supply current control circuit 20. The charge pump circuit 2 switches the SW1 to SW3, to thereby perform the accumulation of electric charges to the C1 and the transfer of the accumulated electric charges to the C2 for generating a negative power source. The supply current control circuit 20 includes a transistor PTr4, a switching element SW4, and a transistor NTr6 which forms a current mirror with a transistor NTr5 which constitutes an output stage of the amplifier circuit 6.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: March 12, 2013
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Takeshi Hamada
  • Publication number: 20130058141
    Abstract: Series switches for power delivery. A regulator operated as a current source is arranged in parallel with a switched capacitor divider. A switched capacitor divider is configured in series with a plurality of linear regulators with each regulating one of a plurality of voltage outputs from the switched capacitor divider. In another embodiment, a series switch bridge has a first pair of switches connected in series with a second pair of switches across a voltage input, each switch within a pair of switches is switched in-phase with the other while the first pair of switches is switched out of phase with the second pair of switches. A balancing capacitor is coupled across one switch in both the first and second pair to be in parallel when either of the pair of switches is closed to reduce a charge imbalance between the switches.
    Type: Application
    Filed: October 30, 2012
    Publication date: March 7, 2013
    Inventors: Bradley S. Oraw, Telesphor Kamgaing
  • Patent number: 8390502
    Abstract: Embodiments of the present disclosure may provide a charge redistribution DAC with an on-chip reservoir capacitor to provide charges to the DAC in lieu of traditional external reference voltages. The DAC may include the on-chip reservoir capacitor having a first plate and a second plate, an array of DAC capacitors to generate a DAC output, and an array of switches controlled by a DAC input word to couple the DAC capacitors to the reservoir capacitor. The charge redistribution DAC may further comprise a first switch connecting the first plate to an external terminal for a first external reference voltage, and a second switch connecting the second plate to an external terminal for a second external reference voltage. One embodiment may provide an ADC that includes the charge redistribution DAC.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Ronald Kapusta
  • Patent number: 8390365
    Abstract: A charge pump system for low-supply voltage includes: a clock generator to generate a plurality of clock signals; a clock pump circuit coupled to said clock generator to generate high voltage; a level shifter coupled to said clock generator and said clock pump circuit to generate a plurality of HV (high voltage) clock signals; a main pump circuit coupled to said clock generator and said level shifter to generate output voltage.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: March 5, 2013
    Assignee: National Tsing Hua University
    Inventors: Meng-Fan Chang, Shin-Jang Shen, Yi-Lun Lu
  • Patent number: 8384467
    Abstract: An apparatus includes a charge pump array including multiple charge pump cells. The charge pump array is configurable into a first arrangement of the charge pump cells coupled in series or a second arrangement of the charge pump cells coupled in parallel. The apparatus can include reconfiguration circuitry configured to select the first arrangement of the charge pump cells or the second arrangement of the charge pump cells. The charge pump array is configured to alter a voltage level of a signal based, at least in part, on the selected arrangement of the charge pump cells.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: February 26, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Daniel O'Keeffe, Kevin Gallagher, Denis Ellis, Hans W. Klein
  • Patent number: 8385093
    Abstract: A voltage converter is provided in which a first terminal (A) and a second terminal (B) are provided, each coupled to a switching means, the switching means is coupled to respective terminals for connecting a first capacitor (C1), a second capacitor (C2) and a third capacitor (C3), and the voltage converter is configured for being operated in first and second modes of operation each comprising at least three phases, and in which the three capacitors (C1, C2, C3) are inserted in series connection (S) between the first terminal (A) and a reference potential terminal (10) in one phase, and in each of the two other phases a first path and a second path (P1, P2) are provided in each case in parallel connection with at least one of the three capacitors (C1, C2, C3) related to the second terminal (B).
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: February 26, 2013
    Assignee: austriamicrosystems AG
    Inventors: Peter Trattler, Jan Enenkel
  • Patent number: 8378737
    Abstract: A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: February 19, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Dou Ker, Yi-Hsin Weng
  • Patent number: 8378736
    Abstract: A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: February 19, 2013
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Mark L. Burgener, Dylan J. Kelly, James S. Cable
  • Patent number: 8379422
    Abstract: A method for operating a circuit arrangement is provided. The method may include coupling a second connection of a control device to a connection that provides an alternating signal during operation of the circuit arrangement; in the control device: generating a trigger signal for the control electrode of the mode switch that is correlated with the sum signal from the signal at the connection for providing an alternating signal and the control signal; and providing the trigger signal at the output of the control device.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: February 19, 2013
    Assignee: OSRAM Gesellschaft mit beschraenkter Haftung
    Inventors: Arwed Storm, Siegfried Mayer
  • Patent number: 8374007
    Abstract: A power supply apparatus and a method for supplying power are provided. The apparatus, for use in a system having a first power signal, includes an assistance unit and a power supply device. The assistance unit outputs at least one maintaining signal according to the first power signal selectively. The power supply device outputs a second power signal, wherein the power supply device maintains the second power signal according to the at least one maintaining signal, for example, in an inactive state, such as an idle or standby state or other suitable timing.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: February 12, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih-Ting Hu, Chun-Hsiung Hung, Chuan-Ying Yu, Wu-Chin Peng, Kuen-Long Chang, Ken-Hui Chen
  • Patent number: 8369115
    Abstract: A time domain voltage step down capacitor based circuit has an oscillating circuit for generating a clock signal. The circuit also has a capacitor based charge pump circuit for receiving the clock signal and an input voltage signal having an input current and generates an output voltage signal, less than the input voltage signal and an output current greater than the input current. The circuit further comprises a comparator circuit for receiving the output voltage signal, as a first input signal thereto, and a reference voltage signal as a second input signal thereto and compares the first input signal to the second input signal and generates a control signal in response thereto. Finally the control signal is supplied to the oscillating circuit to control the generating of the clock signal.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: February 5, 2013
    Assignee: Greenliant LLC
    Inventors: Fredrik Buch, Michael S. Briner
  • Patent number: 8362756
    Abstract: A controller produces high-side and low-side control signals. The high and low-side signals are used to switch high-side and low-side transistors in the power stage to control the voltage across the power stage output capacitor of the power stage. A boost feedback charge pump receives the low or high-side signal to increase the charge on a charge pump output capacitor. The controller is configured to send Pulse Frequency Modulation (PFM) high and low-side signals that control the voltage on the power stage output capacitor and charge the charge pump output capacitor. The controller is also configured to send boost feedback (BFB) high and low-side signals that charge the boost feedback capacitor, but are designed to not significantly change the charge on the power stage output capacitor.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: January 29, 2013
    Assignee: Exar Corporation
    Inventors: Jason Weinstein, Zhenyu Zhao, Jingquan Chen
  • Patent number: 8358520
    Abstract: A charge-and-add DC-DC voltage converter design using a switch network that toggles between two states, either simultaneously charging a flying capacitor (one or any number) or creating a DC voltage on the output capacitor by connecting all flaying capacitors in series thus adding the input voltage to remaining voltages on flying capacitors after they were charged. A pulse generator delivers a train of pulses to toggle the switch network. Depending on the applications, the train of pulses can be continuous when a fixed unregulated voltage must be delivered, or a defined number of pulses when voltage (power) surge is to be produced. The charge-and-add converters should be capable of delivering a regulated output voltage, and in this case, pulse-width modulation (PWM) or pulse frequency modulation (PFM) can be used.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: January 22, 2013
    Inventor: Vladimir Shvartsman