Abstract: Shiftable memory employs ring registers to shift a contiguous subset of data words stored in the ring registers within the shiftable memory. A shiftable memory includes a memory having built-in word-level shifting capability. The memory includes a plurality of ring registers to store data words. A contiguous subset of data words is shiftable between sets of the ring registers of the plurality from a first location to a second location within the memory. The contiguous subset of data words has a size that is smaller than a total size of the memory. The memory shifts only data words stored inside the contiguous subset when the contiguous subset is shifted.

Abstract: A DLL (delay locked loop) circuit includes a first variable delay circuit, a pair of second variable delay circuits and a first synthesis circuit. The first variable delay circuit outputs signals of different delayed time values from each of first and second clock transitions. The pair of second variable delay circuits receive the signals from the first variable delay circuit, and the first synthesis circuit synthesizes output signals of the pair of second variable delay circuits to output the resulting synthesized signal. Each of the pair of second variable delay circuits includes a pair one-shot pulse generating circuits that generate one-shot pulses from the signals from the first variable delay circuit, a pair latch circuits, and a second synthesis circuit. The second synthesis circuit receives the set outputs of the latch circuits to output a signal which is a synthesis at a preset synthesis ratio.

Abstract: A data storage device for storing digital information in a readable form is described made up of one or more memory elements, each memory element comprising a planar magnetic conduit capable of sustaining and propagating a magnetic domain wall formed into a continuous propagation track. Each continuous track is provided with at least one and preferably a large number of inversion nodes whereat the magnetization direction of a domain wall propagating along the conduit under action of a suitable applied field, such as a rotating magnetic field, is changed.

Abstract: A DRAM and its application to a mobile telephony circuit with a control circuit including a first refreshment controller controlled by a first clock signal and a second refreshment controller controlled by a second clock signal having a frequency less than that of the first one and used to synchronize events of the GSM network.

Abstract: In a method for manufacturing an integrated memory circuit, a semiconductor substrate having a front side and a rear side is provided first. The semiconductor substrate is processed on the front side and on the rear side to produce memory cells on the front side and memory cells on the rear side of the semiconductor substrate. Finally, defective memory cells on one side of the semiconductor substrate are replaced by operational memory cells on the other side of the semiconductor substrate by connecting the operational memory cells of the one side of the semiconductor substrate to an input/output circuit of the memory circuit. By loading the semiconductor substrate on both sides, it is possible to either considerably reduce the rejection rate of memory chips or to strongly reduce the chip area of a memory chip or to increase the number of memory cells per specified chip area.

Abstract: Magnetic integrated circuit structures exhibit desirable characteristics for purposes of realizing a magnetic semiconductor memory. In combination with a carrier-deflection-type magnetic field sensor, each of a variety of magnet structures realize a condition in which the magnetic field is substantially orthogonal to the direction of travel of carriers of a sense current, thereby achieving maximum sensitivity. In general, the magnetic structures are highly efficient and achieve a high degree of control of the magnetic field. As a result, a minimum-size device such as a MOS device suffices for purposes of sourcing a magnetizing current. By basing a magnetic memory cell on a single minimum-size MOS device, a small cell may be realized that compares favorably with a conventional DRAM or FLASH memory cell. The greater degree of control over the magnetic field afforded by the magnetic structures enables cross-coupling between cells in a memory array to be minimized.

Abstract: In one embodiment, the magneto-optical recording medium of the present invention has a recording layer structure including at least a readout magnetic film, a control magnetic film, and a recording magnetic film. The readout magnetic film is a perpendicular magneto-anisotropy film at a temperature in a predetermined range. The control magnetic film provided between the readout magnetic film and the recording magnetic film has a prescribed structure so as to assume a perpendicular magneto-anisotropy film at a temperature in a predetermined range and an in-plane magneto-anisotropy film at a temperature in a range other than the predetermined range.

Abstract: A nonvolatile random access memory is disclosed having a substrate (50) carrying separate magnetically polarizable domains (19) each surrounded by a full write loop member (18) and arranged to penetrate the Hall channel (36) of a dual drain FET (16) with its residual magnetic field. The domains are organized in word rows and bit columns, are each written to by a single full write current through the surrounding loop member and each read by a comparator connected to the FET drains (42, 42'). The memory can be fabricated in a variety of forms (e.g. a planar card).

Abstract: A close-packed magnetic bubble propagation device includes a pattern having a plurality of propagation elements positioned in at least four adjacent rows. These elements are spaced to provide a period or spacing of bubbles in these rows of less than three bubble diameters. Upon application of a rotating in-plane field to the elements, bubbles in adjacent rows move in opposite directions. A preferred embodiment of this propagation device has at least two storage loops which contain at least four adjacent horizontal rows of propagation elements. A preferred device utilizing this pattern has at least two storage loops and an access path which passes through each of the loops. An electrical conductor is associated with the propagation elements in the access path so that the passing of a current through the conductor together with the application of an in-plane rotating field to the elements causes bubbles associated with the elements in the access path to move along the access path.

Abstract: A magnetic bubble shift register store having a plate of magnetic material whose preferred magnetization direction extends transverse to the plane of the plate and in which bubbles are situated, said plate having two separate, elongated generally parallel extending continuous bubble paths, of lower bubble energy in comparison with the vicinity; the center lines of said paths being situated at a distance from each other which is at least equal to the mean bubble diameter. The 0-bits of written information to be transported and stored are represented by bubbles in the one path, while the 1-bits thereof are represented by bubbles in the other path. The interaction between the bubbles ensures that bubbles in the two paths cannot pass each other, with the result that the information represented by the bubbles can be unambiguously transported and maintained in the path direction.

Abstract: A random access bubble memory directs a plurality of continuous streams of bubbles toward a plurality of storage loops. A write decoder selects one continuous stream of bubbles. An annihilator then transforms this one continuous stream of bubbles into the desired data pattern which is then stored in a selected loop. While the data pattern is being formed, a read decoder directs the data which had been stored in the selected loop to a bubble detector. This memory has a unified read/write cycle which permits intermixed read and write, read/modify/write, and swap operations. This bubble memory allows a user to remove power abruptly during a read/write cycle without returning a partially processed block to its storage loop and without saving the identity of the block. In a preferred embodiment, the read and write decoders are operated simultaneously by identical control currents.

Abstract: Magnetic bubble functional elements are implemented by aperture patterns in a single layer of electrically-conducting material. The operations of the elements are compatible with single-level conductor driven bubble memories described in A. H. Bobeck patent applications, Ser. Nos. 857,921 now U.S. Pat. No. 4,143,419 issued Mar. 6, 1979 and 856,925, filed Dec. 6, 1977, and in A. H. Bobeck-F. J. Ciak patent application, Ser. No. 899,578, filed Apr. 24, 1978 now abandoned.

Abstract: A bubble storage system includes a closed loop propagation pattern suitable for use with a bubble lattice. The closed loop propagation pattern is folded and contains, for example, segments of a hexagonal lattice connected by 60.degree. turns to obtain a close pack bubble storage configuration. The bubbles are propagated along the pattern consisting, preferably, of C-bar or chevron type permalloy elements by a rotating magnetic field in the plane of the pattern. In a preferred embodiment, the folded closed loop propagation pattern is surrounded by a region of non-propagating bubbles retained by permalloy dot confinement means. There are substantially the same number of elements in the propagation pattern as there are bubbles in the lattice that are affected by the propagation elements.

Abstract: A magnetic domain memory in which domains are driven along a structure of discrete elements which includes at least two domain detection elements formed by interconnected chevrons. The detection signal is based upon the magnetoresistive effect of the series of chevrons. The domain detection elements are pair-wise connected to inputs of a difference determining unit. The detection elements of a pair are disposed 180.degree. relative to each other in the plane of the plate, but are otherwise substantially identical. The detection elements are generally asymmetrical in the sense that a majority of pairs of successive chevron elements are interconnected in positions situated between their center and a corresponding end. Thus, upon passage of a domain within a period of the rotary magnetic field, a comparatively large and a comparatively small domain signal can periodically be generated.

Abstract: A cylindrical domain memory has a storage medium constructed in layer form which is provided with cylindrical domains which are magnetized at right angles to the layer plane, the magnetization being directed opposite to the magnetization of the surrounding material and to that of the magnetic bias field. A propagation structure has an overlay pattern of individual elements of magnetizable material applied in the form of layers to the one layer plane and a rotary magnetic field is directed parallel to the layer plane, which field causes displacement of the cylindrical domains along a path determined by the propagation structure. The propagation structure comprises L-shaped individual elements which are staggered in stepped fashion relative to one another.

Abstract: The disclosed chip design is directed to a multiplexed decoder chip with M.gtoreq.2. With this arrangement magnetic bubble domains are propagating at one data bit every M cycles (for M = 2 this is every other cycle). Therefore, a unique decoder network using an existing retarding switch can be realized to offer a lower power, highly efficient multiplexed decoder chip with complete selective read-write capability.

Abstract: There is provided a memory system, for example, a magnetic bubble domain memory, which includes an exchange stack buffer memory between a main storage area and other portions of a bubble domain chip organization. The buffer memory includes a plurality of magnetic areas, such as discs, arranged in an ordered array between the main storage area and the remainder of the chip organization. Control conductors are arranged to interconnect each row of magnetic areas with an adjacent row of similar areas, or with portions of the main storage area, or with the remainder of the chip organization circuit. Means are provided to supply signals to the control conductors to selectively transfer information from a row of magnetic areas to one of the adjacent areas.

Abstract: An on-chip bubble domain circuit organization utilizing a multi-chip concept is provided. One or more storage registers are separately connected to each of a plurality of propagation channels whereby data in the form of magnetic bubble domains (bubbles) may be transferred into and out of the storage registers. Each of the propagation channels includes a generator for producing the initial bubbles which are supplied to a multiple output replicator via an input propagation path. The initial bubbles are replicated into any desired number of new bubbles by a multiple output replicator. The input propagation paths for the several channels have different lengths of propagation times between the generator and the replicator. Input decoders are utilized to determine to which storage register the bubbles from the replicators will be directed along the propagation channel. Those bubbles not selected are, typically, annihilated.