Abstract: A read disturb information determination system includes a storage device coupled to a global read temperature identification system. The storage device reads, from a first row in a storage subsystem in the storage device, data stored in bits that were previously identified as being susceptible to read disturb effects, and error correction information associated with the data. The storage device uses the error correction information to identify a number of the bits that store portions of the data with errors and, based on the number of bits that store portions of the data with errors, determines read disturb information for the first row in the storage subsystem in the storage device. The storage device then uses the read disturb information to generate a read temperature for a second row in the storage subsystem in the storage device, and provides the read temperature to the global read temperature identification system.

Abstract: A storage device read-disturb-based read temperature map utilization system includes a storage device chassis housing a storage subsystem. A local read temperature utilization subsystem in the storage device chassis determines read disturb information for a plurality of blocks in the storage subsystem, uses it to identify a subset of rows in block(s) in the storage subsystem that have a relatively higher read temperature and, based on those read temperature identifications, generates a local logical storage element read temperature map that identifies a subset of logical storage elements associated with the storage subsystem that have a relatively higher read temperature. The local read temperature utilization subsystem then moves data from first block(s) in the storage subsystem to second block(s) in the storage subsystem based on relative read temperatures identified in the local logical storage element read temperature map.

Abstract: A value-voltage-distribution-intersection-based read disturb information determination system includes a storage device coupled to a global read temperature identification system. The storage device identifies a value voltage distribution intersection of first and second value voltage distributions for respective first and second values in a first row in a storage subsystem in the storage device, and determines a default value voltage reference shift between a default value voltage reference level associated with the first value and the second value and the value voltage distribution intersection. Based on the default value voltage reference shift, the storage device determines read disturb information for the first row in the storage subsystem in the storage device, and uses it to generate a read temperature for a second row in the storage subsystem in the storage device that it provides to the global read temperature identification system.

Abstract: A first set of code, for example source code, and a second code, for example binary code, are compared to find corresponding functions. A comparison of features can be used to find correspondences of functions. The comparison of functions can be iterated and can be refined and can be further used to carry out a further, stricter comparison of functions found to correspond to reduce the chance of falsely finding a function in the second code to be accountable in the first code.

Abstract: A computer-implemented method for automatically uploading media content from a mobile device to an online service provider can include receiving, in the mobile device, identifying information corresponding to a user account associated with at least one of a plurality of online service providers; capturing media content with a media input component included in the mobile device; and after the media content is captured, automatically uploading to the at least one online service provider the captured media content and the identifying information, without receiving user input contemporaneous with the automatic uploading that specifies that the captured media content is to be uploaded. The mobile device can further include a wireless communication component configured to wirelessly send data to and wirelessly receive data from the plurality of online service providers, which can be external to the mobile device.

Abstract: A computer memory device and a method of storing data are provided. The computer memory device includes a parallel memory interface configured to be operatively coupled to a system memory controller, to receive data and commands including logical addresses from the system memory controller, and to transmit data to the system memory controller. The parallel memory interface is configured to respond to the commands from the storage device driver of a computer processing unit. The computer memory device further includes an address translation circuit configured to receive the logical addresses from the parallel memory interface and to translate the received logical addresses to corresponding physical addresses. The computer memory device further includes a non-volatile memory operatively coupled to the parallel memory interface and the address translation circuit.

Abstract: Methods for preventing activation of hardware backdoors installed in a digital circuit, the digital circuit comprising one or more hardware units to be protected. A timer is repeatedly initiated for a period less than a validation epoch, and the hardware units are reset upon expiration of the timer to prevent activation of a time-based backdoor. Data being sent to the hardware unit is encrypted in an encryption element to render it unrecognizable to a single-shot cheat code hardware backdoor present in the hardware unit. The instructions being sent to the hardware unit are reordered randomly or pseudo-randomly, with determined sequential restraints, using an reordering element, to render an activation instruction sequence embedded in the instructions unrecognizable to a sequence cheat code hardware backdoor present in the hardware unit.

Abstract: A method of protecting data in a computer system against attack from viruses and worms comprising; modifying micro-code of a processor of system to be protected to remove homogeneity between processors from a manufacturer; modifying op-codes of an application to match modified micro-code of the processor prior to execution.

Abstract: A coupling apparatus includes a lens disposed between a port, such as a photodetector, and a light source, such as a fiber. The lens is aligned such that light emitted from the light source is focused by the lens onto the port. Between the lens and light source and/or lens and port, a low contrast medium is disposed to reduce reflection that could degrade signal strength.

Abstract: According to the present invention, a method of fabricating a semiconductor device is provided including forming a first interlayer insulating film 11, a crystalline conductive film 21, a first conductive film 23, a ferroelectric film 24 and a second conductive film 25 on a silicon substrate 1 in sequence, forming a conductive cover film 18 on the second conductive film 25, forming a hard mask 26a on the conductive cover film 18, forming a capacitor upon etching the conductive cover film 18, the second conductive film 25, the ferroelectric film 24 and the first conductive film 23 using the hard mask 26a as an etching mask in areas exposed from the hard mask 26a, and etching the hard mask 26a and the crystalline conductive film 21 exposed from the lower electrode 23a using an etching condition under which the hard mask 26a is etched.

Abstract: A system, method and apparatus for delivering a photo captured during a predefined time-interval prior to a voice call. A camera phone or other telephone device will detect that an image is captured during the predefined time-interval prior to the device engaging in a voice call with a given party. In response, the device will automatically send the image to the given party.

Abstract: In a magnetic medium used in a Bloch-line memory device and having a first groove and a pair of second grooves deeper than the first groove with the first groove formed to leave a plateau extended on a principal surface in a predetermined direction between the second groove pair and having first and second end portions, a third groove is deeper than the first groove and has two portions spaced from the second end portion parallel and orthogonal to the predetermined direction. Adjacent to the second end portion, a primary conductor pair is formed on the first groove and adjacent to the second and the third grooves. Parallel to an easy axis of magnetization which is orthogonal to the principal surface, a magnetic domain is formed to surround the plateau by a bias magnetic field applied in a preselected direction parallel to the easy axis.

Abstract: A magnetic bubble memory system with a write protecting function is disclosed. In a power on reset mode or initiallizing mode of an information handling system including the bubble memory system, a bubble memory controller directs to and stores in its own memory, an information representative of a write protecting range for a bubble memory device, from a hidden memory region of the bubble memory device. The bubble memory controller compares the write protecting range to the information designating the address range of the bubble memory device in which a new information is to be written, in response to the write command from a host central processing unit. As a result of the comparison, if the both address ranges overlap each other, the bubble memory controller will execute the write protection and generate a write protection error message for the host CPU.

Abstract: In a Bloch-line memory wherein a magnetic film comprises a first and a second major line and a minor loop portion defined between the first and second major lines, successive presence and absence of magnetic bubbles being transferred along the first major line in response to a plurality of information signals, the information signals being memorized as vertical Bloch line pairs in domain walls of stripe-domains generated in the minor loop portion, the memorized vertical Bloch line pairs being propagated towards the second major line and being read out as bubbles into the second major line, the magnetic film is formed with a plurality of endless long grooves at desired locations in the minor loop portion and an endless stripe-domain is generated and stabilized in each endless long groove, so that the propagation of vertical Bloch line pairs can be performed step by step.

Abstract: A magnetic bubble memory has the longitudinal direction of a minor loop, i.e. a row of permalloy patterns, on a magnetic film of a (111) crystal plane aligned with the [110] crystal axis of the magnetic film. By aligning the direction of bubble transfer in the minor loop with the [110] crystal axis, the bias magnetic field margin, .DELTA.H.sub.B, is enabled to increase and the strength of the holding magnetic field, H.sub.DC, is enabled to decrease.

Abstract: The invention relates to a magnetic bubble store.This store comprises a magnetic garnet layer (1), in which can be formed magnetic bubbles, which are respectively localized by cells. Each cell comprises a pair of localization windows (2, 3), respectively cut from conductive strips (4, 5) of a pair of conductive strips. These strips are insulated from one another and from the garnet and can be respectively traversed by currents (I.sub.1, I.sub.2) for displacing the bubble optionally located in the cell and means (21) for detecting each bubble. The memory is characterized in that the strips of each pair of strips have directions (X, Y) perpendicular to one another, the currents (I.sub.1 I.sub.2) in said strips being respectively parallel to said directions (X, Y).

Abstract: A highly density magnetic bubble memory device has bubble propagation paths having different pattern periods. The distance between a propagation path having shorter period and a magnetic film for holding magnetic bubbles is made smaller than that between propagation path having longer period and the magnetic film. An insulating layer formed between the propagation path and the magnetic film through another insulating layer has a declining slope having an angle of 60.degree. or less, thereby ensuring steady propagation of the magnetic bubbles along the propagation path.

Abstract: A magnetic bubble memory device comprises a plurality of minor loops for storage of data information and a map loop for storage of defective-loop information, etc. The number of bits of the map loop is selected to be N times as large as the number of bits of each minor loop, N being an integer not smaller than 2.

Abstract: A magnetic bubble memory device with major/minor loops includes at least one boot loop and a plurality of minor loops. Data stored in the boot loop in the form of bubbles are controlled by the reading out of the data independently from the minor loops. Header data are stored in the boot loop. Faulty loop data of the minor loops are stored in the minor loops with a certain positional relationship based on the header data. This results in allowing the device to be applied to a memory having a larger capacity, a higher production yield, and a high-speed detection time for faulty loop data.

Abstract: In a magnetic memory device comprising a magnetic medium (21) having an easy axis of magnetization orthogonal to a principal surface of the medium, the medium has at least one stripe domain (20) surrounded by a domain wall which memorizes information in the form of a pair of vertical Bloch lines. Each pair is written in one end of the domain by supply of a local magnetic field to the one end when no magnetic bubble exists in the proximity of the one end. Each information is specified by absence or presence of each pair and successively transferred along the domain wall by a pulsed bias magnetic field. Readout operation is carried out at a preselected end of the stripe domain by supply of another local magnetic field to the preselected end to selectively chop the preselected end into a magnetic bubble only when each pair exists in the preselected end. Thus, presence and absence of each pair is converted into presence and absence of the bubble.

Abstract: A process for manufacturing a dual spacing type magnetic bubble memory chip having a thin garnet film, on which a first area is provided with minor loop transmission lines for memorizing bubble information and a second area is provided with major transmission lines for recording or reading out the bubble information. The process comprises forming a first insulative layer (SiO.sub.2) on the garnet film over the first and second areas, forming conductive patterns on the SiO.sub.2 layer, coating the SiO.sub.2 layer and conductive patterns with a second insulative layer of resin (PLOS) and thermosetting the coated insulative layer, removing by etching part of the SiO.sub.2 and PLOS layers, which exist on the first area, forming a third insulative layer (SiO.sub.2) over the whole surface including the first and second areas, and forming the minor loop transmission lines and the major transmission lines on the third insulative layer.

Abstract: A magnetic bubble memory system includes a plurality of magnetic bubble devices, each of which has at least one minor loop for storing magnetic bubbles, at least one information transfer gate and replicator. Also included in the system are at least one page-allocation designating circuit provided for a corresponding magnetic bubble device for designating single-page or multi-page mode of access and a control-signal generating circuit which outputs a signal controlling the information transfer and replicator gates in cooperation with the output from the page-allocation designating circuit.

Abstract: A magnetic bubble memory that can be read during every cycle of an in-plane drive field includes first and second minor loop sets into which alternate bits of a bubble pattern are stored. Two bubble generators are used to generate a sequence of bubbles in each of two associated lines for later movement to first and second write lines associated with the two minor loop sets, respectively. Swap functions are defined between each write line and the associated line and are operative in a push-pull manner to selectively move bubbles into alternative locations of each of the write lines. Later controlled movement of bubble patterns to selected locations in the minor loop sets results in permanent storage for later integration into a single read line for permitting "read-on-every-cycle" operation.

Abstract: A magnetic bubble memory device including a magnetic bubble chip of major-minor structure is disclosed in which an integer m prime to the number n of bits of a minor loop is selected from integers i satisfying an equation i=(2.sup..alpha. .+-.1).multidot.2.sup..beta. +1 or i=(2.sup..alpha. .+-.1).multidot.2.sup..beta., and logical addresses on the minor loop are assigned in such a manner that adjacent logical addresses are spaced apart from each other by m bits.

Abstract: A bubble memory comprises a substrate with a major surface; a first storage module for storing bubbles on the left side of the surface having parallel inputs and parallel outputs; a second storage module for storing bubbles on the right side of the surface having parallel inputs and parallel outputs; a first input circuit on the left side of the surface including a serial-parallel track along which the bubbles move to the right to enter the parallel inputs of the first storage module; a second input circuit on the right side of the surface including a serial-parallel track along which the bubbles move to the left to enter the parallel inputs of the second storage module; a detector for detecting bubbles disposed equally on the left side and the right side of the surface; a first output circuit on the left side of the surface including a parallel-serial track which receives bubbles from the parallel outputs of the first storage module and moves them to the right to the detector; and a second output circuit on

Abstract: A magnetic bubble memory has a plurality of minor loops for storing data represented by magnetic bubble sequences, a write line for transferring write data to couple them to the minor loops and a read line for transferring read data to a bubble detector. The read line is coupled to a plurality of auxiliary loops through replicators and the auxiliary loops are coupled to the minor loops through replicators. The data replicated to the auxiliary loops are read out.

Abstract: In a magnetic bubble memory device comprising a number of magnetic bubble propagation paths each including magnetic bubble propagation bit segments arrayed in the direction of propagation of magnetic bubbles, the propagation paths being arranged in the direction perpendicular to the propagation direction of magnetic bubbles, d/.lambda..sub.x is set to less than 0.2, where .lambda..sub.x is the period of arrangement of the magnetic bubble propagation paths and d is the distance between close adjoining magnetic bubble propagation bit segments of adjacent magnetic bubble propagation paths.

Abstract: A magnetic bubble memory device has a plurality of memory loops which comprise minor loops and a map loop arranged independently of the minor loops. The map loop stores index data and parameter data of the memory chip. By detecting the index data, parameter data addresses are designated, and required parameter data are read out and stored in parameter memories, respectively, so as to allow operation of magnetic bubble memory chips having different storage capacities and different parameters under control of a single control circuit.

Abstract: An arrangement for incorporating a magnetic bubble memory (MBM) into a system having a system processor and a direct access storage (RAM) utilizes digital command words that represent basic MBM data operations. The processor controls the MBM indirectly by assembling strings of command words in RAM which are transferred to a control interface individually by a direct memory access device. The interface then translates the command words into a set of control signals that are applied to the drive system of the MBM. Each string of command words preferably corresponds to a complete memory read or write operation or a major portion thereof.

Abstract: A magnetic bubble memory system controller is provided to interface a user system and a magnetic domain chip. The controller will functionally accept commands from a user system and deliver those same commands to the appropriate devices associated with the magnetic bubble memory. A further function of the controller device will be to enable multipage read and write functions within the major loop of a magnetic bubble memory chip organization.

Abstract: A magnetic bubble memory chip comprises minor loops of a folded structure for storing information in the form of magnetic bubble domains, and input and output tracks for transferring the information into and out of the minor loops. The input and output tracks have a pattern repetition period that is four or more times as large as a fundamental period of each of the minor loops.

Abstract: Ion-implanted bubble device comprises a magnetic layer in which bubble propagation paths are formed by ion-implantation. The bubble propagation path has an inside turn including a cusp of which the summit deviates toward a direction of bubble propagation with respect to a cusp center line. Such a bubble propagation path permits the ion-implanted bubble device adopting a folded minor loop organization to be realized.

Abstract: A magnetic bubble domain memory device is provided that includes a magnetic bubble domain data chip having a major/minor loop organization in which one or more defective minor loops may be tolerated. Information in the form of a redundancy map is stored within the plurality of minor loops in a single page thereof, where a page is defined as one bit of information from the same virtual position on each of the plurality of minor loops. This redundancy map comprises firmware wherein the presence of a magnetic bubble domain within the designated page at a specified bit position identifies the particular minor loop corresponding to that bit position as a good loop, and conversely the absence of a bubble within the page at a specified bit position identifies the particular minor loop corresponding to that bit position as a defective loop.

Abstract: A magnetic bubble memory has a first bubble propagation track formed with an ion-implanted pattern and a second bubble propagation track formed with permalloy members connected to each other to form a storage loop. The arrangement is such that a position of an attractive magnetic pole created in one of the permalloy members coincides with a position of an attractive charged wall appearing in the ion-implanted layer at a junction of the first and second bubble propagation tracks when a driving magnetic field is in a particular range of direction.

Abstract: A magnetic bubble store formed of a series of longitudinally oriented shift registers and at least one transversely oriented access contour register having a single access point corresponding to each access end of each longitudinally oriented shift register, wherein magnetic bubbles are displaced in the longitudinally oriented shift registers by applying a rotary magnetic field thereto, and wherein magnetic bubbles are displaced in the transversely oriented access contour register by applying an electric current thereto. The longitudinally oriented registers are formed of motifs defined by ion implantation in a magnetic garnet layer.

Abstract: A magnetic bubble domain system including a planar layer of magnetic material in which magnetic bubble domains can be propagated; and first and second bubble domain guide structure coupled to the layer and defining respective first and second bubble propagation paths for guiding the movement of bubbles in the layer in response to a cyclical change in the orientation of a reorienting magnetic field within the plane of the layer. A transfer bubble domain guide structure coupled to the layer is also provided for transferring bubble domains between the first and the second propagation paths responsive to a reverse in direction of the reorienting magnetic field. The transfer path is substantially the same as one of the directions of the crystallographic axes of the planar layer.

Abstract: A replicator for an ion-implanted magnetic bubble domain device including a single level conductor bubble cutting element disposed between first and second spaced apart bubble domain guide structures. The charged wall movement in response to the rotating in-plane field functions to stretch a bubble domain travelling along the first bubble propagation path onto the second bubble propagation path and the conductor element crossing the stretched domain functions in response to an activating signal on the conductor to cut the bubble.

Abstract: A major/minor loop bubble memory system architecture includes a passive replicator in the major loop read channel which is connected by a first path to a mode switch-annihilator and a merge point in the major loop write channel and by a second path to an off-chip decision-making means and the merge point in the write channel. The decision-making means is positioned the same or fewer propagation steps than the mode switch-annihilator is from the replicator. The decision making means is activated to cause either the replicated data to pass through the mode switch-annihilator into the write channel or the replicated data to be annihilated in the mode switch-annihilator and the data from a generator to pass into the write channel.

Abstract: A field-access bubble memory chip has a plurality of permalloy elements overlying an insulating layer. The permalloy elements are configured and positioned to define a plurality of paths for propagating magnetic bubbles under the influence of a Z bias magnetic field and a rotating XY magnetic drive field. A first portion of the paths are located in control function areas of the chip and a second portion of the paths are located in a storage area of the chip. The period of the permalloy elements in the control function areas is substantially greater then the period of the permalloy elements in the storage area. The thickness of the insulating layer immediately beneath the permalloy elements is less in the storage area than in the control function areas. This difference in thickness is sufficient so that the propagation margins for magnetic bubbles in the control function areas and in the storage area are substantially equal.

Abstract: A new geometry for the propagation elements of a field-access magnetic bubble memory is disclosed which is tolerant of relatively wide gaps between elements and lower drive fields. The elements have shapes which define bubble "traps" operative to hold bubbles for relatively high efficiency transfers between elements. In alternate embodiments, the elements have an L-shape or a "pickaxe" shape.

Abstract: A magnetic domain memory system is provided that includes magnetic domain data chips having a major-minor loop organization wherein the system may include data chips having one or more defective minor loops. An erasable non-volatile semiconductor memory device is provided to record locations of defective minor loops for each chip in the system. In order to update the defective minor loop locations when a data chip is replaced a random access memory is provided to store the present map of locations and substitute data designating the new defective minor loops. A method of replacing the map in the erasable non-volatile semiconductor memory is also disclosed. An array of binary one bit data in the form of "1" or "0" is stored in the non-volatile semiconductor memory to designate defective and operative minor loops.

Abstract: A propagation track for use in contiguous disk bubble devices consists of a plurality of spaced dovetail shaped elements which are connected at one end thereof by a track portion which faces in the direction of and is substantially perpendicular to the (1,1,2) axis. The first, third and fifth sides of the dovetail structure are elongated and also face in the direction of and are substantially perpendicular to the (1,1,2) axis. The remaining sides of the dovetail structure have different orientations, the second side facing in the direction of and being substantially perpendicular to the (2,1,1) axis, and the fourth side facing in the direction of and being substantially perpendicular to the (1,2,1) axis. The orientation of the two cusps formed by the first and second sides and the fourth and fifth sides is such that the lines bisecting and pointing toward the cusps are substantially parallel to the (1,2,1) and (2,1,1) axes, respectively.

Abstract: A bubble memory chip includes a plurality of data loops, some of which may be defective, for storing magnetic bubbles representative of data therein. A serial-parallel input propagation path and a parallel-serial output propagation path are provided for propagating bubbles to and from the data loops. A plurality of spaced apart permalloy disk elements are provided, each adapted for having a single bubble circulated thereabout in the presence of an in-plane rotating magnetic drive field. A stream of bubbles representative of an error map indicating which of the data loops are defective is loaded onto and read from the disk elements to initialize the memory. A plurality of gates permit the bubbles of the error map to be transferred between an error map propagation path and the disk elements in parallel fashion upon pulsing of an adjacent control conductor. The potential for data scrambling in the error map is eliminated.

Abstract: A propagation pattern for contiguous disk bubble devices consists of a plurality of parallel propagation tracks in which each propagation track is asymmetric. Adjacent propagation tracks are positioned so that the cusps that face each other are aligned therewith. The region between adjacent tracks forms two subregions which are mirror images of each other when the region is bisected by a longitudinal midplane.

Abstract: A bubble memory includes a garnet film and a pattern of overlying propagation elements, each made of a layer of permalloy and a layer of manganese. The elements define a plurality of paths for propagating magnetic bubble domains under the influence of a Z bias magnetic field and a rotating XY magnetic drive field. The configuration and positioning of the propagation elements is such that the magnetic bubble domains can be selectively routed, e.g. to bypass defective minor loops, by creating barriers over which the magnetic bubble domains will not propagate. Preselected ones of the elements are preferably heated with a laser beam to a temperature which is approximately 75-90% of the melting point of the permalloy. This diffuses the manganese in the permalloy sufficiently to quench the magnetization in the permalloy to thereby create the barriers to bubble propagation.

Abstract: Operating margins for major-minor magnetic bubble memories are improved by use of protective rails between minor loops to prevent loss of information due to stripout. The rails, as are the propagation paths, are defined by unimplanted regions in an otherwise ion-implanted layer. In another embodiment, unimplanted rectangular islands are used rather than rails.

Abstract: Disclosed is a bubble memory having a plurality of data loops, some of which may be defective, and first input and output paths for propagating magnetic bubbles to and from the data loops, respectively. The memory further includes a plurality of redundant loops, and second input and output paths for propagating magnetic bubbles to and from the redundant loops, respectively. A pair of bubble generators are provided for simultaneously generating the same input data stream on both the first and second input paths. By selectively disabling certain first transfer gates associated with the data loops magnetic bubbles are prevented from being transferred into defective ones of the data loops. By selectively enabling certain second transfer gates and certain second replicate gates, magnetic bubbles representing the same information as those not transferred into the data loops can be stored and retrieved from the redundant loops.

Abstract: A magnetic bubble memory device according to this invention comprises a plurality of minor loops, a read-out major line is disposed at one end of the minor loops through gates having a replicating function, and a magnetic bubble detector which includes a detecting line is disposed at one end of the major line. Further, a propagation length from the other end of the read-out major line to the detecting line of the magnetic bubble detector is set at a bit length which slightly exceeds four times the number of the minor loops. For this reason, a continuous read-out operation at high speed is permitted without the influence of replicate pulses.

Abstract: Disclosed is a bubble memory system that includes a plurality of bubble memory chips. Each of the chips have a number of minor loops, but only a predetermined portion of the loops are utilized to store information therein. The remaining loops may be defective and are not used. Data words that are to be stored in the bubble memory chips are passed through a first FIFO circuit which scrambles the bits in the words prior to their storage in the bubble memory chips. Due to this scrambling operation, no bits are stored in the defective loops. Data bits that are received from the bubble memory chips are passed thorugh a second FIFO circuit. There, all of the bits of each word are then realigned and presented at the FIFO output in parallel.

Abstract: A magnetic bubble memory chip structure on which a plurality of magnetic bubble storage loops are provided for containing information data as represented by bubbles and voids and including a dedicated area on the chip for containing redundancy data as represented by a chain of bubbles and voids arranged in a predetermined manner to identify good and defective information data storage loops. The redundancy data-containing dedicated area of the chip comprises a plurality of redundancy data-containing storage loops of equal number to the information data-containing storage loops so as to correspond thereto in a one-on-one relationship, with the number of individual bit positions included in each information data-containing storage loop being significantly greater than the number of bit positions included in each individual redundancy data-containing storage loop.