Abstract: Techniques are generally described for a lock system. An example lock system includes a lock with a lock module that controls a lock mechanism. The lock is configured to transmit optical signals to a key. The key reflects the optical signals back to the lock. The key is configured to encode the optical signals with a combination. The lock module is configured to determine whether the combination is valid. The lock module actuates the locking mechanism when the key is determined to be valid.

Abstract: Mixed data rates in a memory system is disclosed. The system includes at least one semiconductor memory device and another device defining a ring topology. The semiconductor memory device includes input circuitry for receiving a clock signal having a frequency at least substantially equal to a frequency x. A first set of circuit elements are each clocked by a same or respective first internal signal having a frequency at least substantially equal to the frequency x. A second set of circuit elements are each clocked by a same or a respective second internal signal having a frequency at least substantially double that of the frequency x.

Abstract: A method and apparatus for providing electric microcontact printing is provided. A stamp is brought into contact with the surface of a substrate to provide high resolution features. Aspects of the invention may be used for data storage, microcontact printing, and for other applications requiring high resolution pattern transfer.

Abstract: A write control method for a magnetoresistive random access memory, which includes a memory cell having a recording layer with an axis of easy magnetization and an axis of hard magnetization. The write control method includes writing a datum into the memory cell. The writing of the datum includes applying a pulsative first magnetic field substantially parallel to the axis of easy magnetization of the recording layer and a pulsative second magnetic field substantially parallel to the axis of hard magnetization to the recording layer so as to cause a period of the pulsative first magnetic field and a period of the pulsative second magnetic field to overlap each other, and applying a pulsative third magnetic field having substantially the same direction as the pulsative first magnetic field to the recording layer at least once after applying the pulsative first magnetic field to the recording layer.

Abstract: A phase-change memory device is provided. The phase-change memory device includes a phase-change memory cell array including a first memory block having a plurality of phase-change memory cells each connected between each of a plurality of bit lines and a first word line, a second memory block having a plurality of phase-change memory cells each connected between each of the plurality of bit lines and a second word line, and first and second pull-down transistors pulling-down each voltage level of the first and the second word lines and sharing a node and a row driver including a first and a second pull-up transistor pulling-up each voltage level of the first and the second word lines.

Abstract: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line, and a floating channel layer comprising a P-type drain region, a P-type channel region and a P-type source region is formed on the insulating layer. Then, a ferroelectric layer is formed on the floating channel layer, and a word line is formed on the ferroelectric layer. As a result, the resistance state induced to the channel region is controlled depending on the polarity of the ferroelectric layer, thereby regulating the read/write operations of the memory cell array.

Abstract: A ferroelectric memory device includes a simple matrix type memory cell array. Provided that the maximum absolute value of a voltage applied between a first signal electrode and a second signal electrode is Vs, polarization P of a ferroelectric capacitor formed of the first electrode, the second electrode, and ferroelectric layer is within the range of 0.1P(+Vs)<P(?1/3Vs) when the applied voltage is changed from +Vs to ?1/3Vs, and 0.1P(?Vs)>P(+1/3Vs) when the applied voltage is changed from ?Vs to +1/3Vs.

Abstract: A ferroelectric memory device includes a simple matrix type memory cell array. Provided that the maximum absolute value of a voltage applied between a first signal electrode and a second signal electrode is Vs, polarization P of a ferroelectric capacitor formed of the first signal electrode, the second signal electrode, and ferroelectric layer is within the range of 0.1P(+Vs)<P(−⅓Vs) when the applied voltage is changed from +Vs to −⅓Vs, and 0.1P(−Vs)>P(+⅓Vs) when the applied voltage is changed from −Vs to +⅓Vs.

Abstract: A semiconductor memory device comprising: an active layer in which are formed a transistor source, channel and drain; a gate for the transistor; a layer of ferroelectric material; and an electrode for applying a voltage to the ferroelectric material; the electrode being spaced apart from the gate, the layer of ferroelectric material having two stable states of internal polarization, and the arrangement being such that the two states of polarization have a detectable difference in effect upon the transfer characteristic of the transistor. The arrangement enables cross-talk between memory cells upon write to be avoided and can mitigate physical interface problems between the ferroelectric material and the active layer.

Abstract: A semiconductor memory device and method of fabricating same is provided that has a plurality of ferroelectric memory cells and reference cells. The semiconductor memory device includes a capacitor of each memory cell being the same size as that of each reference cell. A voltage applied to each reference cell is higher than a voltage applied to each memory cell to read data out of the semiconductor memory device. A method of fabricating a ferroelectric substance for a semiconductor memory device includes dissolving zirconium n-butoxide and titanium iso-proxide in 2-methoxyethanol; chelating a resultant, obtained by dissolution, with acetylacetone; adding lanthanium (La) iso-proxide to the resultant and refluxing the resultant; adding lead (Pb) acetate trihydrate to the resultant, and stirring the resultant, using a nitric acid as a catalyzer; and carrying out spin-coating and thermal treatment processes on the resultant.

Abstract: An integrated circuit includes a layered superlattice material having the formula A1.sub.w1.sup.+a1 A2.sub.w2.sup.+a2 . . . Aj.sub.wj.sup.+aj S1.sub.x1.sup.+s1 S2.sub.x2.sup.+s2 . . . Sk.sub.xk.sup.+ak B1.sub.y1.sup.+b1 B2.sub.y2.sup.+b2 . . . Bl.sub.yl.sup.+bl Q.sub.z.sup.-2, where A1, A2 . . . Aj represent A-site elements in a perovskite-like structure, S1, S2 . . . Sk represent superlattice generator elements, B1, B2 . . . Bl represent B-site elements in a perovskite-like structure, Q represents an anion, the superscripts indicate the valences of the respective elements, the subscripts indicate the number of atoms of the element in the unit cell, and at least w1 and y1 are non-zero. Some of these materials are extremely low fatigue ferroelectrics and are applied in non-volatile memories. Others are high dielectric constant materials that do not degrade or breakdown over long periods of use and are applied in volatile memories.

Abstract: A random access memory element utilizes giant magnetoresistance. The element includes at least one pair of ferromagnetic layers sandwiching a nonmagnetic conductive layer. At least one of the two ferromagnetic layers has a magnetic moment oriented within its own plane. The magnetic moment of at least the first ferromagnetic layer of the pair has its magnetic moment oriented within its own plane and is typically fixed in direction during use. The second ferromagnetic layer of the pair has a magnetic moment which has at least two preferred directions of orientation. These preferred directions of orientation may or may not reside within the plane of the second ferromagnetic layer. The bit of the memory element may be set by applying to the element a magnetic field which orients the magnetic moment of the second ferromagnetic layer in one or the other of these preferred orientations.

Abstract: A semiconductor storage device and a method for producing the same wherein a source region 2 and a drain region 3 are formed in a semiconductor substrate. Films 14 and 15 of low dielectric constant are formed respectively on the source region 2 and the drain region 3. A ferroelectric film 7 is formed on a channel region 6 surrounded by the source region 2 and the drain region 3. The ferroelectric film 7 is patterned on the films 14 and 15. According to the present invention, semiconductor material is not damaged during the formation and a dielectric polarization efficiency is increased.

Abstract: Non-volatile memories each employing a ferroelectric capacitor composed of a ferroelectric film formed on a diffused layer serving as a source or a drain. A lower electrode is composed mainly of a metal, while the ferroelectric film is connected to a high-concentration diffused layer at a contact hole. Formed on the high-concentration diffused layer is a refractory metal silicide on which to form the ferroelectric substance film.

Abstract: A non-volatile JRAM cell is constructed to require only positive voltage for programming and erasing of data in the cell. The "well" region of the cell JFET device may be implanted with an impurity concentration that will permit lower breakdown voltage or the non-volatile gate may overlap the JFET gate sufficiently to be able to have the same effect, or some combination of both may be used. This allows the cell to be erased using voltages of one polarity.

Abstract: An electrical information or latent image storage system using a storage element which comprises a layer of substantially electrically insulating material having a layer of electrically photosensitive particulate material embedded therein, with a layer of semiconductor material overcoating one surface of the layer of insulating material, and an electrode on the opposite surface of the layer of insulating material. Information in the form of localized electrical charges of an electrical latent image is placed on the element by electrical or photo-electrical means, the information can be retrieved by scanning the element using an electrode-pair grid pattern, an electron beam, or other suitable means, and the retrieved information may be used, for example, through a computer, or reconstructed into a visible image corresponding to a latent image.

Abstract: Excitation of a triad artificial photosynthetic reaction center consisting of a porphyrin (P) convalently linked to a fullerene electron acceptor (C60) and a carotenoid secondary donor (C) leads to the formation of a long-lived C+-P-C60? charge-separated state via photoinduced electron transfer. This reaction occurs in a frozen organic glass down to at least 8 K. At 77 K, charge recombination of C*+-P-C60? occurs on the ?s time scale, and yields solely the carotenoid triplet state. In the presence of a small (20 mT) static magnetic field, the lifetime of the charge-separated state is increased by 50%. This is ascribed to the effect of the magnetic field on interconversion of the singlet and triplet biradicals. At zero field, the initially formed singlet biradical state is in equilibrium with the three triplet biradical sublevels, and all four states have comparable populations. Decay to the carotenoid triplet only occurs from the three triplet sublevels.