Abstract: A phase-change memory (PCM) includes a semiconductor body housing a selection transistor; a electrical-insulation body disposed over the semiconductor body; a conductive region, extending through the electrical-insulation body, electrically coupled to the selection transistor; and a plurality of heater elements in the electrical-insulation body. Each of the plurality of heater elements include a first end in electrical contact with a respective portion of the conductive region and a second end that extends away from the conductive region. The PCM further includes a plurality of phase-change elements extending in the electrical-insulation body and including data storage regions, where each of the data storage regions being electrically and thermally coupled to one respective heater element at the second end of the respective heater element.

Abstract: A memory array comprises vertically-alternating tiers of insulative material and memory cells. The memory cells individually comprise a transistor and a capacitor. The capacitor comprises a first electrode electrically coupled to a source/drain region of the transistor. The first electrode comprises an annulus in a straight-line horizontal cross-section and a capacitor insulator radially inward of the first electrode annulus. A second electrode is radially inward of the capacitor insulator. A capacitor-electrode structure extends elevationally through the vertically-alternating tiers. Individual of the second electrodes of individual of the capacitors are electrically coupled to the elevationally-extending capacitor-electrode structure. A sense line is electrically coupled to another source/drain region of multiple of the transistors that are in different memory-cell tiers. Additional embodiments and aspects are disclosed, including methods.

Abstract: Methods, systems, and devices for a decoder are described. The memory device may include a substrate, an array of memory cells coupled with the substrate, and a decoder coupled with the substrate. The decoder may be configured to apply a voltage to an access line of the array of memory cells as part of an access operation. The decoder may include a first conductive line configured to carry the voltage applied to the access line of the array of memory cells. In some cases, the decoder may include a doped material extending between the first conductive line and the access line of the array of memory cells in a first direction (e.g., away from a surface of the substrate) and the doped material may be configured to selectively couple the first conductive line of the decoder with the access line of the array of memory cells.

Abstract: A memory system includes a nonvolatile memory having a plurality of nonvolatile memory chips incorporated therein, a control circuit that controls the nonvolatile memory, an MPU that controls the control circuit, and an interface circuit that communicates with a host, all of which are mounted on a board of the memory system, and the memory system further includes a bus switch that switches connection of a signal line between the control circuit and the nonvolatile memory chips.

Abstract: A switching device is disclosed. The switching device includes a spin-orbit coupling (SOC) layer, a pure spin conductor (PSC) layer disposed atop the SOC layer, a ferromagnetic (FM) layer disposed atop the PSC layer, and a normal metal (NM) layer sandwiched between the PSC layer and the FM layer. The PSC layer is a ferromagnetic insulator (FMI) is configured to funnel spins from the SOC layer onto the NM layer and to further provide a charge insulation so as to substantially eliminate current shunting from the SOC layer while allowing spins to pass through. The NM layer is configured to funnel spins from the PSC layer into the FM layer.

Abstract: We describe a method of detecting a voltage from a spin-current, the spin-current comprising a current having a spin predominantly aligned in a spin direction, the method comprising: flowing the spin current through a layer of organic material in a vertical direction through the layer; and detecting an electric field in a lateral direction in the layer of organic material. In a preferred embodiment the organic layer is anisotropic and has a higher electrical conductivity in the lateral direction than in the vertical direction.

Abstract: A magnetic memory is described. The magnetic memory includes dual magnetic junctions and spin-orbit interaction (SO) active layer(s). Each dual magnetic junction includes first and second reference layers, first and second nonmagnetic spacer layers and a free layer. The free layer is magnetic and between the nonmagnetic spacer layers. The nonmagnetic spacer layers are between the corresponding reference layers and the free layer. The SO active layer(s) are adjacent to the first reference layer of each dual magnetic junction. The SO active layer(s) exert a SO torque on the first reference layer due to a current passing through the SO active layer(s) substantially perpendicular to a direction between the SO active layer(s) and the first reference layer. The first reference layer has a magnetic moment changeable by at least the SO torque. The free layer is switchable using a spin transfer write current driven through the dual magnetic junction.

Abstract: A magnetic memory is described. The magnetic memory includes magnetic junctions and at least one spin-orbit interaction (SO) active layer. Each of the magnetic junctions includes a data storage layer that is magnetic. The SO active layer(s) are adjacent to the data storage layer of the magnetic junction. The at SO active layer(s) are configured to exert a SO torque on the data storage layer due to a current passing through the at least one SO active layer in a direction substantially perpendicular to a direction between the at least one SO active layer and the data storage layer of a magnetic junction of the plurality of magnetic junctions closest to the at least one SO active layer. The data storage layer is configured to be switchable using at least the SO torque.

Abstract: A memory has magnetic tunnel junction elements with different resistances in different logic states, for bit positions in memory words accessed by a word line signal coupling each bit cell in the addressed word between a bit line and source line for that bit position. The bit lines and source lines are longer and shorter at different word line locations, causing a resistance body effect. A clamping transistor couples the bit line to a sensing circuit when reading, applying a current through the bit cell and producing a read voltage compared by the sensing circuit to a reference such as a comparable voltage from a reference bit cell circuit having a similar structure. A drive control varies an input to the switching transistor as a function of the word line location, e.g., by word line address, to offset the different bit and source line resistances.

Abstract: A stacked semiconductor memory device comprises a semiconductor substrate having a functional circuit, a plurality of memory cell array layers, and at least one connection layer. The memory cell array layers are stacked above the semiconductor substrate. The connection layers are stacked above the semiconductor substrate independent of the memory cell array layers. The connection layers electrically connect memory cell selecting lines arranged on the memory cell array layers to the functional circuit.

Abstract: The thermoelectric conversion efficiency of a thermoelectric conversion device is increased by increasing the figure of merit of a spin-Seebeck effect element. An inverse spin-Hall effect material is provided to at least one end of a thermal spin-wave spin current generating material made of a magnetic dielectric material so that a thermal spin-wave spin current is converted to generate a voltage in the above described inverse spin-Hall effect material when there is a temperature gradient in the above described thermal spin-wave spin current generating material and a magnetic field is applied using a magnetic field applying means.

Abstract: Techniques are provided for programming a spin torque transfer magnetic random access memory (STT-MRAM) cell using a unidirectional and/or symmetrical programming current. A unidirectional programming current flows through the free region of the STT-MRAM cell in one direction to switch the magnetization of the free region in at least two different directions. A symmetrical programming current switches the magnetization of the free region to either of the two different directions using a substantially similar current magnitude. In some embodiments, the STT-MRAM cell includes two fixed regions, each having fixed magnetizations in opposite directions and a free region configured to be switched in magnetization to be either parallel with or antiparallel to the magnetization of one of the fixed regions. Switching the free region to different magnetization directions may involve directing the programming current through one of the two oppositely magnetized fixed regions.

Abstract: A magnetic random access memory cell includes a sense layer, a storage layer, and a spacer layer disposed between the sense layer and the storage layer. During a write operation, the storage layer has a magnetization direction that is switchable between m directions to store data corresponding to one of m logic states, with m>2. During a read operation, the sense layer has a magnetization direction that is varied, relative to the magnetization direction of the storage layer, to determine the data stored by the storage layer.

Abstract: A stacked semiconductor memory device comprises a semiconductor substrate having a functional circuit, a plurality of memory cell array layers, and at least one connection layer. The memory cell array layers are stacked above the semiconductor substrate. The connection layers are stacked above the semiconductor substrate independent of the memory cell array layers. The connection layers electrically connect memory cell selecting lines arranged on the memory cell array layers to the functional circuit.

Abstract: A high speed and low power method to control and switch the magnetization direction and/or helicity of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The mapetic device comprises a reference magnetic layer with a fixed magnetic helicity and/or magnetization direction and a free magnetic layer with a changeable magnetic helicity and/or magnetization direction. The fixed magnetic layer and the free magnetic layer are preferably separated by a non-magnetic layer. The fixed and free magnetic layers may have magnetization directions at a substantially nonzero angle relative to the layer normal. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, is measured to read out the information stored in the device.

Abstract: The present invention is a memory circuit that includes a bistable circuit that stores data; and a ferromagnetic tunnel junction device that nonvolatilely stores the data stored in the bistable circuit according to a magnetization direction of a ferromagnetic electrode free layer, the data nonvolatilely stored in the ferromagnetic tunnel junction device being able to be restored in the bistable circuit. According to the present invention, writing data to and reading data from the bistable circuit can be performed at high speed. In addition, even though a power source is shut down, it is possible to restore data nonvolatilely stored in the ferromagnetic tunnel junction devices to the bistable circuit.

Abstract: A concrete means for making transmission over long distances possible using a spin-wave spin current is provided in a spintronic device and an information transmitting method. At least one metal electrode made of any of Pt, Au, Pd, Ag, Bi, alloys of these, or elements having an f-orbital are provided on top of a magnetic dielectric layer and, so that spin-wave spin current—pure spin current exchange is carried out at the interface between the above described magnetic dielectric layer and the above described metal electrode.

Abstract: A semiconductor integrated circuit includes an n-channel spin FET including one of a magnetic tunnel junction and a magneto-semiconductor junction, the n-channel spin FET including a gate terminal to receive an input signal, a source terminal to receive a first power supply potential, and a drain terminal connected to an output terminal, a p-channel FET including a gate terminal to receive a clock signal, a source terminal to receive a second power supply potential, and a drain terminal connected to the output terminal, a subsequent circuit connected to the output terminal, and a control circuit which turns on the p-channel FET to start charging the output terminal, then turns off the p-channel FET to end the charging, and supplies the input signal to the gate terminal of the n-channel spin FET.

Abstract: A non-volatile tri-state random access memory device, including a permanent magnetic bit; a write module in functional communication with the permanent magnetic bit and configured to selectably alter the permanent magnetic bit between three magnetic states, a write module including a write coil disposed about the permanent magnetic bit and in communication with a source of electrical power; and a read module in functional communication with the permanent magnetic bit and configured to observe and communicate each of three magnetic states of the permanent magnetic bit, the read module including a read sensor coupled to a read return line.

Abstract: A control device of an adjustment apparatus of a motor vehicle for controlling a driven adjustment element of the motor vehicle in an adjustment movement along an adjustment path includes a memory unit with a non-volatile digital memory with more than 108 writing cycles and is configured to acquire a plurality of adjustment data items which are assigned to a position or a speed of the adjustment element along the adjustment path. The control device continuously stores the acquired adjustment data items in the non volatile digital memory when triggered by a triggering process.

Abstract: A spin valve element driving method, and a spin valve element employing such a method, for causing microwave oscillation in a spin valve element. The spin valve element includes an intermediate layer and a pair of ferromagnetic layers including a fixed layer and a free layer sandwiching the intermediate layer, the fixed layer having a higher coercivity than the free layer, and being magnetized in a direction substantially perpendicular to a film plane thereof. The method includes a driving step of passing current from one of the pair of ferromagnetic layers to the other through the intermediate layer.

Abstract: A concrete means for making transmission over long distances possible using a spin-wave spin current is provided in a spintronic device and an information transmitting method. At least one metal electrode made of any of Pt, Au, Pd, Ag, Bi, alloys of these, or elements having an f-orbital are provided on top of a magnetic dielectric layer and, so that spin-wave spin current—pure spin current exchange is carried out at the interface between the above described magnetic dielectric layer and the above described metal electrode.

Abstract: A high speed and low power method to control and switch the magnetization direction and/or helicity of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a reference magnetic layer with a fixed magnetic helicity and/or magnetization direction and a free magnetic layer with a changeable magnetic helicity and/or magnetization direction. The fixed magnetic layer and the free magnetic layer are preferably separated by a non-magnetic layer. The fixed and free magnetic layers may have magnetization directions at a substantially non-zero angle relative to the layer normal. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, is measured to read out the information stored in the device.

Abstract: A magnetic memory device includes a substrate for reading and a magnetic memory cell. The substrate has a channel layer. The magnetic memory cell is formed on the substrate and has a magnetized magnetic material that transfers spin data to electrons passing the channel layer. Data stored in the magnetic memory cell are read by a voltage across both side ends of the channel layer that is generated when the electrons passing the channel layer deviate in the widthwise direction of the channel layer by a spin Hall effect.

Abstract: Disclosed is a memory device using a multi-domain state of a semiconductor material, and more particularly to a magnetic memory device, in which a ferromagnetic layer for recording magnetic data serves as a sensing layer so as to have a simple structure, shorten a manufacturing process, and reduce the unit cost of production. The planar hall effect or magneto-resistance is used to measure multi-domain states so as to read data stored in a multi-level state.

Abstract: A magnetoresistive element, in particular a memory element or a logic element and a method for writing information to such an element are disclosed. The element comprises a first contact of ferromagnetic material and a corresponding layer of magnetoelectric or ferromagnetic material, whereby the first contact is magnetically polarized, depending on an antiferromagnetic boundary surface polarization of the first layer. Said magnetic polarization forms binary information.

Abstract: A sensing device includes a sensor, a control unit, an input/output (I/O) interface, and a non-volatile magnetic memory device having one or more memory cells, each of the memory cells, wherein each memory cell of the non-volatile magnetic memory device includes a magnetic switch including a magnetic component and a write coil located proximate the magnetic component, the write coil coupled to receive a current sufficient to create a remnant magnetic polarity in the magnetic component, and a Hall sensor, positioned proximate the magnetic component, to detect the remnant magnetic polarity indicative of a stored data bit.

Abstract: A non-volatile tri-state random access memory device, including a permanent magnetic bit; a write module in functional communication with the permanent magnetic bit and configured to selectably alter the permanent magnetic bit between three magnetic states, a write module including a write coil disposed about the permanent magnetic bit and in communication with a source of electrical power; and a read module in functional communication with the permanent magnetic bit and configured to observe and communicate each of three magnetic states of the permanent magnetic bit, the read module including a read sensor coupled to a read return line.

Abstract: A magnetic memory device includes a substrate for reading and a magnetic memory cell. The substrate has a channel layer. The magnetic memory cell is formed on the substrate and has a magnetized magnetic material that transfers spin data to electrons passing the channel layer. Data stored in the magnetic memory cell are read by a voltage across both side ends of the channel layer that is generated when the electrons passing the channel layer deviate in the widthwise direction of the channel layer by a spin Hall effect.

Abstract: An embodiment of the invention is a transistor formed in part by a ferromagnetic semiconductor with a sufficiently high ferromagnetic transition temperature to coherently amplify spin polarization of a current. For example, an injected non-polarized control current creates ferromagnetic conditions within the transistor base, enabling a small spin-polarized signal current to generate spontaneous magnetization of a larger output current.

Abstract: A non-volatile magnetic memory cell having a magnetic element with multiple segments which are not co-linear. Each of the segments is magnetized with a remnant magnetic field using a single write line. The segments can be magnetized in a first direction or a second direction, corresponding to first and second orientations of the memory cell. A sensor is provided to determine the direction in which the segments are magnetized and thereby the orientation of the cell. The segments are oriented such that the magnetic flux fields created by their respective remnant magnetic fields have a cumulative effect at a sensing region of the sensor. The cumulative effect allows a less sensitive sensor to be used than in known device. In various embodiments, the magnetic element can have a number of linear segments or a curved profile. In another embodiment, multiple magnetic elements are magnetized by a single write line.

Abstract: A non-volatile magnetic memory cell having a magnetic element with multiple segments which are not co-linear. Each of the segments is magnetized with a remnant magnetic field using a single write line. The segments can be magnetized in a first direction or a second direction, corresponding to first and second orientations of the memory cell. A sensor is provided to determine the direction in which the segments are magnetized and thereby the orientation of the cell. The segments are oriented such that the magnetic flux fields created by their respective remnant magnetic fields have a cumulative effect at a sensing region of the sensor. The cumulative effect allows a less sensitive sensor to be used than in known device. In various embodiments, the magnetic element can have a number of linear segments or a curved profile. In another embodiment, multiple magnetic elements are magnetized by a single write line.

Abstract: A multi-level lithography processes for the fabrication of suspended structures are presented. The process is based on the differential exposure and developing conditions of several a plurality of resist layers, without harsher processes, such as etching of sacrificial layers or the use of hardmasks. These manufacturing processes are readily suited for use with systems that are chemically and/or mechanically sensitive, such as graphene. Graphene p-n-p junctions with suspended top gates formed through these processes exhibit high mobility and control of local doping density and type. This fabrication technique may be further extended to fabricate other types of suspended structures, such as local current carrying wires for inducing local magnetic fields, a point contact for local injection of current, and moving parts in microelectromechanical devices.

Abstract: A multi-state spin based memory cell uses a pair of ferromagnetic layers. A first ferromagnetic layer can be set to any known state k from a set of n different states by adjusting a magnetic orientation of such layer. The relationship of the first ferromagnetic layer and a second magnetic layer can thus correspond to a value of a data item in a non-volatile multi-bit memory cell.

Abstract: A non-volatile magnetic memory cell having a magnetic element with multiple segments which are not co-linear. Each of the segments is magnetized with a remnant magnetic field using a single write line. The segments can be magnetized in a first direction or a second direction, corresponding to first and second orientations of the memory cell. A sensor is provided to determine the direction in which the segments are magnetized and thereby the orientation of the cell. The segments are oriented such that the magnetic flux fields created by their respective remnant magnetic fields have a cumulative effect at a sensing region of the sensor. The cumulative effect allows a less sensitive sensor to be used than in known device. In various embodiments, the magnetic element can have a number of linear segments or a curved profile. In another embodiment, multiple magnetic elements are magnetized by a single write line.

Abstract: A non-volatile random access memory device. The non-volatile random access memory device may include a magnetic bit, a write/sense, and a read pulse module. The read pulse module may be configured to send a read pulse signal to the magnetic bit. In addition, a write module may be in communication with the write/sense coil and may be configured to thereby change the magnetic bit between a first magnetic polarity state and a second magnetic polarity state. A read module may be in communication with the write/sense coil and may be configured to detect a first characteristic of the write/sense coil when a read pulse signal is delivered to the magnetic bit in the first magnetic polarity state and to detect a second characteristic of the write/sense coil when a read pulse signal is delivered to the magnetic bit in the second magnetic polarity state.

Abstract: A nonvolatile hybrid memory cell is provided. The cell is comprised of a magnetic spin storage element and one or two semiconductor FET isolation elements. The magnetic spin storage element is an electron spin-based memory element situated on a silicon based substrate and includes a first ferromagnetic layer with a changeable magnetization state, and a second ferromagnetic layer with a non-changeable magnetization state. A current of spin polarized electrons has a magnitude which can be varied so that a data value can be stored in the memory element by varying a relative orientation of the two ferromagnetic layer. An output of the device is coupled to a conventional CMOS amplifier to determine such relationship.

Abstract: A spin based device can be used as a magnetic field sensor. The device uses ferromagnetic materials for implementing a variable spin resistance to a spin injected current having a particular spin value. An external magnetic field can change the magnetization state of the device by orienting the magnetization of the ferromagnetic layers to be parallel or antiparallel, thus changing the resistance of the device to an electron current of a particular spin orientation.

Abstract: An electron spin-based device includes ferromagnetic layers with different coercivities, such that one of such layers is responsive to a magnetic field and the other is fixed. A value of an impedance in the spin based device for a spin polarized current varies in accordance with a relationship between a first changeable magnetization state and a second non-changeable magnetization state associated with such ferromagnetic layers.

Abstract: Ferromagnetic materials for use with spin memory and logic devices include a geometry and composition adapted to increase spin injection efficiency and/or reduce fringe fields. The ferromagnetic materials can be oriented to implement a variable spin resistance. The ferromagnetic layers are fabricated to permit the device to have two stable magnetization states, parallel and antiparallel. In the “on” state the device has two settable, stable resistance states determined by the relative orientation of the magnetizations of the ferromagnetic layers. An external magnetic field can change the magnetization state of the device by orienting the magnetization of the ferromagnetic layers to be parallel or antiparallel, thus changing the resistance of the device to a current of spin polarized electrons.

Abstract: Magnetic spin devices can be used as a memory element or logic gate. When connected in a circuit configuration, different spin devices can be written to in any number of different ways, such as with different device coercivities, different sets of write lines, different signal amplitudes, different read/write line orientations, etc.

Abstract: A spin based electronic device can be used as a magnetic field sensor. The device uses ferromagnetic materials for implementing a variable spin resistance. An external magnetic field can change the magnetization state of the device by orienting the magnetization of the ferromagnetic layers to be parallel or antiparallel, thus changing the resistance of the device to a current of spin polarized electrons.

Abstract: A non-volatile magnetic memory cell having a magnetic element with multiple segments which are not co-linear. Each of the segments is magnetized with a remnant magnetic field using a single write line. The segments can be magnetized in a first direction or a second direction, corresponding to first and second orientations of the memory cell. A sensor is provided to determine the direction in which the segments are magnetized and thereby the orientation of the cell. The segments are oriented such that the magnetic flux fields created by their respective remnant magnetic fields have a cumulative effect at a sensing region of the sensor. The cumulative effect allows a less sensitive sensor to be used than in known device. In various embodiments, the magnetic element can have a number of linear segments or a curved profile. In another embodiment, multiple magnetic elements are magnetized by a single write line.

Abstract: A new nonvolatile hybrid memory cell is provided. The cell is comprised of a magnetic spin storage element and one or two semiconductor FET isolation elements. The magnetic spin storage element is an electron spin-based memory element situated on a silicon based substrate and includes a first ferromagnetic layer with a changeable magnetization state, and a second ferromagnetic layer with a non-changeable magnetization state. A current of spin polarized electrons has a magnitude which can be varied so that a data value can be stored in the memory element by varying a relative orientation of the two ferromagnetic layers.

Abstract: A method of operating a spin based memory cell stacked architecture is provided. The cells are comprised of magnetic spin storage elements stacked on top of each other on a silicon substrate, as well as one or two semiconductor FET isolation elements.

Abstract: A new nonvolatile hybrid memory cell is provided. The cell is comprised of a magnetic spin storage element which is written using inductive write lines. The magnetic spin storage element is an electron spin-based memory element situated on a silicon based substrate and includes a first ferromagnetic layer with a changeable magnetization state, and a second ferromagnetic layer with a non-changeable magnetization state. A current of spin polarized electrons has a magnitude which can be varied so that a data value can be stored in the memory element by varying a relative orientation of the two ferromagnetic layers using a magnetic field imposed by the inductive write lines.

Abstract: A hybrid magnetic-semiconductor structure can be used as a magnetic field sensor. The hybrid device uses ferromagnetic materials for implementing a variable spin resistance. An external magnetic field can change the magnetization state of the device by orienting the magnetization of the ferromagnetic layers to be parallel or antiparallel, thus changing the resistance of the device to a current of spin polarized electrons.

Abstract: Ferromagnetic elements for use with spin memories, logic devices and processing circuits include a geometry incorporating an asymmetry about one axis and in some instances one or more curved sections. Magnetic memory elements can be set out in an array such that convex and concave portions are also optimally arranged about magnetization axes.

Abstract: A new magnetic spin device can be used as a memory element or logic gate, such as an OR, AND, NOT, NOR and NAND gate. The state of the magnetic spin device is set inductively. A magnetic spin transistor/gate can be operated with current gain. Furthermore, inductive coupling permits the linking of multiple spin transistors and spin transistor gates to perform combinational tasks. A half adder embodiment is specifically described, and other logic gates and combinations of half adders can be constructed to perform arithmetic functions as part of a microprocessor.

Abstract: A memory structure that includes a first electrode, a second electrode, a third electrode, a control element disposed between the first electrode and the second electrode, and a memory storage element disposed between the second electrode and the third electrode. At least one of the control element and memory storage element is protected from contamination by at least one of the first electrode, second electrode and third electrode.