Electron Beam Patents (Class 365/237)
  • Patent number: 7729199
    Abstract: The invention encompasses beam expanders and methods of using such beam expanders. A beam expander according to the present invention may advantageously be used with an interferometer. Beam expanders according to the present disclosure contain at least an input and an output lens, with the output lens having a plano-convex arrangement such that the surface of the output lens is optically flat and can be used as the reference surface in a Fizeau interferometer. The beam expander may also encompass a housing, a partially reflective coating and an anti-reflective coating.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: June 1, 2010
    Assignee: HNu-Photonics
    Inventor: Dan O'Connell
  • Patent number: 7667996
    Abstract: The scale of the devices in a diode array storage device, and their cost, are reduced by changing the semiconductor based diodes in the storage array to cold cathode, field emitter based devices. The field emitters and a field emitter array may be fabricated utilizing a topography-based lithographic technique.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: February 23, 2010
    Assignee: Contour Semiconductor, Inc.
    Inventor: Daniel R. Shepard
  • Patent number: 7608542
    Abstract: A large-size glass substrate, from which a photomask substrate is formed, is prepared by processing a large-size glass substrate stock by (1) a flattening removal quantity based on height data of the substrate stock in the vertical attitude plus a deformation-corrective removal quantity. The deformation-corrective removal quantity is calculated from (2) a deflection of the substrate stock by its own weight in the horizontal attitude, (3) a deformation of the photomask substrate caused by chucking in an exposure apparatus, and (4) an accuracy distortion of a platen for supporting a mother glass.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: October 27, 2009
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Shuhei Ueda, Yukio Shibano, Atsushi Watabe, Daisuke Kusabiraki
  • Patent number: 7502246
    Abstract: A ballistic memory cell structure employing ballistic transistor technology for switching between a read state and a store state is disclosed. The memory cell structure includes substrate structures forming a side wall and a main chamber for defining a linear ballistic channel between the two. The main chamber is formed to include a deflection channel with deflective surfaces to deflect an electron emitted from an electron source into the memory cell structure. Deflection controllers are coupled to the substrate structures for generating biasing fields that adjust the trajectory of electrons flowing through the linear ballistic channel and the deflection channel. Logic output terminals are positioned beyond channel exits for registering exiting electrons and determining a read or store state.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: David Daniel Chudy, Michael G. Lisanke, Cristian Medina
  • Patent number: 7165159
    Abstract: A memory controller converts controller output signals output from a controller int memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: January 16, 2007
    Assignee: Fujitsu Limited
    Inventor: Yoshihiro Takemae
  • Patent number: 7085151
    Abstract: A storage device and a storage system employing the storage device. In one embodiment, the storage device comprises an electron emitter and a storage medium comprising an information layer having at least a first state and a second state for storing information. The storage device comprises a resistance measurement system coupled to the storage medium for reading the information stored at the information layer by measuring resistance to determine a state of a storage area on the information layer.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: August 1, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Gary Ray Ashton, Robert Newton Bicknell
  • Patent number: 6947311
    Abstract: This invention relates to the controlled two-dimensional structural transition of a dipole monolayer at a metal, semi-conducting or insulating interface. The dipole monolayer consists of objects/molecules with a permanent electric dipole moment. A transition between the structures of the molecular layer can be performed locally and reversibly by applying an electrical field and the structures/patterns can be reversibly switched many times between two different structures/states. Both of the two structures, the ordered and the disordered structures, are intrinsically stable without the presence of the switching electrical field. This controlled switch of the local layer structure can be used to change layer properties (i.e., mechanical, electrical, optical properties). The controlled reversible modifications of the dipole monolayer structures are usable as bit assignments in data storage applications for example.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: September 20, 2005
    Assignee: University of Basel
    Inventors: Simon Berner, Silvia Schintke, Luca Ramoino, Michael de Wild, Thomas A. Jung
  • Patent number: 6850432
    Abstract: Roughly described, a phase-change memory such as a chalcogenide-based memory is programmed optically and read electrically. No complex electrical circuits are required for programming the cells. On the other hand, this memory can be read by electrical circuitry directly. The read out speed is much faster than for optical disks, and integrated circuit chips made this way are more compatible with other electrical circuits than are optical disks. Thus memories according to the invention can have simple, low power-consuming, electrical circuits, and do not require slow and power-hungry disk drives for reading. The invention therefore provides a unique low power, fast read/write memory with simple electrical circuits.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: February 1, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih-Yuan Lu, Yi-Chou Chen
  • Patent number: 6775174
    Abstract: A one transistor one capacitor micromirror with DRAM memory cell built around a large polysilicon-to-substrate capacitor which is not susceptible to recombination of photo-generated carriers caused by illumination in the projector. This large polysilicon-to-substrate capacitor overshadows the much smaller inherent parallel depletion capacitance which is sensitive to light. The device is further 100% shielded from exposed light by metal layers and the address node is located under the center of the micromirror mirror to obtain maximum shielding of light for the smaller, light sensitive, depletion portion of the capacitance. As a result the micromirror of this invention can adequately hold the cell charge in excess of the device load time of 300 &mgr;Sec even in extremely high brightness projector applications.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: August 10, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: James D. Huffman, Larry J. Hornbeck, Richard L. Knipe
  • Patent number: 6601194
    Abstract: A semiconductor memory of an integrated circuit has memory cells that are combined to form individually addressable normal units and redundant units for replacing normal units. The semiconductor memory has a selection circuit for selecting one of the redundant units. A non-volatile first memory unit for storing an address, which can be programmed by an energy beam, of a normal unit to be replaced is provided. A non-volatile second memory unit for storing an address, which can be programmed via electrical contact is also provided. The first and second memory units are connected to the selection circuit for transmitting their respective stored information to the selection circuit. A repair can thus be carried out on the unhoused semiconductor memory and on the housed semiconductor memory. Since only a sufficient portion of all the redundant circuits to be provided are configured in such a way, this allows a space requirement that is smaller overall.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: July 29, 2003
    Assignee: Infineon Technologies AG
    Inventors: Wilfried Dähn, Peter Pöchmüller
  • Patent number: 6388912
    Abstract: A system for storing data on a magnetic medium using spin polarized electron beams is provided. The system includes a source of spin polarized electrons and a storage medium disposed a selected distance from the source. The storage medium has a plurality of storage locations, each of which includes a layer of magnetic material sandwiched between first and second layers of a half-metallic material. The resulting sandwich structure forms a spin dependent electron trap that increases coupling between beam electrons in a first spin state and target electrons in a second spin state. An electron optics system directs the source of spin polarized electrons to one of the plurality of storage locations.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: May 14, 2002
    Assignee: Intel Corporation
    Inventors: Eric C. Hannah, Michael Brown
  • Patent number: 6304481
    Abstract: A data storage device including a substrate, a data storage layer on the substrate, and a spin-polarized electron source. The data storage layer comprises a fixed number of atomic layers of a magnetic material which provide the data storage layer with a magnetic anisotropy perpendicular to a surface of the data storage layer. A data magnetic field is created in the data storage layer. The data magnetic field is polarized either in a first direction corresponding to a first data value or in a second direction corresponding to a second data value.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: October 16, 2001
    Assignee: TeraStore, Inc.
    Inventor: Thomas D. Hurt
  • Patent number: 5053995
    Abstract: A data storage apparatus includes a first lever body having a piezoelectric driving section, and a second lever body which is disposed to separate from and to be perpendicular to the first lever body, and has a piezoelectric driving section. A recording medium is formed on a portion of the second lever body, and records desired data. A plurality of probes are disposed on a portion of the first lever body to oppose the recording medium at a predetermined interval, and detect a change in state at predetermined positions on the recording medium as a change in tunnel current or a change in three-dimensional pattern. A voltage applying circuit alternately applies predetermined voltages to the piezoelectric driving sections of the first and second lever bodies to separately drive the plurality of probes in different directions, thereby three-dimensionally scanning the recording medium.
    Type: Grant
    Filed: January 23, 1990
    Date of Patent: October 1, 1991
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Hiroshi Kajimura, Toshihito Kouchi, Akitoshi Toda, Yasuo Isono, Yoshiyuki Mimura, Hiroko Ohta, Ryouhei Shimizu
  • Patent number: 4805145
    Abstract: A method for recording and reproducing information includes the steps of regularly arranging fine grains having a size less than 0.1 .mu.m on a substrate, which fine grains may be evaporated by being irradiated with electron beams, irradiating predetermined locations of the grain coated substrate by an electron beam modulated in response to information to be recorded by the method, by selectively evaporating fine grains at the predetermined locations irradiated by the electron beam, and irradiating the substrate on which information is recorded with the electron beam to detect the presence or absence of fine grains in order to reproduce the previously recorded information. According to the above described system, large recording densities may be obtained, such as approximately 10.sup.12 bits/cm.sup.2.
    Type: Grant
    Filed: December 8, 1986
    Date of Patent: February 14, 1989
    Assignee: Research Development Corporation of Japan
    Inventor: Shizuo Umemura
  • Patent number: 4672578
    Abstract: An information recording method is provided, in which a p- or n-type semiconductor wafer is irradiated with an energetic particle beam such as an electron beam thereby to control, e.g., decreased or increased generation of the surface photovoltage at the irradiated area so that information may be recorded on the wafer.
    Type: Grant
    Filed: February 22, 1984
    Date of Patent: June 9, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Chusuke Munakata, Kunihiro Yagi, Masaru Miyazaki, Shiyouzou Yoneda
  • Patent number: 4380776
    Abstract: A microfilm display device is responsive to a film address signal and controlled by a microprocessor to locate a desired film and select a film image for display on a cathode-ray terminal. The film image is converted to a video signal for display on the terminal. The video signal is used for fine positioning of the raster on a flying spot scanner which illuminates the film.
    Type: Grant
    Filed: February 4, 1980
    Date of Patent: April 19, 1983
    Assignee: Computer Microfilm International Corporation
    Inventors: David L. Smith, Gerald E. O'Brien
  • Patent number: 4319284
    Abstract: Apparatus for continuously reading out the graphic information represented by a charge pattern on a dielectric film includes an integrated circuit array of field effect devices each having a source and drain in series with a respective p-n junction photodiodes. A bias voltage is connected across the field effect devices and respective photodiodes and a load impedance. A scanner positioned to scan a spot of light over the array of photodiodes causes conduction of currents through field effect devices which are rendered conductive by charges on the dielectric film to produce a video signal across the load impedance.
    Type: Grant
    Filed: October 12, 1979
    Date of Patent: March 9, 1982
    Assignee: RCA Corporation
    Inventors: Helmut G. Kiess, Bruno K. Binggeli
  • Patent number: 4123798
    Abstract: This invention relates to apparatus and methods for providing a high-density memory for electrical data and more particularly, to such a memory wherein data are represented by patterns of charge written and read by electron beam means at addressed locations.
    Type: Grant
    Filed: December 5, 1977
    Date of Patent: October 31, 1978
    Assignee: Avco Everett Research Laboratory, Inc.
    Inventors: Francis J. Cook, Frederick E. Kline
  • Patent number: 4122530
    Abstract: A data recording and readback subsystem for digital computer systems employing random access electron beam memories having an electron beam write/read apparatus for recording data to be stored on a recording member that is subject to fatigue in the eventuality of excessive write/read storage operations at any given physical location on the recording member. The improved method and apparatus for data management comprising systematically permuting the physical location of data stored on the recording member, recording each permutation of the data, deriving signals representative of the number of permutation operations, and combining programmer initiated requests from the computer system central processing unit for data stored in the electron beam memory with the signals representative of the number of permutations to derive an actual physical address signal for application to the electron beam memory for recovery of the requested data.
    Type: Grant
    Filed: May 25, 1976
    Date of Patent: October 24, 1978
    Assignee: Control Data Corporation
    Inventors: Donald O. Smith, Kenneth J. Harte, Hollister B. Sykes
  • Patent number: 4090260
    Abstract: The invention comes within the domain of synthetic images on a cathode scn and concerns a digital memory whose contents are cyclically read to constitute an image on the screen. The memory is divided into blocks each of which contains the data of a part of the image and which are cyclically controlled in such a way that within a line of the image, the blocks are read successively, whereas at the end of a line, a block is skipped. Thus, possible blanks in the image due to the breakdown of one of the blocks are distributed over the image and no longer erase a vertical column of the image.
    Type: Grant
    Filed: June 25, 1976
    Date of Patent: May 16, 1978
    Assignee: Compagnie Industrielle des Telecommunications Cit-Alcatel S.A.
    Inventor: Dusan Sinobad
  • Patent number: 4079358
    Abstract: A buried junction MOS memory capacitor target device for electron beam addressable READ/WRITE memories is described along with a method of using the same. The memory capacitor target structure comprises a planar semiconductor substrate of various degrees of complexity having a highly conducting coating providing a low resistance ohmic contact to the substrate backside and an N-type planar semiconductor overlayer forming with the substrate topside a bipolar detector junction. An insulating layer overlies the N-type layer and a conducting coating overlies the insulating layer. The device is employed with an electron beam of sufficient energy to penetrate the latter two layers and to produce carrier-pairs in the N-type overlayer. Electrical access to the device is provided by one contact to the substrate backside and one contact to the conducting coating overlying the insulator.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: March 14, 1978
    Assignee: Micro-Bit Corporation
    Inventor: Floyd O. Arntz
  • Patent number: 4068218
    Abstract: A method and apparatus for deep depletion read-out of data stored in a metal-insulator-semiconductor-metal capacitor memory element wherein a predetermined read-out potential is established across the memory capacitor while discrete storage sites within the capacitor are interrogated by a scanning electron beam probe and the magnitude of the resultant memory capacitor discharge current obtained from probing a particular site with the electron beam is indicative of the character of data stored at the site. The improvement comprises applying a voltage step across the capacitor memory element just prior to read-out with the electron beam, the voltage step corresponding in polarity to the polarity of the majority carriers in the semiconductor.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: January 10, 1978
    Assignee: Micro-Bit Corporation
    Inventor: Robert K. Likuski