Abstract: Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and receive optical signals, and first and second memory modules. The module substrate of the first memory module has an aperture formed therein, the aperture being operable to provide an optical path for optical signals between the controller and an optical transmitter/receiver unit of the second memory module. Thus, the system memory provides the advantages of “free space” optical connection in a compact arrangement of memory modules. In an alternate embodiment, the first memory module includes a beam splitter attached to the module substrate proximate the aperture. In another embodiment, the first and second memory modules are staged on the carrier substrate to provide an unobstructed path for optical signals.

Abstract: An optoelectronic device is disclosed with a light source, a wave guide and a first signal line, wherein a cell is formed at the intersection between the wave guide and the first signal line. The cell includes a light activated switch and an output device. The optoelectronic device may be an optoelectronic memory wherein the output device is a storage unit. Alternatively the optoelectronic device may be an optoelectronic display device wherein the output device is a light emitting device or a liquid crystal device.

Abstract: A semiconductor integrated circuit capable of protection from card hacking, by which erroneous actions are actively induced by irradiation with light and protected secret information is illegitimately acquired, is to be provided. Photodetectors, configured by a standard logic process, hardly distinguishable from other circuits and consumes very little standby power, are mounted on a semiconductor integrated circuit, such as an IC card microcomputer. Each of the photodetectors, for instance, has a configuration in which a first state is held in a static latch by its initializing action and reversal to a second state takes place when semiconductor elements in a state of non-conduction, constituting the static latch of the first state, is irradiated with light. A plurality of photodetectors are arranged in a memory cell array. By incorporating the static latch type photodetector into the memory array, they can be arranged inconspicuously.

Abstract: A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable to receive and convert optical address and control signals, respectively, into corresponding electrical address signals applied to the address decoder and control signals applied to the control logic. A read/write circuit on the substrate is coupled to a data converter formed in the substrate. The data converter is operable to receive and convert optical write data signals into corresponding electrical data signals to be applied to the read/write circuit and to receive and convert electrical read data signals into corresponding optical read data signals.

Abstract: A system and methods for addressing unique locations in a matrix. According to some embodiments, the system includes a plurality of uniquely addressable locations. A plurality of virtual columns that include a plurality of serially connected switch elements provide addressable access to the locations. The plurality of switch elements may be one of a plurality of responsive types and responsive to at least one of a plurality of possible switching signal types.

Abstract: Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and receive optical signals, and first and second memory modules. The module substrate of the first memory module has an aperture formed therein, the aperture being operable to provide an optical path for optical signals between the controller and an optical transmitter/receiver unit of the second memory module. Thus, the system memory provides the advantages of “free space” optical connection in a compact arrangement of memory modules. In an alternate embodiment, the first memory module includes a beam splitter attached to the module substrate proximate the aperture. In another embodiment, the first and second memory modules are staged on the carrier substrate to provide an unobstructed path for optical signals.

Abstract: Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and receive optical signals, and first and second memory modules. The module substrate of the first memory module has an aperture formed therein, the aperture being operable to provide an optical path for optical signals between the controller and an optical transmitter/receiver unit of the second memory module. Thus, the system memory provides the advantages of “free space” optical connection in a compact arrangement of memory modules. In an alternate embodiment, the first memory module includes a beam splitter attached to the module substrate proximate the aperture. In another embodiment, the first and second memory modules are staged on the carrier substrate to provide an unobstructed path for optical signals.

Abstract: A controller converts a parallel command signal and address signal, or a parallel write data signal into a first serial signal, and outputs the converted signal as a first optical signal with a single wavelength to a memory device via an optical transmission line. The memory device converts the first optical signal into the original parallel command signal, address signal, and write data signal, and outputs the converted parallel signals to a memory unit. The memory device converts a parallel read data signal from the memory unit into a second serial signal, and outputs the converted signal to the controller via the optical transmission line as a second optical signal with a single wavelength. It is unnecessary to transmit the optical signal using an optical multiplexer, an optical demultiplexer, etc., thereby improving transmission rate of signals transmitted between the controller and the memory device at minimum cost.

Abstract: A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable to receive and convert optical address and control signals, respectively, into corresponding electrical address signals applied to the address decoder and control signals applied to the control logic. A read/write circuit on the substrate is coupled to a data converter formed in the substrate. The data converter is operable to receive and convert optical write data signals into corresponding electrical data signals to be applied to the read/write circuit and to receive and convert electrical read data signals into corresponding optical read data signals.

Abstract: N-V centers in diamond are created in a controlled manner. In one embodiment, a single crystal diamond is formed using a CVD process, and then annealed to remove N-V centers. A thin layer of single crystal diamond is then formed with a controlled number of N-V centers. The N-V centers form Qubits for use in electronic circuits. Masked and controlled ion implants, coupled with annealing are used in CVD formed diamond to create structures for both optical applications and nanoelectromechanical device formation. Waveguides may be formed optically coupled to the N-V centers and further coupled to sources and detectors of light to interact with the N-V centers.

Abstract: A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

Abstract: A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

Abstract: A semiconductor integrated circuit capable of protection from card hacking, by which erroneous actions are actively induced by irradiation with light and protected secret information is illegitimately acquired, is to be provided. Photodetectors, configured by a standard logic process, hardly distinguishable from other circuits and consumes very little standby power, are mounted on a semiconductor integrated circuit, such as an IC card microcomputer. Each of the photodetectors, for instance, has a configuration in which a first state is held in a static latch by its initializing action and reversal to a second state takes place when semiconductor elements in a state of non-conduction, constituting the static latch of the first state, is irradiated with light. A plurality of photodetectors are arranged in a memory cell array. By incorporating the static latch type photodetector into the memory array, they can be arranged inconspicuously.

Abstract: A data storage apparatus includes an array of optical fibers. The array has a first end and a second end. The first end of the array includes multiple optical fiber ends, each optical fiber end having an end face adapted for receiving light of a wavelength ? into the fiber for conveyance to the second end of the fiber array. The second end of the array includes multiple tapered optical fiber tips, each tapered optical fiber end having a minimum diameter less than ?. An opaque coating covers a portion of the tapered optical fiber tips. The data storage apparatus also includes a photochromic medium located within a distance ? of the second end of the array.

Abstract: A number of memory array units are placed on a die. Each memory array within a unit is coupled to a channel that includes one or more data lines coupled to a pad on the die. Each memory array unit utilizes a different channel. Memory array units are grouped together in pairs on the die to form memory array groups. The two channels of each memory array group form boundaries on the die. The pads coupled to each channel of a memory array group are positioned within those boundaries. The pads may be arranged such that the same pad layout can be used across different dies fabricated for use at different bus widths. In one embodiment, a set of the pads are used in applications where the die is configured for a first bus width and a portion of the pads used in the first bus width applications are not used in applications where the die is configured to for a second bus width.

Abstract: An all-optical, asynchronous binary storage cell implemented by optically induced total internal reflection cross-junction waveguide switches. The term “all-optical” refers to directing of optical data signals as a result of optical control signal inputs without the need for conversion between optical and electrical domains. The binary cell is a building block for a programmable all-optical random access memory (AORAM) device. The AORAM device enables circuits and networks that require optical buffers.

Abstract: Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and receive optical signals, and first and second memory modules. The module substrate of the first memory module has an aperture formed therein, the aperture being operable to provide an optical path for optical signals between the controller and an optical transmitter/receiver unit of the second memory module. Thus, the system memory provides the advantages of “free space” optical connection in a compact arrangement of memory modules. In an alternate embodiment, the first memory module includes a beam splitter attached to the module substrate proximate the aperture. In another embodiment, the first and second memory modules are staged on the carrier substrate to provide an unobstructed path for optical signals.

Abstract: An optical memory device includes a plurality of optical memory cells, at least one wavelength filter, at least one read/write/erase filter, and a plurality of optical strands, wherein each optical memory cell stores and transmits data in optical form. The optical memory device interacts with an array of photon detectors, an array of lasers, and at least one central processing unit. A method of optically storing data in an optical memory device includes providing an optical memory device including a plurality of optical memory cells, at least one wavelength filter, at least one read/write/erase filter, and a plurality of optical strands; and storing and transmitting data in optical form in at least one of the plurality of optical memory cells.

Abstract: A solid state memory device is fabricated by forming a level of the device; identifying defective areas in the level; and programming address logic of the level to avoid the defective areas in the level.

Abstract: An optical memory device includes a plurality of optical memory cells, each optical memory cell including at least one wavelength filter, at least one read/write/erase filter, and a plurality of optical strands, wherein each optical memory cell stores and transmits data in optical form. The optical memory device interacts with an array of photon detectors, an array of lasers, and at least one central processing unit. A method of optically storing data in an optical memory device includes providing an optical memory device including a plurality of optical memory cells, each optical memory cell including at least one wavelength filter, at least one read/write/erase filter, and a plurality of optical strands; and storing and transmitting data in optical form in at least one of the plurality of optical memory cells.

Abstract: A data storage system utilizing a non-volatile IC based storage media to reduce data retrieval time. The data storage system includes a non-volatile, non IC based storage system such as e.g. a hard disk. In one example, the non-volatile IC based storage media is implemented with MRAM. In one example, the processor of the storage system determines a seek time between sectors of the hard disk drive allocated to store a file of user data. Based upon the determined seek time, the processor non-volatilely stores a portion (e.g. the leading portion or the trailing portion) of a block of the user data in the MRAM. When the data is being accessed from the hard disk, the processor can provide the data stored in the MRAM while a read/write head moves between the sectors in order to decrease the access time for a file.

Abstract: A method of writing in or reading out data on a medium is provided. The method comprises receiving mechanism driving information corresponding to a type of a drive unit from an external apparatus, the drive unit being configured to write in or read out data on a medium. The method also comprises storing the mechanism driving information, and providing the stored mechanism driving information to the drive unit for activation.

Abstract: A reverse bias voltage in combination with selective illumination can selectively write data into optical memory. The writing process can be completed quickly since parallel writing of data may be performed. The writing process generates an avalanche current that is used to change an element. The change can be destruction of the element or may be the alteration of property such as conductance or work function.

Abstract: A system connected to a host computer is used to write in or read out data on a disc. The system includes a CD RW controller, a RAM, a &mgr; processor, and a drive mechanism. The RAM, although functioning as a data buffer, receives instruction codes and variable parameters directly from the host computer. Based on the instruction codes and variable parameters, the &mgr; processor and the CD RW controller work the drive mechanism to write in and/or read out data on a disc.

Abstract: Methods and apparatus are described for retrieving information from a storage medium. A first portion of the surface of the storage medium is exposed to stimulating light which diffuses in the storage medium under a second portion of the surface adjacent the first portion. The second portion of the surface is shielded from exposure to the stimulating light. Stimulated light corresponding to the information is received with at least one detector positioned to receive the stimulated light via the second portion of the surface of the storage medium. The stimulated light is released from the storage medium in response to the stimulating light diffused under the second portion of the surface.

Abstract: Each device of a family of removable digital media devices may be plugged into a host to permits the host to store data in it or to retrieve data from it. The form factors of the digital media devices and the connector system used by them are compact for minimizing the volume of space occupied in portable devices and for easy storage. Preferably, the digital media devices of the family use serial memory requiring few power and signal lines, so that few electrical contacts are required. For example, a small number of durable contact pads form the contact arrays on the digital media devices, which in conjunction with corresponding contact pads mounted into a suitable socket provide for easy and convenient insertion and removal and for robust and reliable electrical contact over a long insertion lifetime. The digital media devices interface to the host either directly or through adapters.

Abstract: In a card type semiconductor memory device, a plurality of memory chips each of which stores, as analog values, a still image formed from a color interleaved analog image signal using analog nonvolatile semiconductor memories for writing/reading color interleaved analog image signals having analog luminance information of predetermined colors in units of pixels, and a connector for connecting a number of signal lines for transferring various signals between the memory chips and a host device to the host device side are arranged on a card-like substrate. An analog signal line group from each memory chip is separated from a digital signal line group on the substrate via a separation strip formed from a wide conductive pattern, and concentratedly laid out at positions of the connector, which are separated from the digital signal line group. In each memory chip, terminals for analog signals are concentrated to a terminal array provided on a predetermined side of the chip package.

Abstract: An optical reader includes a mechanical scanning assembly for scanning an optical card such as an OC-ROM. The scanning assembly includes a linear LED array, a linear detector array and a carrier for moving the LED array and the detector array jointly in a linear scanning direction. When the LED array illuminates a data patch on the optical card, a bit image of the data patch is focused onto the detector array. The bit image is read out as a serial stream of data. A data patch can be randomly accessed by moving the scanning assembly to a row including the data patch and turning on an LED located over the data patch.

Abstract: A semiconductor layer is disposed on an opaque substrate, and first and second circuits are respectively disposed in the semiconductor layer or in the substrate. An optical signal path is disposed in the substrate beneath the semiconductor layer and is coupled to the first and second circuits.

Abstract: An optical memory device having at least two nonlinear optical media connected together by at least two light paths. This optical memory device can make high-speed light pulse signal processing which cannot be realized by the conventional electric switch.

Abstract: A memory device of the present invention includes a plurality of bitlines and main wordlines formed in first and second directions, respectively, to form a matrix, and a plurality of memory cells coupled to each bitline. A first decoder decodes first address signals and provides first decoded signals to the plurality of main wordlines. A second decoder decodes second address signals and provides second decoded signals. The memory device also includes n-th number of groups of drivers, and each group has a plurality of sub-drivers formed in a third direction to receive a corresponding second decoded signal. Each sub-driver has a plurality of selection lines coupled to corresponding memory cells, and a plurality of sense amplifiers is coupled to said plurality of bitlines, wherein more than two bitlines are formed between adjacent groups of drivers.

Abstract: An optical memory is disclosed in which data is stored in an optical data layer capable of selectively altering light such as by changeable transmissivity, reflectivity, polarization, and/or phase. The data is illuminated by controllable light sources and an array of multi-surface imaging lenslets project the image onto a common array of light sensors. Data is organized into a plurality of regions or patches (called pages) and by selective illumination of each data page, one of the lenslets images the selected data page onto the light sensors. Light in the data image pattern strikes different ones of the arrayed light sensors, thereby outputting a pattern of binary bits in the form of electrical data signals.

Abstract: A system for optically providing one-to-many irregular interconnections, and strength-adjustable many-to-many irregular interconnections which may be provided with strengths (weights) w.sub.ij using multiple laser beams which address multiple holograms and means for combining the beams modified by the holograms to form multiple interconnections, such as a cross-bar switching network. The optical means for interconnection is based on entering a series of complex computer-generated holograms on an electrically addressed spatial light modulator for real-time reconfigurations, thus providing flexibility for interconnection networks for large-scale practical use. By employing multiple sources and holograms, the number of interconnection patterns achieved is increased greatly.

Abstract: An opto-electronic memory system comprises a memory element (14) in which information is stored in an array of optically readable memory locations (17) and reading means comprising an electro-optic, e.g. liquid crystal, shutter arrangement (10) which is operable to scan the memory element with reading light and an array of linear light sensitive elements (18) disposed adjacent the output side of the shutter arrangement and extending in the scan direction, the light sensitive element array defining a reading surface remote from the shutter arrangement (10) on which the memory element (14) is disposed with the memory locations (17) in close proximity to the light sensitive elements (18) and being operable in a contact sensing mode to sense reading light reflected from the memory locations of the memory element according to the reflectance characteristics of the memory locations.

Abstract: This is a board to transport and convert optical outgoing free-space signals from a spatial light modulator which comprises: at least one detector to process the outgoing free-space signal; at least one signal transmitter to process the outgoing free-space signal; and at least one outgoing optical signal carrier to carry a converted outgoing signal. Other methods and devices are disclosed.

Abstract: A FIFO buffer in which respective portions are controlled in a distributed manner is provided. In the FIFO buffer, a number of loop circuits having delay elements are provided in which respective loop circuits are connected to one another in cascade manner. Additionally provided are a number of traffic control units for controlling the signal traffic between respective neighboring loop circuits. In the case where no signal is fed back to a traffic control unit from the output side and also a new signal is transmitted thereto from the input side, the traffic control unit transmits the new signal to the loop circuit which is on the output side. In the case where any signal is fed back to a traffic control unit from the output side and also a new signal is transmitted thereto from the input side, the traffic control unit again transmits the fed-back signal to the loop circuit which is on the output side and transmits the new signal to the loop circuit which is on the input side.

Abstract: The solid state memory device consists of a circuit board based system which is mounted in a 3480 type magnetic tape cartridge form factor housing to make this media physically compatible with the 3480 type magnetic tape cartridges. The interconnection of the solid state memory device with the read/write device is by an optical connections which transfer data between the solid state memory device and the associated read/write device. A plurality of batteries in the solid state memory device provide power for the memory retention capability required of the volatile solid state memory devices. The batteries are recharged by the use of a pair of power rails that are incorporated into the exterior housing of the 3480 form factor cartridge. Thus, the associated read/write device applies power to the solid state memory via these power rails when the 3480 form factor cartridge is placed in the associated read/write device.

Abstract: An electro-optic memory system includes reading means comprising a planar array of parallel linear electro-optic, e.g. LC, light shutters (16) which are illuminated with parallel light (11) and a parallel, spaced, planar array of light sensing elements, (18) e.g. thin film photodiodes, extending at right angles to the light shutters with read-out regions (20) being defined at the intersections of the shutters and sensing elements. A memory element (14) comprising a two dimensional array of memory locations in which information is stored in the form of a light transmission characteristic is disposed between the shutter and sensing element arrays with the memory locations aligned with read-out regions. Rows of memory locations are optically read, one at a time, for example in sequence, by selective operation of the light shutters by a drive circuit (42) and electrical outputs (43,45) obtained from the sensing elements (18) according to the characteristics of the corresponding row of memory locations.

Abstract: A multichip module having high density optical and electrical interconnections between integrated circuit chips. An optically transparent substrate is positioned overlying an array of integrated circuit chips mounted on a mounting substrate. The mounting substrate may include a heat sink to remove excess heat from the integrated circuit chips. The multichip module includes integrated circuit chips having optical detectors and optical transmitters to establish optical interconnections therebetween. A hologram is positioned in the optical path between the optical transmitters and the optical detectors. A planar mirror is preferably positioned opposite the hologram to direct the optical beams. The optically transparent substrate also includes an array of electrical contact pads to establish electrical connections with corresponding electrical contact pads on the underlying integrated circuit chips.

Abstract: A binary tree switching network in which the switching states are configured to switch an input signal from a selected input to an output by means of a control code set having a minimum Hamming distance (d) greater than one which eliminates cross-talk of order (d-1) and less. Such a network may be used for switching optical signals by means of optical beam deflector stages, each having a variable polarization rotator and a polarization sensitive deflector. Elimination of first order cross-talk is readily achieved by a modification stage arranged to receive a single input from the preceding stages and to pass it to the output.

Abstract: An all-optical circulating shift register encodes a received optical clock signal with a value derived from an encoded optical signal received at a control port thereof. A data input to the shift register is used to modify an encoded optical signal. The resulting encoded clock signal, appearing at an output port, is coupled back to the control port. The shift register uses the encoded clock signal at the control port to encode a subsequently-received clock signal. In one embodiment, the optical shift register is implemented using a Sagnac switch having a feedback path coupled between an output port and a control port of the Sagnac switch.

Abstract: An optical flip-flop circuit which includes an electrical power source for providing an electrical signal, a light-receiving element provided in series with the power source for switching the electrical signal in response to an optical signal, a light-emitting element for emitting the optical signal in response to the electric signal, an electrical signal path between the light-receiving element and the light-emitting element, whereby the electrical signal passes from the power source to the light-emitting element in response to the optical signal received by the light-receiving element, a light path for directing the optical signal from the light-emitting element to the light-receiving element, wherein the light path and the electrical signal path form a signal loop through which a signal circulates, said circulating signal comprising the electrical signal through the electrical signal path portion of the signal loop and the optical signal through the light path portion of the signal loop, and input/output m

Abstract: A memory card is used on a card write and/or read apparatus which has a data bus with an arbitrary bit width and writes and/or reads a datum to and/or from the memory card.

Abstract: An optical latch includes first and second optical switches arranged in series. An input signal is received in the first optical switch and is passed through to the second optical switch. The second optical switch latches-up to this received signal. Then the first optical switch is disabled to isolate the second optical switch from inputs to the first optical switch. Feedback lines from the output of the second optical switch to the input of the second optical switch ensure that the second optical switch remains latched. Switching signals are provided at appropriate timing to ensure correct operation of the optical latch.

Abstract: An optical shift register constructed from at least two optical memory cells connected in cascade, each memory cell having an optical combiner, a 1.times.2 optical switch, a clock, and an optical amplifier, all connected by optical fibers. Each memory cell in the sequence is connected to the next sequential cell by an optical fiber from its output port to the input port of the next sequential cell. The input port of the first optical memory cell serves as the input to the shift register. The output port of the last sequential optical memory cell serves as the output port of the shift register. Each cell is controlled by a clock, all clocks operating at the same rate, but each out of phase with the clock in the next sequential cell. Control signals are provided by said clocks to shift optical pulses from one cell to the next for the enter-shift-exit cycle of the shift register.

Abstract: A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon.

Abstract: A fiber optic recirculating memory comprises a splice-free length of optical fiber which forms a loop that is optically closed by means of a fiber optic coupler. The coupler couples an optical signal input pulse to the loop for circulation therein, and outputs a portion of the signal pulse on each circulation to provide a series of output pulses. A pump source is included to pump the fiber loop with a pump signal having sufficient intensity to cause stimulated Raman scattering in the fiber loop, and thereby cause amplification of the circulating signal pulse. The fiber characteristics, coupler characteristics, and pump power are selected to yield a Raman gain which compensates for the total round-trip losses in the fiber loop, so as to provide an output pulse train of constant amplitude pulses. The invention may be implemented utilizing either a standard coupler or a multiplexing coupler.

Abstract: Two electro-optical computer interface embodiments provide for one-way read only and two-way optical read and write. The two-way embodiment includes a main module having a shared memory, and a processor/controller and a main bus. A plurality of local processor modules each includes a local memory, a local processor, and a local bus. The processors are electrically joined by control conductors which provide for coordination and timing between local processors and the main processor. Each memory array has a film deposited on it by the Langmuir/Blodgett technique. The memory arrays are each illuminated by a pulsed laser or Q-switched laser. The film is responsive to the electric fields in the memory array cells for modulating the illumination light. The image is then read onto other memory arrays which are responsive to the illumination for transferring the data between memories.

Abstract: A memory is built in a tool holder to which a working tool such as drill or the like is attached. Various tool information such as kind of tool, dimensions of tool, tool use time, and the like is written into the memory. The tool holder having the memory therein is coupled with an external unit by contactless coupling means which doesn't need any electrical coupling, thereby allowing the tool information to be written into or read out of the memory. The information is transmitted between the memory in the tool holder and the external unit by way of the optical or magnetical coupling. The memory built in the tool holder consists of a non-volatile memory such that the memory content is not erased even if the power supply is shut off.

Abstract: A fiber optic recirculating memory is disclosed which utilizes a single splice-free single mode optical fiber coupled to itself to form a loop which acts as a delay line. A single signal supplied as an input to the device will result in a series of output signals identical to the input signal, although at smaller, decreasing amplitudes. In addition to being useful as a recirculating memory device for use in a system where data is generated at a rate faster than it can be accepted by a data processor, the invention may be used as a tap filter to pass a selected fundamental frequency and its harmonics, and to attenuate all other frequencies.