Abstract: A memory device includes a memory string and a control circuit coupled to the memory string. The memory string includes a top select gate, word lines, and a bottom select gate. The control circuit is configured to, in an erasing operation, apply an erasing voltage to the memory string, apply a verifying voltage to at least one word line of the word lines after applying the erasing voltage to the memory string, and apply a first turn-on voltage to the bottom select gate, before applying the verifying voltage to the at least one word line.

Abstract: An electronic control device includes: a memory that stores a plurality of divided programs obtained by dividing a program and a verification authenticator, a cryptographic operator that generates a partial authenticator for each of the plurality of divided programs in a cryptographic operation; and a verification unit that generates a operation authenticator by performing a logic operation using the plurality of partial authenticators, and verifies a falsification of the program by determining whether the verification authenticator and the operation authenticator match.

Abstract: A method of storing one or more bits of information comprising: forming a magnetic bubble; and storing a said bit of information encoded in a typology of a domain wall of said magnetic bubble. Preferably a bit is encoded using a symmetric topological state of the domain wall and a topological state including at least one winding rotation of a magnetisation vector of the domain wall. Preferably the magnetic bubble is confined in an island of magnetic material, preferably of maximum dimension less than 1 ?m.

Abstract: The present invention relates to a magnetic sensor that provides the sensitivity adjustment on a wafer and that has a superior mass productiveness and a small characteristic variation. The magnetic sensor includes a magnetic sensitive portion provided on a substrate that is made of a compound semiconductor and that has a cross-shaped pattern. This magnetic sensitive portion includes input terminals and output terminals. At least one of input terminals of the input terminal is series-connected to a trimming portion having a compound semiconductor via a connection electrode. By performing laser trimming on the trimming portion series-connected via the connection electrode to the magnetic sensitive portion while performing a wafer probing (electric test), the adjustment of the constant voltage sensitivity is provided.

Abstract: A method to measure a magnetic field is provided. The method includes applying an alternating drive current to a drive strap overlaying a magnetoresistive sensor to shift an operating point of the magnetoresistive sensor to a low noise region. An alternating magnetic drive field is generated in the magnetoresistive sensor by the alternating drive current. When the magnetic field to be measured is superimposed on the alternating magnetic drive field in the magnetoresistive sensor, the method further comprises extracting a second harmonic component of an output of the magnetoresistive sensor. The magnetic field to be measured is proportional to a signed amplitude of the extracted second harmonic component.

Abstract: A method of storing one or more bits of information comprising: forming a magnetic bubble; and storing a said bit of information encoded in a typology of a domain wall of said magnetic bubble. Preferably a bit is encoded using a symmetric topological state of the domain wall and a topological state including at least one winding rotation of a magnetisation vector of the domain wall. Preferably the magnetic bubble is confined in an island of magnetic material, preferably of maximum dimension less than 1 ?m.

Abstract: A method of storing one or more bits of information comprising: forming a magnetic bubble; and storing a said bit of information encoded in a typology of a domain wall of said magnetic bubble. Preferably a bit is encoded using a symmetric topological state of the domain wall and a topological state including at least one winding rotation of a magnetisation vector of the domain wall. Preferably the magnetic bubble is confined in an island of magnetic material, preferably of maximum dimension less than 1 ?m.

Abstract: A method of storing one or more bits of information comprising: forming a magnetic bubble; and storing a said bit of information encoded in a typology of a domain wall of said magnetic bubble. Preferably a bit is encoded using a symmetric topological state of the domain wall and a topological state including at least one winding rotation of a magnetisation vector of the domain wall. Preferably the magnetic bubble is confined in an island of magnetic material, preferably of maximum dimension less than 1 ?m.

Abstract: A storage media control circuit for controlling inputs to and outputs from a plurality of types of storage media of different shapes and specifications is equipped with detection terminals provided for respective ones of the storage media of the plurality of types in order to detect the state of connection of each storage medium, and input/output terminals for inputting data to and outputting data from a storage medium whose connection has been detected by the detection terminals. The number of input/output terminals is made equal to the number of input/output signals of whichever storage medium has the largest number of input/output signals among the storage media of the plurality of types.

Abstract: A memory device having memory cells fabricated in a substrate well is described. The memory device includes control circuitry to perform an erase operation on the memory cells and a voltage bias circuit to bias the substrate well to a positive voltage level during an erase verification operation of memory cells. The voltage bias circuit controls a discharge level of the substrate well following the erase operation to prevent the substrate well from fully discharging lower than the positive voltage level.

Abstract: An integrated circuit (10) having at least one programmable fuse (F1) and ESD circuitry (MN3, MN1) preventing the fuse (F1) from being unintentionally blown when a voltage transient exists on a main voltage potential (Vmain). The ESD circuitry preferably comprises of MOSFET switches which are coupled to turn on quicker than a main fuse programming switch (MNmain) due to the voltage transient, thereby insuring that the main switch remains off during the voltage transient to prevent the unintentional blowing of the fuse F1. The circuit is well suited for programmable logic device (PLDs), allowing for read voltages as low as 6 volts, and allowing for programming voltages as high as 40 volts.

Abstract: A symmetric magnetic tunnel device including first and second magnetic tunnel junctions each including a pinned magnetic layer, an insulating tunnel layer and a free magnetic layer stacked in parallel juxtaposition to allow tunneling of electrons through the insulating tunnel layer between the pinned and free magnetic layers. The first and second magnetic tunnel junctions positioned in parallel juxtaposition so as to form a continuous electron path through the first and second magnetic tunnel junctions and to provide a cell signal across the first and second magnetic tunnel junctions greater than a cell signal across each of the first and second magnetic tunnel junctions individually.

Abstract: A method for detecting an overvoltage signal applied to a semiconductor memory device address pin reduces stress on the device and simplifies the testing process by dividing the voltage of the overvoltage signal and comparing it to a reference voltage, thereby generating a difference signal. The difference signal is buffered by a drive stage which generates a test mode output signal that places the memory device in a test mode. An overvoltage detection circuit for implementing this method includes a comparison signal generator having a resistive voltage divider for dividing the overvoltage signal and generating a comparison signal. A differential amplifier compares the comparison signal to a reference signal from a reference signal generator. The differential amplifier generates a difference signal which is coupled to a drive stage which generates a test mode output signal. The comparison signal generator, the differential amplifier, and the drive stage can be enabled in response to a test mode enable signal.

Abstract: This invention accomplishes low power consumption by a drive circuit for a Bloch line memory, which includes a power source, a bias magnetic field coil, a plurality of switching means and means for returning the power supplied to the bias magnetic field to the power source. The present invention can set the waveform of a pulse current (coil current) to a desired waveform by particularly using a transformer, and can improve the transfer characteristics of the Both line pair.

Abstract: A method of operating a magnetic bubble memory (of the type that has a plurality of magnetic bubbles which move in a plane in response to a magnetic drive field that rotates in said plane) includes the steps of sending respective currents through a pair of field coils to produce the rotating magnetic field; generating at least one of the currents to consist of a series of positive and negative going waveforms separated by a dwell period so that the rotation of the field temporarily stops during the dwell period; and timing the dwell period to occur when the bubbles are at predetermined locations in the memory.

Abstract: A parametric bubble detector contains a coupled film sensor stripe and an excitation conductor which, electrically insulated from each other, cross at right angles. A sensor stripe consists of a pair of superpositioned Permalloy stripes which are separated by a thin nonmagnetic layer. A high frequency excitation current in the conductor produces an inductive output signal in the sensor stripe. The waveform of this periodic signal is responsive to bubble domains proximate to the sensor/conductor crossover area.

Abstract: Magnetic bubble domain memory circuit in which magnetizable overlay patterns of magnetically soft material, e.g. permalloy, are provided as bubble propagation elements on a bubble-supporting magnetic layer to define major and minor bubble propagation paths. The bubble propagation elements are arranged to form major propagation paths defining a bubble input section and a bubble output section respectively. A plurality of minor propagation paths in the form of closed storage loops defining a bubble storage section are disposed between the input and output bubble sections, being arranged in even and odd blocks of minor propagation paths. Input swap transfer gates and output replicate gates are provided between the bubble storage loops and the input and output sections respectively. The input swap transfer gates and the output replicate gates are of double level construction, each type of gate including a hairpin element at the first level and a 90.degree.

Abstract: A method for detecting the wall state of a soft bubble based upon the collapse characteristics of the bubble domain on a layer of bubble domain supporting material is described. The method includes the step of exchange coupling a magnetic layer, for example, an ion-implanted layer, to the bubble supporting layer. An in-plane field is applied to the bubble supporting layer when Bloch lines are present in the bubble domains. The bias field and the pulse field are set at a level to form a range of pulse widths which are suitable for the discrimination of soft bubble domains having different wall states. A pulse is then applied for a time sufficient to collapse only the S=1 bubble and not the S=0 bubble. Thereby this method distinguishes S=0 bubbles having one pair of winding Bloch lines from S=1 bubbles having one pair of unwinding Bloch lines. This method also distinguishes S=1 bubbles having a clockwise chirality from S=1 bubbles having a counterclockwise chirality.

Abstract: A shift register type memory having major and minor loops, wherein the number of bits of the major loop is large enough to permit data of at least two blocks to simultaneously exist in the major loop when one block is constituted of data of bits the number of which is equal to the number of the minor loops, and wherein before a particular block having been transferred out from the minor loops to the major loop is again transferred in to the minor loops after travelling round the major loop, the next block is transferred out from the minor loops to the major loop.

Abstract: A magnetic bubble information writing device capable of carrying out writing without erasing old information representing either "0" or "1" at a location, where new information is to be written, by means of only a single hairpin-like conductor loop is disclosed, in which the single hairpin-like conductor loop is disposed at a projecting portion of permalloy patterns, enclosing the portion.

Abstract: Magnetic bubble memory chips herein are characterized by circuits of permalloy and/or electrical conductors which include patterns designed to be sacrificed if electrical charges build up during processing or handling. Improved chip yield results.

Abstract: This bubble domain sensor is capable of sensing the presence or absence of a bubble at a predetermined location within bubble supporting material regardless of whether the bubble is stationary or moving through that location. A magnetostrictive material layer, such as a thin film having an area approximately equal to the area of a bubble domain, is positioned with respect to the bubble material such that it is magnetically influenced by the closure field of a bubble at the predetermined location. A conductor, such as a strip conductor, is positioned in contact with the magnetostrictive material. A sonic device launches sonic wave pulses which pass in the vicinity of the magnetostrictive material layer. The sonic wave pulse stresses the magnetostrictive material, and when the magnetostrictive material is magnetically influenced by a bubble, the stress changes or rotates its magnetization thereby inducing an electric signal in the conductor.

Abstract: Magnetic bubble domain generator and annihilator for use in a magnetic bubble domain memory device of the major-minor bubble propagation path type. The magnetic bubble domain generator and annihilator structure employs a thin metallic loop which is disposed adjacent to a bubble propagation path and is alternatively operable in both a bubble generation and bubble annihilation mode. A DC bias field is provided to the magnetic bubble domain memory circuit device and exists within the metallic loop of the bubble generator and annihilator structure. Upon applying a current pulse to the thin metallic loop from a pulse generator, the bubble generator and annihilator structure is caused to operate in one of the two possible modes. When the current pulse reduces the DC bias field below a predetermined value, the metallic loop operates as a generator to generate a magnetic bubble.

Abstract: An on-chip bubble domain circuit organization utilizing a multi-chip concept is provided. One or more storage registers are separately connected to each of a plurality of propagation channels whereby data in the form of magnetic bubble domains (bubbles) may be transferred into and out of the storage registers. Each of the propagation channels includes a generator for producing the initial bubbles which are supplied to a multiple output replicator via an input propagation path. The initial bubbles are replicated into any desired number of new bubbles by a multiple output replicator. The input propagation paths for the several channels have different lengths of propagation times between the generator and the replicator. Input decoders are utilized to determine to which storage register the bubbles from the replicators will be directed along the propagation channel. Those bubbles not selected are, typically, annihilated.

Abstract: A technique for controllably providing state conversions between bubble domains having a common winding number S is described. In particular, controlled conversions between bubble domains having winding number S=1 is achieved by the application of spatially invariant, homogeneous magnetic fields. For the conversion of .sigma. bubbles (having two vertical Bloch lines) to .chi. bubbles (having no vertical Bloch lines), an in-plane field is not required and only a time varying perpendicular z-field is used. For conversion of a .chi..sub.+ bubble to a .chi..sub.- bubble, and vice versa, a time varying field pulse is applied, there being no requirement for an in-plane magnetic field. However, for the conversion of .chi. bubbles to .sigma. bubbles, an in-plane field is used simultaneously with a time varying z-field. For all controlled conversions, the applied magnetic fields do not have spatial gradients.