Abstract: Techniques for managing secure data transfer, including firmware updates and/or cryptographic keys, may be provided. For example, a portable device may be provided that includes at least a first memory configured to store data associated with secure firmware updates while the device is interacting with a second device. In some examples, a network connection with a third device may be established. The data associated with the firmware update may be received from the third device by utilizing the established network connection. Further, in some examples, the received data may be stored in the first memory only while the first device is interacting with the second device. The portable device may also enable a firmware update of the second device based at least in part on the data stored in the first memory.

Abstract: A resistive memory cell includes a switch and a resistive switching device. The switch includes a first terminal connected to a select line and a gate terminal connected to a word line. The resistive switching device is connected between a second terminal of the switch and a bit line. The resistive switching device is resettable by having a positive bias applied to the word line and a negative bias applied to the bit line.

Abstract: Hybrid resistive memory devices and methods of operating and manufacturing the same, include at least two resistive memory units. At least one of the at least two resistive memory units is a resistive memory unit configured to operate in a long-term plasticity state.

Abstract: The present disclosure provides one embodiment of a method for operating a resistive random access memory (RRAM) cell. The method includes performing a forming operation to the RRAM cell with a forming voltage; performing a number of set/reset operation cycles to the RRAM cell; and performing a recreating process to the RRAM cell to recover RRAM resistance by applying a recreating voltage. Each of the number of set/reset operation cycles includes a set operation with a set voltage. The recreating voltage is greater than the set voltage.

Abstract: A method for the control of the magnetic states of interacting magnetic elements comprising providing a magnetic structure with a plurality of interacting magnetic elements. The magnetic structure comprises a plurality of magnetic states based on the state of each interacting magnetic element. The desired magnetic state of the magnetic structure is determined. The active resonance frequency and amplitude curve of the desired magnetic state is determined. Each magnetic element of the magnetic structure is then subjected to an alternating magnetic field or electrical current having a frequency and amplitude below the active resonance frequency and amplitude curve of said desired magnetic state and above the active resonance frequency and amplitude curve of the current state of the magnetic structure until the magnetic state of the magnetic structure is at the desired magnetic state.

Abstract: A variable resistance memory device has memory cells that are operated by Joule's heat and which are highly thermally efficient. Conductive patterns are formed on a substrate; sacrificial patterns exposing a portion of the top surface of each of the conductive patterns are formed on the conductive patterns, lower electrodes are formed by etching upper portions of the conductive patterns using the sacrificial patterns as an etching mask, then mold patterns are formed on the lower electrodes and cover exposed sidewall surfaces of the sacrificial patterns, and then the sacrificial patterns are replaced with variable resistance patterns.

Abstract: A magnetic device includes a magnetic layer having a variable direction of magnetization, and a first antiferromagnetic layer in contact with the magnetic layer, the first antiferromagnetic layer being able to trap the direction of magnetization of the magnetic layer. The magnetic device also includes a layer made of a ferromagnetic material in contact with the first antiferromagnetic layer through its face opposite to the magnetic layer, the directions of magnetization of the magnetic and ferromagnetic layers being substantially perpendicular. A first layer among the magnetic and ferromagnetic layers has a magnetization, the direction of which is oriented in the plane of the first layer whereas the second of the two layers among the magnetic and ferromagnetic layers has a magnetization, the direction of which is oriented outside of the plane of the second layer.

Abstract: A magnetic detecting element includes a laminated structure where a fixed magnetic layer and a free magnetic layer are laminated through a non-magnetic material layer, wherein the fixed magnetic layer is a self-pinned type where a first magnetic layer and a second magnetic layer are laminated through a non-magnetic intermediate layer and the first magnetic layer and the second magnetic layer are antiparallelly magnetization-fixed, and the second magnetic layer is in contact with the non-magnetic material layer. The first magnetic layer is formed using FeCo serving as a material having a higher coercive force than the second magnetic layer. The film thickness of the first magnetic layer falls within a range greater than or equal to 10 ? and less than or equal to 17 ?, and is thinner than the film thickness of the second magnetic layer. The non-magnetic intermediate layer is formed using Rh.

Abstract: Hydro-carbon nanorings may be used in storage. Sufficiently cooled, an externally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of electrons. Similarly, an internally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of positrons. When matched streams of positrons and electrons are sufficiently compressed they may form Cooper pairs with magnetic moments aligned to the movement of the stream. Matched adjacent Cooper pairs of electrons and positrons may contain information within their magnetic moments, and as such, may transmit and store information with little or no energy loss.

Abstract: A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured.

Abstract: A magnetic random access memory (MRAM) cell including a magnetic tunnel junction including a tunnel barrier layer between a first magnetic layer having a first magnetization direction, and a second magnetic layer having a second adjustable magnetization to vary a junction resistance of the magnetic tunnel junction from a first to a second junction resistance level; said magnetic tunnel junction further including a switching resistant element electrically connected to the magnetic tunnel junction and having a switching resistance switchable from a first to a second switching resistance level when a switching current is passed through the switching resistant element, such that a resistance of the MRAM cell can have at least four different cell resistance levels depending of the resistance level of the junction resistance and the switching resistance. The disclosed MRAM cell achieves improved read margin and allows for writing at least four different cell resistance levels.

Abstract: Provided is a spin valve element capable of performing multi-value recording, which includes a pair of ferromagnetic layers having different coercivities from each other, and sandwiching an insulating layer or a non-magnetic layer. The ferromagnetic layer having the smaller coercivity has a substantially circular in-plane profile, and a plurality of island-shaped non-magnetic portions IN, IE, IW, and IS are included. In addition, a storage device is manufactured by using such a spin valve element.

Abstract: A memory array includes a plurality of magneto-resistive changing memory cells. Each resistive changing memory cell is electrically between a source line and a bit line and a transistor electrically between the resistive changing memory cell and the bit line. The transistor has a gate electrically between a source region and a drain region and the source region being electrically between the r magneto-resistive changing memory cell and the gate. A word line is electrically coupled to the gate. A bit line charge accumulation sensing for magneto-resistive changing memory is also disclosed.

Abstract: A method of adjusting a resistive change element using a reference is disclosed. The method comprises inspecting a resistive change element to determine a first state; comparing the first state to a reference wherein said reference provides stimulus parameters corresponding to a transition from the first state to a second state; and applying the stimulus parameters to the resistive change element. A resistive change memory cell array is also disclosed.

Abstract: A nonvolatile semiconductor memory device according to an embodiment includes a memory cell array configured by plural memory cells each including a variable resistor and each provided between first and second lines. A control circuit applies to a memory cell through the first and second lines a writing voltage for writing data or a reading voltage for reading data. A sense amplifier circuit senses data retained in a memory cell based on a current flowing through the first line. In a data writing operation, the control circuit applies a writing voltage to each of n number of memory cells configuring one unit such that the memory cells may be supplied with different resistance values. In a data reading operation, the sense amplifier circuit compares level relationship of the resistance values of n number of memory cells configuring one unit and reads out n! patterns of data from the one unit.

Abstract: A semiconductor memory device with a variable resistance element includes a plurality of active areas isolated from one another by an isolation layer formed in a substrate, a plurality of word lines crossing over the plurality of active areas, an auxiliary source line disposed between two selected word lines and commonly connected to at least two active areas among the plurality of active areas between the two selected word lines, and a plurality of contact plugs each connected to a corresponding active area.

Abstract: A programmable memory array is disclosed in which the phase change memory cells are self-aligned at the access devices and at the cross-points of the bit lines and the word lines. A method for making the array employs one line mask to define the bit lines and another line mask to define the word lines. The front end of line (FEOL) memory cell elements are in the same layer as the polysilicon gates. The bit lines and the word lines intersect over the devices, and the memory cell elements are formed at the intersections of the bit lines and the word line.

Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer has a magnetic anisotropy, at least a portion of which is a biaxial anisotropy. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

Abstract: A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0<x?0.

Abstract: A memory device is described that comprises a plurality of bit lines and an array of vertical transistors arranged on the plurality of bit lines. A plurality of word lines is formed along rows of vertical transistors in the array which comprise thin film sidewalls of word line material and arranged so that the thin film sidewalls merge in the row direction, and do not merge in the column direction, to form word lines. The word lines provide “surrounding gate” structures for embodiments in which the vertical transistors are field effect transistors. Memory elements are formed in electrical communication with the vertical transistors. A fully self-aligned process is provided in which the word lines and memory elements are aligned with the vertical transistors without additional patterning steps.

Abstract: A semiconductor memory device comprises a memory cell, first and second voltage generating circuits generating first and second voltages, and a control circuit. A memory element and a diode included in the memory cell are connected in series between first and second lines. The first voltage has no temperature dependence, and the second voltage has a temperature dependence opposite to that of a forward voltage of the diode. The control circuit detects a resistance state of the memory element in accordance with a change in current flowing in the memory cell in a state where the first/second voltage is applied to the first/second in a read operation of the memory cell.

Abstract: A memory array includes a plurality of magneto-resistive changing memory cells. Each resistive changing memory cell is electrically between a source line and a bit line and a transistor electrically between the resistive changing memory cell and the bit line. The transistor has a gate electrically between a source region and a drain region and the source region being electrically between the magneto-resistive changing memory cell and the gate. A word line is electrically coupled to the gate. A bit line charge accumulation sensing for magneto-resistive changing memory is also disclosed.

Abstract: A semiconductor memory according to an aspect of the invention including first and second bit lines, a word line, a resistive memory element which has one end and the other end, the one end being connected with the first bit line, a selective switch element which has a current path and a control terminal, one end of the current path being connected with the other end of the resistive memory element, the other end of the current path being connected with the second bit line, the control terminal being connected with the word line, a first column switch connected with the first bit line, a second column switch connected with the second bit line, wherein the first and second bit lines is activated and then the word line is activated when starting writing or reading data with respect to the resistive memory element.

Abstract: A method and structure of a bistable resistance random access memory comprise a plurality of programmable resistance random access memory cells where each programmable resistance random access memory cell includes multiple memory members for performing multiple bits for each memory cell. The bistable RRAM includes a first resistance random access member connected to a second resistance random access member through interconnect metal liners and metal oxide strips. The first resistance random access member has a first resistance value Ra, which is determined from the thickness of the first resistance random access member based on the deposition of the first resistance random access member. The second resistance random access member has a second resistance value Rb, which is determined from the thickness of the second resistance random access member based on the deposition of the second resistance random access member.

Abstract: A resistive memory device includes: a storage element; a first line and a second line; a first drive controller; and a second drive controller.

Abstract: An inadvertent write can be prevented when a read is performed. The duration of the write current pulse for writing information in the magnetic memory layer is longer than the duration of the read current pulse for reading the information from the magnetic memory layer.

Abstract: A magnetoresistance effect element according to the present invention comprises a magnetization free layer 1 and a magnetization fixed layer 3 connected to the magnetization free layer 1 through a nonmagnetic layer 2. The magnetization free layer 1 includes a magnetization switching region 13, a first magnetization fixed region 11 and a second magnetization fixed region 12. The magnetization switching region 13 having reversible magnetization overlaps with the magnetization fixed layer 3. The first magnetization fixed region 11 having first fixed magnetization is connected to one end 13a of the magnetization switching region 13. The second magnetization fixed region 12 having second fixed magnetization is connected to the other end 13b of the magnetization switching region 13. The first magnetization fixed region 11 and the magnetization switching region 13 form a three-way intersection, and the second magnetization fixed region 12 and the magnetization switching region 13 form another three-way intersection.

Abstract: An inadvertent write can be prevented when a read is performed. The duration of the write current pulse for writing information in the magnetic memory layer is longer than the duration of the read current pulse for reading the information from the magnetic memory layer.

Abstract: A bistable resistance random access memory comprises a plurality of programmable resistance random access memory cells where each programmable resistance random access memory cell includes multiple memory members for performing multiple bits for each memory cell. The bistable RRAM includes a first resistance random access member connected to a second resistance random access member through interconnect metal liners and metal oxide strips. The first resistance random access member has a first resistance value Ra, which is determined from the thickness of the first resistance random access member based on the deposition of the first resistance random access member. The second resistance random access member has a second resistance value Rb, which is determined from the thickness of the second resistance random access member based on the deposition of the second resistance random access member.

Abstract: A word line driver and decoder for use in a magnetic memory includes a main word line driver and a sub word line driver that cooperate to drive current on a selected one from a number of the magnetic memory's word lines. The main word line driver and sub word line driver employ pull up and pull down transistors that configured to drive current on the selected word line in either a read or write ‘0’ direction or a read or write ‘1’ direction in response to control signals that allow reliable magnetic memory operation. An address decoder selects and activates a multiplexer in the sub word line driver to coordinate the current drive. The main word line driver employs current mirrors, transistor switches, and logic control to prevent direct Vdd to Vss shorting in transitioning from ‘0’ and ‘1’, and read and write data storage operations.

Abstract: A magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layers.

Abstract: A method for manipulating a quantum system comprises at least one mobile charge carrier with a magnetic moment. The method comprises the steps or acts of applying magnetic field to the charge carrier. The magnetic is spatially non-homogeneous. The method also comprises bringing the charge carrier into an oscillatory movement along a path. The magnetic field depends on the position of the charge carrier on said path. The oscillatory movement may be caused by electrostatic interaction with gate electrodes. Due to this approach, thus, in a magnetic moment resonance process the conventional oscillating magnetic field is replaced by an oscillating electric field which is locally transformed into a magnetic field by the Coulomb interaction that displaces the charge carrier wave function within an inhomogeneous magnetic field or in and out of a magnetic field.

Abstract: During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Abstract: A magnetic storage element and a recording method using the same capable of ensuring correct information recording without causing erroneous writing are proposed. A magnetic storage device having the magnetic storage elements incorporated therein, and being capable of recording information in a stable and correct manner even if the magnetic characteristics vary from the element to element is also proposed. The magnetic storage element comprises a storage layer, magnetic field applying means for applying magnetic field to the storage layer, and a magnetic field shield, disposed between the magnetic field application means and the storage layer, comprising a soft magnetic material, for shielding at least a part of the magnetic field. Recording to the magnetic storage element is made effective by applying a magnetic field to the storage layer while heating the magnetic field shield to thereby allow it to reduce or lose its magnetization.

Abstract: A magnetic memory includes a magnetic substance composed of a disc-shaped first magnetic layer and a ring-shaped second magnetic layer which is formed on the first magnetic layer.

Abstract: A method and system for providing magnetic memory are disclosed. The method and system include providing a plurality of magnetic memory elements and providing at least one wrapped write line. Each wrapped write line includes a bottom write line and a top write line electrically connected to the bottom write line. The bottom write line resides below a portion of the plurality of magnetic elements, while the top write resides above the portion of the plurality of magnetic elements. The bottom write line carries a first current in a first direction, while the top write line carries a second current in a second direction opposite to the first direction.

Abstract: A thin film magnetic memory device includes an antenna section transmitting and receiving a radio wave to an from an outside of the thin film magnetic memory device. An inductance wiring constituting the antenna section has a metal wiring, and a magnetic film formed to correspond to a lower surface portion of the metal wiring or lower surface and side surface portions of the metal wiring. The magnetic film is formed in an original manufacturing step of the thin film magnetic memory device without providing a dedicated manufacturing step.

Abstract: During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Abstract: A Hall effect ferromagnetic non-volatile random access memory cell comprising a Hall effect sensor adjacent to a ferromagnetic bit which is surrounded by a drive coil. The coil is electrically connected to a drive circuit, and when provided with an appropriate current creates a residual magnetic field in the ferromagnetic bit, the polarity of which determines the memory status of the cell. The Hall effect sensor is electrically connected via four conductors to a voltage source, ground, and two read sense comparator lines for comparing the voltage output to determine the memory status of the cell. The read and write circuits are arranged in a matrix of bit columns and byte rows. A method for manufacturing said Hall effect ferromagnetic non-volatile random access memory cell.

Abstract: A micro magnetic core memory having a magnetic core, which serves as a storage medium, a coil, which is located in close vicinity to the magnetic core and magnetizes the magnetic core, and a sensor, which is located in close vicinity to the magnetic core and detects polarity of magnetization of the magnetic core. The micro magnetic core memory has the effects in that the inputting and the outputting of information can be carried out quickly, in that a high degree of integration can be achieved easily and a storage device having a large capacity can be produced at a low cost, and in that the stored information is not lost when the supply of electric power is turned off.

Abstract: A magnetic memory cell including a data storage layer having an easy axis and a reference layer having an orientation of magnetization which is pinned in a direction that is off-axis with respect to the easy axis. This structure increases the signal obtainable during read operation on the magnetic memory cell notwithstanding the effects of magnetizations in the edge domains of the data storage layer. In addition, this structure allows high MRAM densities to be achieved using square-shaped memory cell structures.

Abstract: A non-physical movement component recording and reproducing device produces a pair of special waves with special waveforms that form a special stationary waveform. An electrically-conducting media contains three overlaid layers, a first layer contains the special stationary waveform, a middle layer allows signals to be recorded or be reproduced therein, and a third layer allows the signals to be connected. Two diodes are connected in reverse polarity to the third layer wherein one diode is used for recording and reproducing signals, while the other diode is used for erasing unused signals during the recording process. The bias voltage of the diodes is bigger than the peak value of the special waveform, but less than the maximum peak value of the special stationary waveform. The control unit changes at least one of the intermittence length and the phase of the special waves.

Abstract: A magnetic bubble memory herein includes a direct propagation path between a bubble generator and a detector. A control circuit is adapted to store indications of the current state of the memory and the address of presently accessed data in the path responsive to a power failure signal. Portions of the memory are organized in a familiar major, minor mode, data from two major loops being replicated into the direct path.The arrangement exhibits improved access times, improved data rates and is secure from power failure problems. Moreover, the memory organization permits the realization of large capacity chips without requiring block replication.