Thin Film Patents (Class 365/87)
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Patent number: 11430498Abstract: The present invention provides a magnetoresistance effect element with a high read operation speed, a magnetic memory array, a magnetic memory device, and a write method for a magnetoresistance effect element.Type: GrantFiled: April 10, 2019Date of Patent: August 30, 2022Assignee: TOHOKU UNIVERSITYInventors: Yoshiaki Saito, Shoji Ikeda, Tetsuo Endoh
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Patent number: 11120763Abstract: A display pane, a gate driving method and a display device are provided. The display panel comprises a pixel driving circuit in a display area and a gate driving circuit in a non-display area. The gate driving circuit is electrically connected to a first voltage end and a second voltage end. The first voltage end is configured to turn off a driving transistor of the pixel driving circuit electrically connected to an output end of the gate driving circuit. The second voltage end is configured to turn off an output transistor of the gate driving circuit to suppress the gate voltage shift of the driving transistor in the pixel driving circuit such that the reliability of the driving transistor and the fault tolerance of the display panel could be raised.Type: GrantFiled: July 23, 2020Date of Patent: September 14, 2021Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Jian Tao
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Patent number: 10964279Abstract: A display driver includes an amplifier circuit configured to output time-sequentially arrayed first to n-th data voltages to an image-signal input terminal, and a switch-control-signal output circuit configured to output switch control signals that control the first to n-th switches disposed between the image-signal input terminal and respective first to n-th data lines. The switch-control-signal output circuit outputs the switch control signals that turn on two or more switches including a p-th switch (where p is an integer within the range of 2 to n, inclusive) among the first to n-th switches during a first driving period. The amplifier circuit outputs a p-th data voltage among the first to n-th data voltages during the first driving period.Type: GrantFiled: January 22, 2019Date of Patent: March 30, 2021Assignee: SEIKO EPSON CORPORATIONInventor: Ryota Bansho
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Patent number: 10290247Abstract: The disclosure discloses a lighting jig of a display panel and a lighting test method. The lighting jig includes a signal generator configured to generate a plurality of control signals and a first digital signal, a controller connected with the signal generator and configured to light up subpixels corresponding to the control signals of corresponding rows in the display panel when an effective signal of the control signals and an effective signal of the first digital signal work simultaneously. The plurality of control signals are corresponding to the plurality of subpixels in each column of pixels respectively. In each period, temporal positions of the effective signal of the control signals corresponding to the subpixels required to be lit on and the effective signal of the first digital signal are identical. The sequence design of adopting special control signals and digital signals can prevent mischarging other subpixels during digital signal delay.Type: GrantFiled: May 12, 2017Date of Patent: May 14, 2019Assignee: Wuhan China Star Optoelectronics Technology Co., LtdInventor: Liang Ma
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Patent number: 9779835Abstract: According to one embodiment, a magnetic memory device includes an element unit and a controller. The element unit includes a magnetic member, a first magnetic layer, a second magnetic layer, an intermediate layer, and a non-magnetic layer. The magnetic member includes a first region, a first portion, and a second portion. The first region is provided between the first portion and the second portion, or included in the first portion. The first magnetic layer is apart from the first region in a first direction. The second magnetic layer is provided between the first region and the first magnetic layer. The intermediate layer is provided between the first magnetic layer and the second magnetic layer. The intermediate layer is non-magnetic. The non-magnetic layer is connected with the first region. The controller is configured to supply a writing current and a shift current to the element unit.Type: GrantFiled: February 22, 2017Date of Patent: October 3, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Michael Arnaud Quinsat, Takuya Shimada, Hirofumi Morise, Masaki Kado, Yasuaki Ootera, Tsuyoshi Kondo, Shiho Nakamura
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Patent number: 9123878Abstract: A magnetic memory device includes a magnetic thin wire including magnetic domains along a direction in which the magnetic thin wire extends. Magnetization directions of the magnetic domains are variable. A magnetic tunnel junction (MTJ) structure includes a pinned layer with a fixed magnetization direction and an insulator, and makes an MTJ including the pinned layer and insulator and a magnetic domain in the magnetic thin wire in a first position to sandwich the insulator with pinned layer. First and second electrodes are at both ends of the magnetic thin wire. At least one third electrode is coupled to the magnetic thin wire between the first and second electrodes.Type: GrantFiled: January 15, 2014Date of Patent: September 1, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yoshihisa Iwata, Yoshiaki Osada, Sumiko Domae
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Patent number: 8995163Abstract: A magnetic memory according to an embodiment includes: a magnetic layer including a plurality of magnetic domains and a plurality of domain walls, and extending in a direction; a pinning layer formed with nonmagnetic phases and magnetic phases, extending in an extending direction of the magnetic layer and being located adjacent to the magnetic layer; an electrode layer located on the opposite side of the pinning layer from the magnetic layer; an insulating layer located between the pinning layer and the electrode layer; a current introducing unit flowing a shift current to the magnetic layer, the shift current causing the domain walls to shift; a write unit writing information into the magnetic layer; a read unit reading information from the magnetic layer; and a voltage generating unit generating a voltage to be applied between the pinning layer and the electrode layer.Type: GrantFiled: February 7, 2013Date of Patent: March 31, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Shiho Nakamura, Hirofumi Morise, Tsuyoshi Kondo
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Patent number: 8767432Abstract: An apparatus for applying Oersted fields to a magnetic memory device comprises a first metal layer; a first insulating layer positioned on the first metal layer; a magnetic shift register wire positioned on the first insulating layer; a second insulating layer positioned on the magnetic shift register wire; a second metal layer positioned on the second insulating layer; a first conducting wire positioned in the first metal layer and extending transverse to the magnetic shift register wire; and a second conducting wire positioned in the second metal layer and extending transverse to the magnetic shift register wire. The first conducting wire is offset relative to the second conducting wire, the offset being defined by a distance between a first axis normal to the magnetic shift register wire and through the first conducting wire and a second axis normal to the magnetic shift register wire and through the second conducting wire.Type: GrantFiled: December 11, 2012Date of Patent: July 1, 2014Assignee: International Business Machines CorporationInventors: Anthony J. Annunziata, Michael C. Gaidis, Luc Thomas
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Publication number: 20140160829Abstract: An apparatus for applying Oersted fields to a magnetic memory device comprises a first metal layer; a first insulating layer positioned on the first metal layer; a magnetic shift register wire positioned on the first insulating layer; a second insulating layer positioned on the magnetic shift register wire; a second metal layer positioned on the second insulating layer; a first conducting wire positioned in the first metal layer and extending transverse to the magnetic shift register wire; and a second conducting wire positioned in the second metal layer and extending transverse to the magnetic shift register wire. The first conducting wire is offset relative to the second conducting wire, the offset being defined by a distance between a first axis normal to the magnetic shift register wire and through the first conducting wire and a second axis normal to the magnetic shift register wire and through the second conducting wire.Type: ApplicationFiled: December 11, 2012Publication date: June 12, 2014Applicant: International Business Machines CorporationInventors: Anthony J. Annunziata, Michael C. Gaidis, Luc Thomas
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Patent number: 8750013Abstract: Methods for writing include applying a current pulse to a racetrack memory medium to position a domain in proximity to a thermally triggered magnon source in contact with the racetrack memory medium; activating a heat source/sink in contact with the magnon source to create a thermal gradient in the magnon source, generating a magnon flow in the magnon source; and changing a magnetization in the racetrack memory medium by spin torque transfer from the magnon flow.Type: GrantFiled: August 16, 2013Date of Patent: June 10, 2014Assignee: International Business Machines CorporationInventors: David W. Abraham, Anthony J. Annunziata
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Patent number: 8750012Abstract: Racetrack memory units and methods for writing include a racetrack memory medium; a heat source/sink configured to change temperature according to an applied current; and a magnon source material in contact with the racetrack memory medium and the heat source/sink, such that a temperature of the heat source/sink causes a magnon flow in the magnon source material that injects a domain wall in the racetrack memory medium.Type: GrantFiled: January 4, 2013Date of Patent: June 10, 2014Assignee: International Business Machines CorporationInventors: David W. Abraham, Anthony J. Annunziata
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Patent number: 8743584Abstract: A shift register memory according to the present embodiment includes a magnetic pillar including a plurality of magnetic layers and a plurality of nonmagnetic layers provided between the magnetic layers adjacent to each other. A stress application part applies a stress to the magnetic pillar. A magnetic-field application part applies a static magnetic field to the magnetic pillar. The stress application part applies the stress to the magnetic pillar in order to transfer magnetization states of the magnetic layers in a stacking direction of the magnetic layers.Type: GrantFiled: August 30, 2012Date of Patent: June 3, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiaki Fukuzumi, Hideaki Aochi
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Patent number: 8687414Abstract: A magnetic memory cell includes: a magnetization recording layer; and a magnetic tunneling junction section. The magnetization recording layer includes a ferromagnetic layer with perpendicular magnetic anisotropy. The magnetic tunneling junction section is used for reading information in the magnetization recording layer. The magnetization recording layer includes two domain wall moving areas.Type: GrantFiled: December 24, 2009Date of Patent: April 1, 2014Assignee: NEC CorporationInventors: Kiyokazu Nagahara, Shunsuke Fukami, Nobuyuki Ishiwata, Tetsuhiro Suzuki, Norikazu Ohshima
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Patent number: 8614014Abstract: A magnetic memory device includes a track in which different non-magnetic layers are respectively formed on upper and lower surfaces of a magnetic layer. One of the two non-magnetic layers includes an element having an atomic number greater than or equal to 12. Accordingly, the magnetic layer has a relatively high non-adiabaticity (?).Type: GrantFiled: April 6, 2010Date of Patent: December 24, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Jin-seong Heo, Ji-young Bae
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Patent number: 8574730Abstract: Information storage devices and methods of manufacturing the same are provided. A magnetic track of the information storage device includes a magnetic layer in which at least one magnetic domain forming region and at least one magnetic domain wall forming region are alternately disposed in a lengthwise direction. The at least one magnetic domain forming regions has a different magnetic anisotropic energy relative to the at least one magnetic domain wall forming region. An intermediate layer is formed under the magnetic layer. The intermediate layer includes at least one first material region and at least one second material region. Each of the at least one first material regions and the at least one second material regions corresponds to one of the at least one magnetic domain forming regions and the at least one magnetic domain wall forming regions.Type: GrantFiled: June 11, 2008Date of Patent: November 5, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Young-jin Cho, Sung-chul Lee, Kwang-seok Kim, Ji-young Bae, Sun-ae Seo, Chang-won Lee
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Patent number: 8406029Abstract: In a memory device and in a method for controlling a memory device, the memory device comprises a magnetic structure that stores information in a plurality of domains of the magnetic structure. A read unit reads information from at least one of the plurality of domains of the magnetic structure by applying a read current to the magnetic structure. A position detector unit compares the information read by a read current from the read unit from multiple domains of the plurality of domains of the magnetic structure to identify the presence of an expected information pattern at select domains of the plurality of domains.Type: GrantFiled: February 16, 2010Date of Patent: March 26, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Ho-jung Kim, Chul-woo Park, Sang-beom Kang, Jong-wan Kim, Hyun-ho Choi, Young-pil Kim, Sung-chul Lee
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Patent number: 8345473Abstract: The present invention uses a ferromagnetic thin wire having a domain wall inside, with the magnetic moment at the center thereof being perpendicular to the longitudinal axis of the thin wire. With the domain wall being fixed by a domain wall fixation device (e.g. antiferromagnetic thin wires) so that the domain wall is prevented from moving in the ferromagnetic thin wire, when a direct current is supplied, the magnetic moment rotates in the immobilized domain wall. This rotation of the moment can be detected by a TMR element or the like. This configuration of the ferromagnetic thin wire element can be directly used to create a microwave oscillator or magnetic memory.Type: GrantFiled: April 21, 2008Date of Patent: January 1, 2013Assignees: Kyoto University, University of Electro-CommunicationsInventors: Teruo Ono, Yoshinobu Nakatani
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Patent number: 8339829Abstract: An information storage device using movement of magnetic domain walls includes a writing magnetic layer having a magnetic domain wall. A stack structure is formed on the writing magnetic layer. The stack structure includes a connecting magnetic layer and an information storing magnetic layer stacked sequentially. The information storage device also includes a reader for reading information stored in the information storing magnetic layer.Type: GrantFiled: April 25, 2011Date of Patent: December 25, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Chee-kheng Lim, Eun-hyoung Cho, Sung-hoon Choa
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Patent number: 8313847Abstract: Information storage devices are provided. An information storage device includes a track including at least one Co alloy layer and a soft magnetic layer. The track further includes a plurality of magnetic domains. A current applying element is connected to the track. The track includes a plurality of layers stacked alternately.Type: GrantFiled: June 12, 2008Date of Patent: November 20, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Young-jin Cho, Ji-young Bae, Sung-chul Lee
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Patent number: 8231987Abstract: Example embodiments may provide data storage devices using movement of magnetic domain walls including a first magnetic layer having at least two magnetic domains with determinable magnetization directions, and/or a soft second magnetic layer formed on a lower surface of the first magnetic layer. Magnetic domain walls may be moved even in curved regions of the first magnetic layer.Type: GrantFiled: December 11, 2007Date of Patent: July 31, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Chee-kheng Lim
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Patent number: 8218358Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.Type: GrantFiled: August 5, 2010Date of Patent: July 10, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Ryota Katsumata, Hideaki Aochi, Hiroyasu Tanaka, Masaru Kito, Yoshiaki Fukuzumi, Masaru Kidoh, Yosuke Komori, Megumi Ishiduki, Junya Matsunami, Tomoko Fujiwara, Ryouhei Kirisawa, Yoshimasa Mikajiri, Shigeto Oota
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Patent number: 8194430Abstract: An information storage device includes a magnetic layer and a supply unit. The magnetic layer includes a plurality of regions, a first region having a first magnetic anisotropic energy and a second region having a second magnetic anisotropic energy. The first and second regions are arranged alternately, and the second region is doped with impurity ions. The second magnetic anisotropic energy is less than the first magnetic anisotropic energy. The supply unit applies energy to the magnetic layer for moving magnetic domain walls within the magnetic layer.Type: GrantFiled: October 31, 2007Date of Patent: June 5, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Chee-kheng Lim
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Patent number: 8189371Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array includes a stacked body, a through-hole, a semiconductor pillar, and a charge storage film. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. The through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in the through-hole. The charge storage film is provided between the electrode films and the semiconductor pillar. Memory cells are formed at each intersection between the electrode films and the semiconductor pillar.Type: GrantFiled: August 5, 2010Date of Patent: May 29, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Ryota Katsumata, Hideaki Aochi, Hiroyasu Tanaka, Masaru Kito, Yoshiaki Fukuzumi, Masaru Kidoh, Yosuke Komori, Megumi Ishiduki, Junya Matsunami, Tomoko Fujiwara, Ryouhei Kirisawa, Yoshimasa Mikajiri, Shigeto Oota
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Patent number: 8102691Abstract: Magnetic shift registers in which data writing and reading is accomplished by moving the magnetic domain walls by electric current. Various embodiments of domain wall nodes or anchors that stabilize a domain wall are provided. In some embodiments, the wall anchors are elements separate from the magnetic track. In other embodiments, the wall anchors are disturbances in the physical configuration of the magnetic track. In still other embodiments, the wall anchors are disturbances in the material of the magnetic track.Type: GrantFiled: June 24, 2008Date of Patent: January 24, 2012Assignee: Seagate Technology LLCInventors: Haiwen Xi, Xiaobin Wang, Dimitar V. Dimitrov, Paul E. Anderson, Harry Liu, Song S. Xue, Andreas Roelofs, Markus Siegert
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Patent number: 8023305Abstract: A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a single write wire having a longitudinal axis substantially orthogonal to a longitudinal axis of each of the coplanar shift register structures.Type: GrantFiled: June 10, 2008Date of Patent: September 20, 2011Assignee: International Business Machines CorporationInventors: Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, John K. DeBrosse, Louis L. C. Hsu, Carl Radens, Keith Kwong-Hon Wong, Chih-Chao Yang
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Patent number: 8009453Abstract: A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a write wire having a constriction therein, the constriction located at a point corresponding to the location of the plurality of discontinuities in the associated shift register structure.Type: GrantFiled: June 10, 2008Date of Patent: August 30, 2011Assignee: International Business Machines CorporationInventors: Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, John K. DeBrosse, Louis L. C. Hsu, Carl Radens, Keith Kwong-Hon Wong, Chih-Chao Yang
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Patent number: 7969762Abstract: The general field of the invention is that of spintronics, namely the field of electronics using the magnetic spin properties of electrons. The main fields of application are the very large-scale magnetic storage of information and the measurement of local magnetic fields. The object of the invention is to considerably reduce the energy needed to reverse the magnetic domains of the ferromagnetic elements of submicron dimensions using the mechanism of the domain wall displacements that is induced either by just a current of spin-polarized carriers or by the combination of a current of spin-polarized carriers and a magnetic field, at least one of these being variable. This domain wall displacement results in a change of magnetic polarization in a specified switching zone. Several devices according to the invention are described that possess from one switching zone up to a plurality of switching zones according to the invention.Type: GrantFiled: December 14, 2005Date of Patent: June 28, 2011Assignee: ThalesInventors: Vincent Cros, Julie Grollier, Manuel Munoz Sanchez, Albert Fert, Frederic Nguyen Van Dau
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Patent number: 7965535Abstract: An electrode master for ferroelectric recording records information on a ferroelectric recording medium in which the direction of polarization of a ferroelectric material has been unified in one direction by applying a voltage thereto, based on the direction of polarization of the ferroelectric material, by applying voltage pulses to the ferroelectric recording medium. The electrode master includes an electroconductive base material; a plurality of electrode convexes provided on a surface of the electroconductive base material so as to correspond to information to be recorded on the ferroelectric recording medium; and an electrode terminal conducted to each of the electrode convexes and provided on the electroconductive base material.Type: GrantFiled: March 27, 2009Date of Patent: June 21, 2011Assignee: Fujifilm CorporationInventor: Makoto Nagao
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Patent number: 7957175Abstract: An information storage device using movement of magnetic domain walls includes a writing magnetic layer having a magnetic domain wall. A stack structure is formed on the writing magnetic layer. The stack structure includes a connecting magnetic layer and an information storing magnetic layer stacked sequentially. The information storage device also includes a reader for reading information stored in the information storing magnetic layer.Type: GrantFiled: October 31, 2007Date of Patent: June 7, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Chee-kheng Lim, Eun-hyoung Cho, Sung-hoon Choa
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Patent number: 7952906Abstract: An information storage device includes a writing magnetic layer including a magnetic domain wall. An information storing magnetic layer is connected to the writing magnetic layer, and includes at least one magnetic domain wall. The information storage device also includes a reader for reading data recorded in the information storing magnetic layer. The connection layer includes a first portion with a first width adjacent to the writing magnetic layer and a second portion with a second width adjacent to the at least one information storing magnetic layer. The first width is less than the second width.Type: GrantFiled: October 31, 2007Date of Patent: May 31, 2011Assignee: Samsung Electronics Co., Ltd.Inventor: Chee-kheng Lim
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Patent number: 7924593Abstract: Provided are an information storage device and a method of operating the same. The information storage device includes: a magnetic layer having a plurality of magnetic domain regions and a magnetic domain wall interposed between the magnetic domain regions; a first unit disposed on a first region which is one of the plurality of magnetic domain regions for recording information to the first region; a second unit connected to the first unit for inducing a magnetic field so as to record information to the first region.Type: GrantFiled: September 22, 2008Date of Patent: April 12, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Ji-young Bae
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Patent number: 7910232Abstract: Information storage devices and methods of manufacturing the same are provided. An information storage device includes a magnetic layer formed on an underlayer. The underlayer has at least one first region and at least one second region. The first and second regions have different crystallinity characteristics. The magnetic layer has at least one third region formed on the at least one first region and at least one fourth region formed on the at least one second region. The third and fourth regions have different magnetic anisotropic energy constants.Type: GrantFiled: May 6, 2008Date of Patent: March 22, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Chang-won Lee
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Patent number: 7897200Abstract: The present invention provides a ferromagnetic/antiferromagnetic coupling film structure and a fabrication method thereof. The structure includes an antiferromagnetic layer of cobalt oxide having a thickness of 2 to 15 monolayers and formed on a substrate at a temperature ranging from 700K to 900K; and a ferromagnetic layer of cobalt having a thickness of at least one monolayer for being formed on the antiferromagnetic layer of cobalt oxide.Type: GrantFiled: July 31, 2008Date of Patent: March 1, 2011Assignee: National Chung Cheng UniversityInventors: Jyh-Shen Tsay, Chi-Wei Lee, Gung Chern
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Patent number: 7889533Abstract: A semiconductor device using a magnetic domain wall movement and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a magnetic layer that is formed on a substrate and has a plurality of magnetic domains, and a unit that supplies energy to move a magnetic domain wall in the magnetic layer. The magnetic layer is formed parallel to the substrate, and includes a plurality of prominences and a plurality of depressions alternately formed along a lengthwise direction thereof. The magnetic layer has a stepped form that secures a reliable movement of the magnetic domain wall in units of one bit.Type: GrantFiled: March 28, 2007Date of Patent: February 15, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: In-jun Hwang, Sung-chul Lee
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Patent number: 7864556Abstract: Example embodiments may provide magnetic domain information storage devices with trenches and a method of manufacturing the information storage device. Example embodiment information storage devices may include a magnetic layer on a substrate having a plurality of magnetic domains and a power unit for moving magnetic domain walls. Magnetic layers may be parallel to the substrate, and a plurality of trenches in the magnetic layer may be perpendicular to the substrate. Portions of a lower surface of the magnetic layer corresponding to trenches may protrude downward.Type: GrantFiled: December 6, 2007Date of Patent: January 4, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Chee-kheng Lim, Sung-hoon Choa
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Publication number: 20100315854Abstract: A domain wall motion type MRAM has: a magnetic recording layer 10 having perpendicular magnetic anisotropy; and a pair of terminals 51 and 52 used for supplying a current to the magnetic recording layer 10. The magnetic recording layer 10 has: a first magnetization region 11 connected to one of the pair of terminals; a second magnetization region 12 connected to the other of the pair of terminals; and a magnetization switching region 13 connecting between the first magnetization region 11 and the second magnetization region 12 and having reversible magnetization. A first pinning site PS1, by which the domain wall is trapped, is formed at a boundary between the first magnetization region 11 and the magnetization switching region 13. A second pinning site PS2, by which the domain wall is trapped, is formed at a boundary between the second magnetization region 12 and the magnetization switching region 13.Type: ApplicationFiled: December 10, 2008Publication date: December 16, 2010Inventors: Tetsuhiro Suzuki, Shunsuke Fukami, Norikazu Ohshima, Kiyokazu Nagahara, Nobuyuki Ishiwata
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Patent number: 7835167Abstract: Example embodiments may provide data storage devices using movement of a magnetic domain wall and/or a method of operating magnetic domain data storage devices. The data storage device may include a first magnetic layer for writing data having two magnetic domains magnetized in different directions, a second magnetic layer for storing data at a side of the first magnetic layer, a data recording device connected to the first magnetic layer and the second magnetic layer, and a plurality of reading heads configured to read the second magnetic layer. The data storage device may store a larger amount of data without requiring moving mechanical systems.Type: GrantFiled: October 31, 2007Date of Patent: November 16, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Chee-kheng Lim, In-kyeong Yoo, Sung-hoon Choa
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Patent number: 7796415Abstract: Provided are a magnetic layer, a method of forming the magnetic layer, an information storage device, and a method of manufacturing the information storage device. The information storage device may include a magnetic track having a plurality of magnetic domains, a current supply element connected to the magnetic layer and a reading/writing element. The magnetic track includes a hard magnetic track, and the hard magnetic track has a magnetization easy-axis extending in a direction parallel to a width of the hard magnetic track.Type: GrantFiled: February 29, 2008Date of Patent: September 14, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-chul Lee, Sun-ae Seo, Young-Jin Cho, Kwang-seok Kim
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Patent number: 7791923Abstract: A multi-bit memory cell stores information corresponding to a high resistive state and multiple other resistive states lower than the high resistive state. A resistance of a memory element within the multi-bit memory cell switches from the high resistive state to one of the other multiple resistive states by applying a corresponding current to the memory element.Type: GrantFiled: January 3, 2007Date of Patent: September 7, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: In-Gyu Baek, Dong-Chul Kim, Jang-Eun Lee, Myoung-Jae Lee, Sun-Ae Seo, Hyeong-Jun Kim, Seung-Eon Ahn, Eun-Kyung Yim
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Patent number: 7782649Abstract: Using controlled bias voltage for data retention enhancement in a ferroelectric media is generally described. In one example, an apparatus includes a ferroelectric film including one or more domains, the ferroelectric film having a first surface and a second surface, the first surface being opposite the second surface, an electrode coupled with the first surface, and an electrically conductive thin film coupled with the second surface wherein the electrically conductive thin film is sufficiently conductive that a controlled bias field applied between the electrically conductive thin film and the electrode is sufficient to grow, shrink, or actively maintain the size of the one or more domains disposed between the electrically conductive thin film and the electrode.Type: GrantFiled: December 20, 2007Date of Patent: August 24, 2010Assignee: Intel CorporationInventors: Quan Anh Tran, Valluri R. Rao, Qing Ma
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Patent number: 7760535Abstract: A method and structure for depinning a domain wall that is in spatial confinement by a pinning potential to within a local region of a magnetic device. At least one current pulse applied to the domain has a pulse length sufficiently close to a precession period of the domain wall motion and the current pulses are separated by a pulse interval sufficiently close to the precession period such that: the at least one current pulse causes a depinning of the domain wall such that the domain wall escapes the spatial confinement; and each current pulse has an amplitude less than the minimum amplitude of a direct current that would cause the depinning if the direct current were applied to the domain wall instead of the at least one current pulse. The pulse length and pulse interval may be in a range of 25% to 75% of the precession period.Type: GrantFiled: May 21, 2008Date of Patent: July 20, 2010Assignee: International Business Machines CorporationInventors: Stuart Parkin, Luc Thomas
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Patent number: 7755921Abstract: In one embodiment, the invention is a method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices. One embodiment of a memory device includes a first stack of dielectric material formed of a first dielectric material, a second stack of dielectric material surrounding the first stack of dielectric material and formed of at least a second dielectric material, and at least one data track for storing information, positioned between the first stack of dielectric material and the second stack of dielectric material, the data track having a high aspect ratio and a substantially rectangular cross section.Type: GrantFiled: August 14, 2007Date of Patent: July 13, 2010Assignee: International Business Machines CorporationInventors: Solomon Assefa, Michael C. Gaidis, Eric A. Joseph, Stuart Stephen Papworth Parkin, Christy S. Tyberg
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Publication number: 20090316462Abstract: Magnetic shift registers in which data writing and reading is accomplished by moving the magnetic domain walls by electric current. Various embodiments of domain wall nodes or anchors that stabilize a domain wall are provided. In some embodiments, the wall anchors are elements separate from the magnetic track. In other embodiments, the wall anchors are disturbances in the physical configuration of the magnetic track. In still other embodiments, the wall anchors are disturbances in the material of the magnetic track.Type: ApplicationFiled: June 24, 2008Publication date: December 24, 2009Applicant: SEAGATE TECHNOLOGY LLCInventors: Haiwen Xi, Xiaobin Wang, Dimitar V. Dimitrov, Paul E. Anderson, Harry Liu, Song S. Xue, Andreas Roelofs, Markus Siegert
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Patent number: 7514271Abstract: A method of forming a magnetic domain wall memory apparatus with write/read capability includes forming a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location: forming a magnetic read element associated with each of the shift register structures: and forming a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a write wire having a constriction therein, the constriction located at a point corresponding to the location of one of the plurality of discontinuities in the associated shift register structure.Type: GrantFiled: March 30, 2007Date of Patent: April 7, 2009Assignee: International Business Machines CorporationInventors: Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, John K. DeBrosse, Louis L. C. Hsu, Carl Radens, Keith Kwong-Hon Wong, Chih-Chao Yang
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Publication number: 20090046493Abstract: In one embodiment, the invention is a method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices. One embodiment of a memory device includes a first stack of dielectric material formed of a first dielectric material, a second stack of dielectric material surrounding the first stack of dielectric material and formed of at least a second dielectric material, and at least one data track for storing information, positioned between the first stack of dielectric material and the second stack of dielectric material, the data track having a high aspect ratio and a substantially rectangular cross section.Type: ApplicationFiled: August 14, 2007Publication date: February 19, 2009Inventors: SOLOMON ASSEFA, Michael C. Gaidis, Eric A. Joseph, Stuart Stephen Papworth Parkin, Christy S. Tyberg
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Publication number: 20080239785Abstract: A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a write wire having a constriction therein, the constriction located at a point corresponding to the location of the plurality of discontinuities in the associated shift register structure.Type: ApplicationFiled: June 10, 2008Publication date: October 2, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, John K. DeBrosse, Louis L.C. Hsu, Carl Radens, Keith Kwong Hon Wong, Chih-Chao Yang
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Patent number: 7385842Abstract: A magnetic memory element includes a sense structure, a tunnel barrier adjacent the sense structure, and a synthetic antiferromagnet (SAF) adjacent the tunnel barrier on a side opposite the sense structure. The SAF includes an antiferromagnetic structure adjacent a ferromagnetic seed layer. The ferromagnetic seed layer provides a texture so that the antiferromagnetic structure deposited on the ferromagnetic seed layer has reduced pinning field dispersion.Type: GrantFiled: May 9, 2006Date of Patent: June 10, 2008Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Publication number: 20080080234Abstract: A magnetic memory device includes a first magnetic line which has a plurality of cells made of magnetic domains partitioned by domain walls, and in which information is recorded in each cell, a first write element formed at one end portion of the first magnetic line, and a first read element formed at the other end portion of the first magnetic line.Type: ApplicationFiled: February 7, 2007Publication date: April 3, 2008Inventors: Yoshihisa Iwata, Katsuyuki Fujita, Yuui Shimizu
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Patent number: 7106638Abstract: An active termination circuit is used to set the input impedance of a plurality of input terminals. Each of the input terminals is coupled to a supply voltage through at least one PMOS transistor and to ground through at least one NMOS transistor. The impedances of the transistors are controlled by a control circuit that generates a first control signal to set the impedance of another PMOS transistor to be equal to a first predetermined resistance, and generates a second control signal to set the impedance of another NMOS transistor to be equal to a second predetermined resistance. The first control signal is used to control all of the PMOS transistors and the second control signal is used to control all of the NMOS transistors. As a result, the PMOS and NMOS transistors coupled to each input terminal have impedances corresponding to the first and second resistances, respectively.Type: GrantFiled: November 29, 2004Date of Patent: September 12, 2006Assignee: Micron Technology, Inc.Inventor: Chris G. Martin
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Patent number: 7072209Abstract: A magnetic memory element includes a sense structure, a tunnel barrier adjacent the sense structure, and a synthetic antiferromagnet (SAF) adjacent the tunnel barrier on a side opposite the sense structure. The SAF includes an antiferromagnetic structure adjacent a ferromagnetic seed layer. The ferromagnetic seed layer provides a texture so that the antiferromagnetic structure deposited on the ferromagnetic seed layer has reduced pinning field dispersion.Type: GrantFiled: December 29, 2003Date of Patent: July 4, 2006Assignee: Micron Technology, Inc.Inventor: James G. Deak