Abstract: A video display system including an energizable video display control element, a power source for generating power and a control portion. The control portion, in turn, comprises a laddic-shaped addressing element, an input wire, and enabling wire and an input addressing wire. The laddic-shaped addressing element has a pair of sidebars and plurality of rungs including an input rung, at least one addressing rung, and an enabling rung, with the sidebars having a lower magnetic reluctance than the rungs. The input wire is magnetically coupled to the input rung for generating an input flux signal in the addressing element, with the input flux signal having a direction representative of the energization state of the video display control element.

Abstract: A new data storage device that includes one or more digital data storage elements, each element including a magnetic core, and an input addressing portion comprising a magnetic input addressing element for receiving at an input magnetic flux representing a data value and selectively coupling a flux to an output for transmission to a magnetic core in response to addressing flux generated therein. An output element magnetically coupled to a magnetic core detects transitions in magnetic flux in a magnetic core. In addition, the data storage element may further comprise an output addressing portion comprising a magnetic input addressing element for receiving at an input magnetic flux representative of flux in a magnetic core and selectively coupling a flux to an output in response to addressing flux generated therein.

Abstract: A protection circuit for inner elements such as metal insulator semiconductor (MIS) field effect transistors in a semiconductor device of high packing density has been improved. The protection circuit comprises protective elements of two types. One type has a deep diffusion region providing the element with high surge capacity, that is an ability to withstand the energy of an incoming surge, and the other type has a shallow diffusion region providing a low breakdown voltage. With a combination of these two types of protective element, the protection circuit can withstand high energy of an input surge and, at the same time, provide a low protection voltage suitable to protect the inner elements from breakdown.

Abstract: A coupling arrangement for coupling laddics in cascade comprises an emitter follower transistor circuit arranged so that the output impedance of the transistor restricts the rise and fall times in the mmf of the laddic output winding. The effect is to reduce the risk of spurious reset signals being generated in the output winding of sufficient amplitude to reset the next laddic in the cascade.