Abstract: A method for high-resolution timing measurement includes a first oscillator generating a first clock with a first frequency. A second oscillator generates a second clock with a second frequency. A delay pulse generator generates a delayed pulse from the second clock. An oscillator tuner controls the second frequency to be as close as possible to the first frequency without being the same as the first frequency. A sampling module samples the delayed pulse at the first frequency. A counter generates a digital counter value by counting a number of samples made by the sampling module.

Abstract: Methods and apparatuses for manufacturer to present Web-based edu-games so as to train retail staff member about the manufacturer and its products and to access edu-game data and retail sales data from a database. A Website can be created to provide a point of interaction between the manufacturer, retailer, and retail staff member. By accessing this Website, the retail staff member is presented with the web-based edu-games and learns about the manufacturer and its products. The retail staff member can be presented with incentives by the manufacturer for completing the web-based training off time, which may prevent the retailer from paying for the costs of training the retail staff member. Alternately, retailers can also do training in-house (e.g., if required by statute). Manufacturers and retailers compare education levels to sales data to determine the effects of the training.

Abstract: A method is provided for accurate time measurement. Time is first measured with a first oscillator. At designated intervals, a second oscillator is activated for a period of time based on the first oscillator. The second oscillator is more accurate than the first oscillator. Pulses are then counted from the second oscillator during the period of time. The second oscillator is then turned off after the period of time. The count from the second oscillator is used as a new measurement of the period of time of the first oscillator.

Abstract: A method for producing a computer-assisted real-time system that includes at least one processing unit. Data exchange between the processing unit and the environment or one or more additional processing units is synchronous or asynchronous. At least one real clock is allocated to the processing unit to correlate data exchange.

Abstract: Multi-phase clock time stamping for improving time stamp resolution is provided. One of many possible embodiments is a method for generating a time stamp having an improved time resolution for an event signal. Briefly described, one such method comprises the steps of: receiving an event signal for which a time stamp is to be generated; generating a first pulse signal having a pulse width defined by the event signal and a first clock signal; generating a second pulse signal having a pulse width defined by the event signal and a second clock signal; and determining which of the first pulse signal and the second pulse signal is to be used for generating the time stamp for the event signal.

Abstract: A time interval to voltage converter with very low nonlinearity for time stamping events. The converter automatically selects one of two clocks related to a reference clock and ensures that the time between an event edge to a clock edge is sufficiently large to properly operate a switch and yield very linear time-to-voltage conversion.

Abstract: The present invention is a novel method and apparatus for implementing a high-precision timer utilizing a non-optimal oscillator and a high-speed oscillator wherein only one oscillator is enabled at a given moment in time. The high-precision timer method and apparatus comprises a timer and an error-correction technique. In one embodiment, the timer of the present invention is constructed from a high-speed oscillator and a low-speed non-optimal oscillator. The timer operates from the high-speed oscillator during on-the-air modes of operation and from the low-speed non-optimal oscillator during sleep modes of operation. The present inventive method corrects errors that are introduced by the non-optimal oscillator and a swallow counter. The errors are corrected using an error-correction technique having two steps: an error-determination step and an error-correction step.

Abstract: A timer for measuring a time period including a high frequency generating unit, a low frequency generating unit and a controller connected to the high and low frequency generating units, wherein the controller deactivates the high frequency generating unit during at least a portion of the time period, detects and counts predetermined portions of the signals provided by the high and low frequency generating units and counts a plurality of the portions of the currently active frequency generating unit.

Abstract: A temperature-compensated high-speed timing circuit, which is particularly advantageous in read-interface circuits for disk-drive interface. The voltage on the integrating capacitor is compared against a voltage defined by the drop, on a resistor, induced by a current which is the combination of a reference current from a reference current generator with a temperature-dependent current from another current generator.

Abstract: A device for measuring the duration of a time slot or interval includes a first clock for supplying pulses of period T and a second clock, whose pulses are shifted with respect to the first. A digital circuit counts the number of pulses of the clocks, which are followed by a complete period T and which occur between the start signal and the stop signal. An analog circuit determines the times separating the start signal and the start of the first pulses of the clocks after the start signal and the times separating the stop signal and the end of the final periods of the clocks before the stop signal, and converts the analog data into digital data. A processing circuit determines the duration of the time slot, and resolves any ambiguity situation, which could lead to a clock period counting error.

Abstract: The present invention relates to an electronic meter circuit for a time comparison measurement between two successive periodic events with which the signal time ratios between two times two successive events can be recognized by a simple method.The electronic meter circuits comprises a reference meter to be loaded with a reset value when a first event occurs and for reference meter to start to count at a clock frequency and when a second event occurs, reference meter starts to count in the opposite direction at a clock frequency until a third event occurs, and when the third event occurs, meter reading forms a reference value for the ratio of the signal times between the occurrence of the first and second events and between the second and third events.

Abstract: A device for measuring the duration of a time interval between an interval start signal (D) and an interval end signal (F). The device includes a digital circuit having first and second clocks (C1, C2) for counting the number of clock pulses between the interval start signal (D) and the interval end signal (F), an analog circuit for measuring the time separating the interval start signal (D) from a clock pulse following the interval start signal, and also for measuring the time separating the interval end signal (F) and a clock pulse following the interval end signal, and a processing circuit for determining the duration of the time interval based upon data supplied the digital circuit and data supplied by the analog circuit (previously converted into digital data). Particular utility for the present invention is found in the area of robotics.

Abstract: A time interval unit which operates in accordance with electronic sampling techniques and employing a pair of identical sampling interpolators which are respectively triggered at the start and stop of the time interval to be measured. Each time interval unit includes a GHz frequency sinusoidal clock signal generator and a time counter in the form of a pulse counter and a pair of sampling type interpolators which are respectively triggered on in response to a start and a stop signal. When triggered, each interpolator samples the instantaneous amplitude of the in-phase(x) and quadrature(y) components of the sinusoidal clock signal. From the samples of the x and y components and the pulse counter's result, the elapsed time between two events is computed to a psec accuracy.

Abstract: Accurate measurement results can be obtained without increasing the number of bits of a timer.A timer 1 performs counting with low-speed clocks immediately after input pulse is inputted. When the value counted by the timer with the low-speed clock coincides with the set value of a switching set value register 4, high-speed clocks are inputted to the timer 1 by a clock switching circuit 6 which is switched by the output of a comparison circuit 5.

Abstract: A dual time base, zero dead zone time domain reflectometer repetitively launches a predetermined number of stimulus pulses into a transmission system in synchronism with clock signals from a first time base, providing a measurement cycle. The duration of the launched stimulus pulses, determined by a predetermined number clock cycles from the first time base, exceeds the total propagation time of the system to be measured so that a time interval between a launch and a reflection may be measured within the launched pulse. A second time base, which has a predetermined period that differs from the period of the first time base and defines a measurement period divided into equal sub-periods, continuously produces clock signals, one or more of which may be counted during the time interval.

Abstract: A dual time base, zero dead zone time domain reflectometer repetitively launches a predetermined number of stimulus pulses into a transmission system in synchronism with clock signals from a first time base, providing a measurement cycle. The duration of the launched stimulus pulses, determined by a predetermined number clock cycles from the first time base, exceeds the total propagation time of the system to be measured so that a time interval between a launch and a reflection may be measured within the launched pulse. A second time base, which has a predetermined period that differs from the period of the first time base and defines a measurement period divided into equal sub-periods, continuously produces clock signals, one or more of which may be counted during the time interval.

Abstract: Accurate measurement results can be obtained without increasing the number of bits of a timer. A timer 1 performs counting with low-speed clocks immediately after input pulse is inputted. When the value counted by the timer with the low-speed clock coincides with the set value of a switching set value register 4, high-speed clocks are inputted. to the timer 1 by a clock switching circuit 6 which is switched by the output of a comparison circuit 5.

Abstract: An analog system (100) of measuring the difference in time of occurrence of events. The method uses two coherent oscillators (110, 116) of the same frequency which start with predetermined phase when each of the events are detected. The phase difference of the oscillators (110, 116) is a measure of the difference in the time of occurrence of the two events.

Abstract: The present invention relates to time measurement apparatus and method for measuring, with picosecond precision, intervals between single edged events, where each measured interval comprises the summation of a rough clock count and fine or calibrated vernier counts of measured fractional clock periods before and after each START and STOP event selected from a calibrated vernier memory. The calibrated vernier memory takes the form of a table of linear voltage versus time developed using pseudo-random generated measurement events of random duration and random separation.

Abstract: A clock voltage supply for electronic control circuits such as a computer system for generating four clock signals which are synchronous as to frequency and phase. When n=4, the clock signals are generated with the help of four PLL clocks. So that the four clock signals can continue to appear even if one of the four clocks is malfunctioning, the clock signals of the four clocks are supplied to four (3:4) voters from whose outputs the clock signals are then supplied. Since each voter circuit brings about a certain delay time, which significantly limits the frequency of the clock signals, a delay element is connected downstream to each of the voter outputs respectively. The delay time of the respective delay element, plus the delay time of the respective voter connected therewith, is an integral multiple of the period of the intended clock frequency. For PLL control, the output of each delay element gives the nominal phase position and the output of each clock gives the actual phase position.

Abstract: An equivalent time pseudorandom sampling system samples a repetitive waveform within each of several narrow acquisition windows bounding repetitive sections of the waveform in order to obtain equivalent time sample data characterizing the shape of the waveform included within the acquisition windows. The period between successive triggering events is measured and sampling is delayed following an initiating triggering event by delay time adjusted according to the measured period so as to maximize the probability that sampling will occur within an acquisition window. The time difference between samples and subsequent triggering event is measured with high accuracy and resolution utilizing a time interval measurement system based on a dual vernier interpolation.

Abstract: A timer system (10,110,210) of two or more timers (10,110,210) measures the response time between an initiating event and a dependent event. The initiating and dependent events may be physically separated or electrically isolated. The timer system (10,110,210) permits recording of associated initiating and dependent events for a response time test followed by the recording of additional associated initiating and dependent events for additional response time tests while the timers remain separated. Thus, the timer system (10,110,210) permits serial recording of information for a large number of response time tests. The timers (10,110,210) may be identical. The timers (10,110,210) are interconnected and synchronized, then disconnected and separated to record the time of occurrence of the physically separated or electrically isolated events. The timers (10,110,210) are then again interconnected for a simultaneous recording of the elapsed time on each timer.

Abstract: The time of arrival of a constant speed moving object at a given location is calculated from data representing the time of arrival of the object at two preceeding locations and the relative physical distances between the three locations. An up-down counter counts up at a fixed frequency f.sub.1 during the time interval of the object's transversal of the distance between the first two locations and counts down at a pre-selected frequency f.sub.2 thereafter. The preselected frequency f.sub.2 is a function of the distances between locations and the fixed frequency f.sub.1. When the counter counts down to zero it produces an output pulse that occurs at the time the object reaches the given location. Operation of the time delay computer is independent of object speed.

Abstract: An instrument that receives pulses from a primary external source and one or more secondary external sources and determines when there is coincidence between the primary and one of the secondary sources. The instrument generates a finite time window (coincidence aperture) during which coincidence is defined to have occurred. The time intervals between coincidence apertures in which coincidences occur are measured.

Abstract: A method is provided for measuring a single-shot time interval using startable oscillators to replicate indefinitely the time interval for averaging. Also provided is a circuit for automatically selecting a proper ratio of division to ensure that the interval being measured is less than the period of replication.

Abstract: A clock system is disclosed having two identical clocks not synchronized with each other. Each of the clocks includes a circuit for selecting the output of one of the clocks as the present system output. Further, each clock includes logic for detecting errors in the operation of itself, and of the other. When an error is detected in the operation of the clock selected to be the present system output, a switchover sequence control switches the output signal of the nonselected clock to become the new system output. The switchover sequence control includes a feature which ensures that the interval between pulses in the system output is greater than a predetermined period in order to minimize detrimental effects on circuitry utilizing the clock system output.

Abstract: A programmable number of pulses N, of one or more auxiliary frequencies fa, is inserted between pulses of the frequency f.sub.1 to be processed. The resulting frequency N.f.sub.1, where N is a positive number (N can be fractional), is at any moment proportional to input frequency f.sub.1 where N, the proportionality factor, varies at will and can assume any positive number value. Pulse insertion results in a frequency shift of positive or negative value and succeeds continuously and without any information loss i.e. the pulse train has not to be interrupted and is processed "on (the) line". The same method described used for higher frequencies eliminates the known .+-.1 count problem as it can register fractions of a pulse.