For Sampling, Digital To Analog Or Analog To Digital Converting Patents (Class 369/47.35)
  • Patent number: 10892727
    Abstract: Provided are an adaptive equalization apparatus and a method using the same of, for optimizing digital algorithm, responding proactively in dynamic environmental change, and adjusting the monitoring range according to the signal size.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: January 12, 2021
    Assignee: QUALITAS SEMICONDUCTOR CO., LTD.
    Inventor: Duho Kim
  • Patent number: 9077456
    Abstract: A receiving device includes a first conversion unit, an amplification unit, and a microcomputer. The microcomputer includes: a second conversion unit that performs, for each sampling time duration, AD conversion on a voltage signal into an AD-converted value; a first calculation unit that calculates a difference digital value by difference calculation; a second calculation unit that calculates a positive reference value and a negative reference value; a detection unit that detects a rising point starting difference digital values greater than the positive reference value, and a falling point starting difference digital values smaller than the negative reference value; a third calculation unit that calculates a first sample period and a second sample period; and a fourth calculation unit that calculates a modulated signal for each symbol time period based on the first sample period and the second sample period.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: July 7, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Makoto Gotou, Masaaki Ikehara, Yoshihiko Matsukawa
  • Patent number: 8599663
    Abstract: An approach is described that allows an optical disc drive to accurately verify the power level of irradiation beam power levels associated a write strategy used in high speed, high density optical disc media formats using a front monitor diode with a relatively slow rise time and/or relative slow fall time compared to the clock cycle speed of the write strategy signal. A portion of encoded data to be written to an optical disc media may be overwritten to include a predetermined data pattern. During write strategy processing of the data, the predetermined data pattern is replaced with a constant write strategy power level. The constant write strategy output placed within the write strategy signal may control the optical disc drive laser to emit a constant irradiation beam for a duration sufficiently long to allow the front monitor diode to obtain an accurate measure of the irradiation beam power level.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: December 3, 2013
    Assignee: Marvell International Ltd.
    Inventor: Tom Geukens
  • Patent number: 8593920
    Abstract: A signal conditioning unit processes a data signal from an optical pickup unit. The signal conditioning unit includes a single-ended channel and a dual-ended channel. One of the single-ended channel and the dual-ended channel is selected as an active channel, and a reference level of a signal in the active channel is calibrated. The signal in the active channel is adjusted within a dynamic range of a digital signal processing stage, and the data signal of the active channel is converted to a digital signal at the digital signal processing stage.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: November 26, 2013
    Assignee: Marvell International Ltd.
    Inventors: Yingxuan Li, Fu-Tai An, Yonghua Song
  • Patent number: 8588044
    Abstract: Circuitry for controlling mode selection of a CD/DVD reader is described. In one embodiment, the CD/DVD reader has a first device having at least one analog output, a second device having at least one digital input and at least one analog input, and an interface circuit coupling the analog output of the first device to the digital input and the analog input in the second device. The interface circuit includes a circuitry to use a single control signal from the analog output of the first device to control the digital input and the analog input in the second device. Other embodiments are also described.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: November 19, 2013
    Assignee: CSR Technology Inc.
    Inventors: Yan Zhu, BoWen Chen, ZengLian Liu, YaHui Dong
  • Patent number: 8576680
    Abstract: According to one embodiment, a circuit for generating a signal has an amplifier, first and second detection circuits, first and second A/D converters, and a digital signal processing circuit. The amplifier amplifies an electric signal corresponding to an intensity of a reflected light from an optical disc. The first detection circuit detects an upper envelope of an output signal from the amplifier, and outputs an upper envelope signal. The second detection circuit detects a lower envelope of an output signal from the amplifier, and outputs a lower envelope signal. The first A/D converter converts the upper envelope signal into a first digital signal. The second A/D converter converts the lower envelope signal into a first digital signal. The digital signal processing circuit performs calculation processing of the first and the second digital signals, and outputs a signal for controlling reproduction of data recorded on the optical disc.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: November 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Shimada
  • Patent number: 8462602
    Abstract: A data recovery device including an analog to digital converter (ADC), a filtering-equalizing unit, a zero crossing detector, a data phase locked loop, a data mapping unit and an estimation unit is provided. The ADC converts a radio frequency signal to a plurality of sampling data points. The sampling data points are converted to a plurality of retiming data points and a clock signal by the filtering-equalizing unit, the zero crossing detector and the data phase locked loop. The data mapping unit selects a plurality of maximum data points and minimum data points from the returning data points, and determines whether to map the maximum data points and the minimum data points to other levels for partially reconstructing the retiming data points. The estimation unit recovers the reconstructed retiming data points to a modulation signal.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: June 11, 2013
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Shih-Hsien Liu, Zhieng-Chung Chen
  • Patent number: 8416666
    Abstract: The present invention is related to systems and methods for characterizing circuit operation, and more particularly to systems and methods for modifying a data decoding process.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: April 9, 2013
    Assignee: LSI Corporation
    Inventors: Fan Zhang, Yang Han, Anatoli A. Bololov, Mikhail I. Grinchuk, Shaohua Yang
  • Patent number: 8331206
    Abstract: In an apparatus for conditioning a signal from an optical pickup unit (OPU), a single-ended channel includes a first signal processing block to calibrate a dark level of a single-ended signal corresponding to a single-ended output of the OPU, if any, and to center the single-ended signal. A dual-ended channel includes a second signal processing block to calibrate a dark level of a dual-ended signal corresponding to a dual-ended output of the OPU, if any, and to center the dual-ended signal. A multiplexer selects one of the single-ended channel and the dual-ended channel, and outputs a selected signal. A digital signal processing stage converts the selected signal to a digital signal.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: December 11, 2012
    Assignee: Marvell International, Ltd.
    Inventors: Yingxuan Li, Fu-Tai An, Yonghua Song
  • Patent number: 8270269
    Abstract: An asynchronous timing detector 3 detects and measures a specific pattern (sync pattern) of audio and video reproduced signals having a digital value form an A/D converter 2 and its appearance interval based on an asynchronous clock generated by an asynchronous clock generator 4, and calculates a cycle ratio of the measured sync pattern appearance interval (the number of clock pulses of the asynchronous clock) to a normal value (the number of clock pulses of a synchronous clock obtained by measuring a sync pattern appearance interval using the synchronous clock). A pseudo-synchronous clock generator 7 thins the asynchronous clock based on the cycle ratio to generate a pseudo-synchronous clock which is pseudo-synchronous with channel data. Therefore, even when an initial frequency error is large, frequency and phase pull-in is relatively quickly performed until a timing recovery operation becomes stable.
    Type: Grant
    Filed: November 11, 2005
    Date of Patent: September 18, 2012
    Assignee: Panasonic Corporation
    Inventors: Hiroki Mouri, Akira Yamamoto
  • Patent number: 8254227
    Abstract: A frequency-modulated coding and data recording and storage device that uses plasmonic-dielectric nanostructures of concentric two-layer core-shell design to store data includes a flat transparent substrate having a top surface divided into cells with side dimension d on the order of tens of nanometers and a core-shell plasmonic-dielectric nanostructure disposed in each cell. Each plasmonic nanostructure of concentric core-shell has a predetermined ratio of radii and a predetermined aspect ratio such that when an infrared or visible wavelength signal is applied to each said core-shell plasmonic-dielectric nanostructure a peak scattering amplitude of the applied signal is at different plasmonic resonance frequencies for core-shell plasmonic-dielectric nanostructures with different ratio of radii and different aspect ratios.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: August 28, 2012
    Assignee: The Trustees Of The University Of Pennsylvania
    Inventors: Nader Engheta, Alessandro Salandrino
  • Patent number: 8233368
    Abstract: The present techniques provide methods and systems for more reliable reading of optical data disks. In embodiments, a multi-pixel detector that is segmented into multiple areas, or detector segments, may be used to detect a pattern in the light reflected from an optical data disk. The pattern may include light scattered from a single bit that may be under a center detector, as well as light scattered from proximate bits. The detector system may then combine the quantized values from each of the detector segments mathematically to determine the presence or absence of a bit or bits of data. The mathematical combination may also use data that is known about the status of adjacent data bits (such as previously read bits, or bit patterns which are allowed or not allowed by specific data encoding schemes) to improve the accuracy of the bit prediction.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: July 31, 2012
    Assignee: General Electric Copany
    Inventors: John Anderson Fergus Ross, Kenneth Brakeley Welles, John Erik Hershey, Xiaolei Shi, Victor Petrovich Ostroverkhov
  • Patent number: 8174949
    Abstract: Various embodiments of the present invention provide systems, methods and media formats for processing user data derived from a storage medium. As an example, a system is described that includes a storage medium with a series of data. The series of data includes a servo data and a user data region. The user data region includes a first synchronization pattern and a second synchronization pattern located a distance from the first synchronization pattern. A storage buffer is provided that is operable to receive at least a portion of the series of data. A retiming circuit calculates an initial phase offset and frequency offset for a defined bit within the storage buffer using a first location of the first synchronization pattern and a second location of the second synchronization pattern. An error correction loop circuit re-samples the series of data from the storage buffer based at least in part on the initial phase offset and a frequency offset.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: May 8, 2012
    Assignee: LSI Corporation
    Inventor: Nayak Ratnakar Aravind
  • Patent number: 8154972
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes a summation circuit, a data detector circuit, an error feedback circuit, and an error calculation circuit. The summation circuit subtracts a low frequency offset feedback from an input signal to yield a processing output. The data detector circuit applies a data detection algorithm to a derivative of the processing output and provides an ideal output. The error feedback circuit includes a conditional subtraction circuit that conditionally subtracts an interim low frequency offset correction signal from a delayed version of the derivative of the processing output to yield an interim factor. The error calculation circuit generates an interim low frequency offset correction signal based at least in part on the interim factor and a derivative of the ideal output.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: April 10, 2012
    Assignee: LSI Corporation
    Inventor: Nayak Ratnakar Aravind
  • Patent number: 8102739
    Abstract: Disclosed herein is an optical disk playback apparatus including: a signal playback device configured to read and decode information recorded to an optical disk through an optical pickup unit in order to reproduce the information; the signal playback device including a signal generation circuit, a first signal processing device, a second signal processing device, a modulator, a switch, an analog to digital converter, and a third signal processing device.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: January 24, 2012
    Assignee: Sony Corporation
    Inventor: Nobuyoshi Kobayashi
  • Patent number: 8089845
    Abstract: The generation of a pseudo-lock is prevented in a JFB offset compensator whose use has been conventionally limited due to a tendency to generate the pseudo-lock, and performance degradation of a PLL and a Viterbi decoder is suppressed. A means for monitoring an offset of a read signal is provided independently from the JFB offset compensator. With this configuration, the generation or a possibility of the generation of the pseudo-lock can be detected to reset an integrator. In order to reduce the influence of a large sporadic offset triggering the pseudo-lock, there may also be provided a limitter for limiting the absolute value of an offset signal inputted to the integrator or a limitter for limiting the absolute value of an offset compensation signal.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: January 3, 2012
    Assignees: Hitachi, Ltd., Hitachi-LG Data Storage, Inc.
    Inventor: Atsushi Kikugawa
  • Patent number: 8085637
    Abstract: A DPD tracking error signal detection apparatus includes the following. Four differentiators remove DC components and differentiate four signal with varying differential phases. The signals are then sampled and quantized by four A/D converters, and output to a non-inverting unit and an inverting unit. A phase inverter/compositor then leaves as-is or phase-inverts the output signals, according to a control signal. The non-inverting and the inverting unit each include two Hilbert transformers that phase-shift the output from the A/D converters, two delay units that delay the output of the other A/D converters to match the delay of the Hilbert transformers, two cross-correlators that calculate the cross-correlation between pairs of Hilbert transformers and delay units, and an adding unit that combines the cross-correlator results and outputs the combined result to the phase inverter/compositor.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 27, 2011
    Assignee: Sony Corporation
    Inventors: Osamu Hosokawa, Nobuyoshi Kobayashi
  • Patent number: 8085633
    Abstract: When a multilayered optical disc is used, the signal-to-noise ratio of a read signal is decreased as effective reflectance is extremely low due to the influence of reflection and absorption by front recording layers. Further, when a high-frequency modulation technology is used to suppress returned light noise of a laser, the erasure of recorded information is likely to occur on certain types of discs, making it difficult to simultaneously achieve the suppression of returned light noise of a laser and the prevention of the erasure of recorded information. To address the above problems, the present invention includes a section that performs a read by executing a multi-tone demodulation. The present invention also includes a section that controls the position and shape of a read light pulse to be radiated on a recording layer.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: December 27, 2011
    Assignees: Hitachi Consumer Electronics Co., Ltd., Hitachi-LG Data Storage, Inc.
    Inventor: Atsushi Kikugawa
  • Patent number: 8077568
    Abstract: An apparatus including sensors that aid in the location of a stylus within the groove of a rotating record. The location of the stylus corresponds to a portion of an audio waveform present at a unique location within the groove. Using the correspondence between the location of the stylus and the portion of the audio waveform, an external digital source may be synchronized with an analog waveform. A high speed digital data path connects a control unit including a turntable platter to signal processing unit. Software in the signal processing unit synchronizes the analog waveform and digital signals from the external digital source.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: December 13, 2011
    Inventor: Charles A. Spencer
  • Publication number: 20110199875
    Abstract: Circuitry for controlling mode selection of a CD/DVD reader is described. In one embodiment, the CD/DVD reader has a first device having at least one analog output, a second device having at least one digital input and at least one analog input, and an interface circuit coupling the analog output of the first device to the digital input and the analog input in the second device. The interface circuit includes a circuitry to use a single control signal from the analog output of the first device to control the digital input and the analog input in the second device. Other embodiments are also described.
    Type: Application
    Filed: August 20, 2008
    Publication date: August 18, 2011
    Inventors: Yan Zhu, BoWen Chen, ZengLian Liu, YaHui Dong
  • Patent number: 7974162
    Abstract: A digital data demodulator which can reduce a loss of decodable digital data, and increase capability of reproducing digital data inputted through a transmission line even when an error occurs in the transmission line. In the digital data demodulator, a specific pattern detector (113) detects a specific pattern to be included in a modulation code, from a bit string inputted through a transmission line (104). A modulation code identifying unit (117) generates a demodulation data strobe signal (119) according to a phase of the modulation code including the specific pattern. An error corrector (121) samples demodulation data (109) in response to the demodulation data strobe signal (119) and reproduces the data to the original digital data.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: July 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Makoto Okazaki, Yasushi Ueda
  • Patent number: 7911899
    Abstract: An optical disc reproducing apparatus includes an analog-to-digital (A/D) converter which converts an analog signal obtained from an optical disc to a digital signal; an asymmetry compensator which detects and corrects an offset of the digital signal; a phase locked loop (PLL) which estimates a clock of the digital signal and compensates for a frequency error; a binary module which converts the digital signal to binary data; an equalizer which equalizes a particular frequency of the digital signal; and a channel identifier which detects a reference level of the binary module, based on an input signal of the equalizer.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung Hyun Lee, Eun Jin Ryu, Eing Seob Cho, Jun Jin Kong
  • Publication number: 20110038242
    Abstract: Provided herein are hybrid laser diode drivers (LDDs) that drive a laser diode in response to receiving enable signals from a controller. In accordance with specific embodiments, a hybrid LDD includes a read channel to selectively output a read current, one or more write channel each to selectively output a write current, and an oscillator channel to selectively output an oscillator current. Additionally, in specific embodiments the hybrid LDD includes a state machine that receives the enable signals from the controller, and based on the enable signals, controls timing of the currents output by the read, write and oscillator channels.
    Type: Application
    Filed: October 4, 2010
    Publication date: February 17, 2011
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Theodore D. Rees, Akihiro Asada
  • Patent number: 7885154
    Abstract: An apparatus for controlling discrete data in a disk overwrite area or a power calibration area comprises a signal-processing unit, an address-processing unit, a control signal-processing unit, a clock recovery circuit, a signal-processing unit parameter control unit, and a clock recovery circuit parameter control unit, wherein the control signal-processing unit uses a message produced by a data on the disc to determine the control signals such as hold, load, or increasing bandwidth for holding, loading, and increasing the bandwidth of the parameters for processing the related circuits (such as the circuit of the signal-processing unit or the clock recovery circuit) of the discrete data produced between the two data clusters, so as to increase the convergent speed of the circuits for assuring the accuracy of reading data.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: February 8, 2011
    Assignee: Mediatek Incorporation
    Inventors: Jin-Bin Yang, Meng-Ta Yang
  • Patent number: 7830766
    Abstract: A data reproduction apparatus for reproducing recorded data from an optical disk by using a PRML detection method is disclosed that includes an optical head including a light source, an optical system having an objective lens for condensing light emitted from the light source to the optical disk, and a photodetector for receiving light reflected from the optical disk, a signal generation circuit for generating an RF signal from a signal output from the photodetector, a phase correction circuit for correcting phase distortion of the RF signal when the recorded data are recorded in recording marks arranged with a pitch less than a diffraction limit, a clock extraction circuit for extracting a clock from the corrected RF signal, and a decoding circuit for decoding the recorded data from the RF signal in synchronization with the clock extracted by the clock extraction circuit.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: November 9, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Ryosuke Kasahara
  • Patent number: 7801004
    Abstract: A series of marks on an optical disc are sampled to yield a series of data pulses. The marks are at least substantially angularly equidistant to one another on the optical disc. A function is performed on the series of data pulses to yield an error-corrected series of data pulses. The function is one of: frequency domain filtering, signal averaging, and signal integration.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: September 21, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Brian G. Risch, William B. Connors
  • Patent number: 7787336
    Abstract: A signal processing apparatus of an optical disk recording/reproducing apparatus and a signal processing method performed thereby are provided. The signal processing apparatus may include an operational data generation unit for receiving digital signals, filtering received digital signals and outputting filtered signals as operational data and a data arithmetic-operation unit for performing an arithmetic operation on the operational data output by the operational data generation unit in response to a command.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: August 31, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-yong Kim, Young-hoon Lee
  • Patent number: 7773481
    Abstract: In a recordable optical disc apparatus, the efficiency of the work necessary for optimizing the write pulse condition (write strategy) is improved and the read compatibility among drive units is ensured by a minimum addition of circuitry. An edge shift amount or a read signal and a binarized result are stored in an external memory as digital data and are later processed by analysis software in a host PC. The write pulse shape and power conditions can be optimized to individual optical disc media in a short time by means of a simple circuit. Further, by optimizing the write pulse shape and power condition in view of the PRML class or the difference in NA of the head, any deterioration of read compatibility can be avoided.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: August 10, 2010
    Assignees: Hitachi, Ltd., Hitachi-LG Data Storage, Inc.
    Inventor: Hiroyuki Minemura
  • Patent number: 7751295
    Abstract: Quantization noise due to analog-to-digital conversion may be larger than a noise component of an input signal, and therefore sufficient performance may not be obtained.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: July 6, 2010
    Assignees: Hitachi, Ltd., Hitachi LG Data Storage, Inc.
    Inventor: Manabu Katsuki
  • Publication number: 20100135135
    Abstract: A system of sampling interface for an optical pick-up head comprises an optical pick-up head, a PMOS, a boost circuit, and a sample and hold circuit. The optical pick-up head outputs one of a reading voltage and a writing voltage. The PMOS gate receives the gate voltage and then the PMOS is turned on to pass the reading voltage to the sample and hold circuit. Moreover, the substrate of the PMOS receives a control voltage. The boost circuit is used to boost the gate voltage higher than the control voltage for turning off the PMOS and isolating the writing voltage.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 3, 2010
    Inventor: Chih-Min Liu
  • Patent number: 7639806
    Abstract: Methods and apparatus or systems for providing security based on innate characteristics of devices are disclosed. A method of providing security associated with communications from a digital device includes observing an analog signal associated with communications from the digital device, characterizing the digital device at least partially based on the analog signal, and providing a security feature at least partially based on the step of characterizing.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: December 29, 2009
    Assignee: Iowa State University Research Foundation, Inc.
    Inventors: Thomas E. Daniels, Mani Mina, Steve F. Russell
  • Patent number: 7616395
    Abstract: There is provided an information reproduction apparatus that can suppress degradations in the qualities of reproduced data and timing from due to interpolation errors when performing interpolation timing recovery, and that can avoid degradation in the stability of the system due to an increase in the timing recovery loop delay. An information reproduction apparatus (100) for reproducing data and timing from an analog signal including data information and timing information is provided with an expected value generator (106) for outputting plural expected values, and a maximum likelihood detector (107) for outputting data that corresponds to a sequence of the highest likelihood with an output sequence of an A/D converter among the plural expected value sequences, at the timing of a second clock.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: November 10, 2009
    Assignee: Panasonic Corporation
    Inventor: Akira Yamamoto
  • Patent number: 7596299
    Abstract: A hard disk recorder 1 is capable of performing fast-forward reproductions at 120× speed, 60× speed and 30× speed, and reproduces video images and audio sounds in a series of periodic reproduction zones in a video and audio file, each reproduction zone being for a predetermined reference time interval (e.g. 1 second), while skipping video images and audio sounds in other than the reproduction zones according to a ratio of the fast-forward speed to the predetermined reference time interval (skipping for 119 seconds at the 120× speed, 59 seconds at the 60× speed, and 29 seconds at the 30× speed, respectively). Each of the series of reproduction zones for the 120× speed, the series of reproduction zones for the 60× speed, and the series of reproduction zones for the 30× speed, each reproduction zone of which is for the reference time interval, is so set as to be free from overlap with the other series of reproduction zones.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: September 29, 2009
    Assignee: Funai Electric Co., Ltd.
    Inventors: Toshihiro Takagi, Kazuhiko Tani
  • Patent number: 7590041
    Abstract: In a playback signal processing device for extracting, from an analog playback signal, playback data and a clock synchronized with the playback data, a digital equalizer 2 is disposed outside a clock extraction loop formed by an interpolator 3, a timing recovery circuit 4, and a control circuit 5. The digital equalizer 2 is provided between an A/D converter 1 and the interpolator 3 and performs equalization processing on digital playback data from the A/D converter 1 in accordance with the timing of a fixed clock CLK from a synthesizer 7. The coefficients of the digital equalizer 2 are updated by the control circuit 5 by using a coefficient setting device 6 according to frequency ratio information 4a from the timing recovery circuit 4. Accordingly, the clock extraction capability is enhanced in spite of the equalization processing on the playback signal by the digital equalizer.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: September 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Akira Kawabe, Akira Yamamoto
  • Patent number: 7586820
    Abstract: A pattern of an input sync signal is compared with sub patterns in a first sync pattern. The sub patterns in the first sync pattern are equal to the patterns of true sync signals, respectively. When the pattern of the input sync signal agrees with none of the sub patterns in the first sync pattern, the pattern of the input sync signal is compared with sub patterns in a second sync pattern. The sub patterns in the second sync pattern have temporal fluctuations with respect to the patterns of the true sync signals. Each of the sub patterns in the second sync pattern is assigned to only one of the true sync signals. It is determined that a sync signal is detected when the pattern of the input sync signal agrees with one of the sub patterns in the first and second sync patterns.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: September 8, 2009
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Tsuyoshi Oki
  • Publication number: 20090219797
    Abstract: Pulses that are generated from multiple analog input signals are sampled, and signal elements contained in the analog signals are extracted accurately using the said sampling pulses. Binarization circuits where analog input signals A, B, C, and D are converted into pulse signals; a logic operation circuit that generates a sampling pulse upon receiving the input of the 4 pulse signals; and a sample-and-hold circuit samples and holds an input RF signal based on the sampling pulse in order to extract accurately signal elements contained in said RF signal by means of sampling of the RF signal.
    Type: Application
    Filed: May 8, 2008
    Publication date: September 3, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Masayuki Tahara, Kenji Nanba, Tetsuya Nishiyama
  • Patent number: 7570555
    Abstract: A digital data demodulator which can reduce a loss of decodable digital data, and increase capability of reproducing digital data inputted through a transmission line even when an error occurs in the transmission line. In the digital data demodulator, a specific pattern detector (113) detects a specific pattern to be included in a modulation code, from a bit string inputted through a transmission line (104). A modulation code identifying unit (117) generates a demodulation data strobe signal (119) according to a phase of the modulation code including the specific pattern. An error corrector (121) samples demodulation data (109) in response to the demodulation data strobe signal (119) and reproduces the data to the original digital data.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: August 4, 2009
    Assignee: Panasonic Corporation
    Inventors: Makoto Okazaki, Yasushi Ueda
  • Patent number: 7561503
    Abstract: A clock generating circuit includes: a clock data extracting circuit extracting a clock data signal from a wobble signal detected from an optical disc by passing frequencies around a central frequency, which is changed responsive to the frequency of the wobble signal according to a control signal; and a signal generating circuit generating a recording clock signal, from the clock data signal, having a frequency proportional to a frequency of the wobble signal. An optical disc apparatus incorporates the clock generating circuit.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: July 14, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Isamu Moriwaki
  • Patent number: 7554889
    Abstract: A sampling rate for extracting information encoded on an optical disk is determined. First and second instances of a signal representing data encoded on the disk is detected, from which a disk rotation speed is determined. Based on the disk rotation speed, a sampling rate is determined.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: June 30, 2009
    Assignee: Zoran Corporation
    Inventors: Shay Navon, Nir Maurer, Michael Levin
  • Patent number: 7548504
    Abstract: An input sampling circuit for processing a disc read back signal to generate a digital signal includes an auto gain control (AGC) unit for adjusting a gain value of the disc read back signal, a low-pass filter/equalizer (LPF/EQ) coupled to the AGC unit for low-pass filtering/equalizing the disc read back signal to generate an output signal, and an analog-to-digital converter (ADC) coupled to the LPF/EQ for performing analog-to-digital conversion on the output signal across a conversion range that is narrower than a dynamic range of the output signal to convert the output signal into the digital signal.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: June 16, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventor: Kuang-Yu Yen
  • Patent number: 7542390
    Abstract: Technology for sampling optical disc data are described. A first sync tag signal and a data signal are provided, and the previous first sync tag signal is saved as a second sync tag signal. Then, the value of the first sync tag signal and the second sync tag signal are determined to be true or false so as to divide the data signal. Since the neighboring sync tag signals are detected simultaneously, and the timing for sampling the data in the frame is determined according to whether the two contiguous sync tag signals are true or false, the technology can reproduce optical disk data accurately.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: June 2, 2009
    Inventors: SL Ouyang, Yi-Lin Lai, Pei-Jei Hu
  • Patent number: 7460452
    Abstract: Provided are a restoration system and method for an optical disc, by which a radio frequency signal optically picked up from an optical disc is restored. The restoration system includes a slice, a phase locked loop, a latch circuit, a 3T correction circuit, and a demodulator. In particular, the 3T correction circuit includes an extension storage device, a length measuring device, a phase detector, and an extension determiner and corrects data output from the extension storage device. In the restoration method, data required for determining the need for correction and the direction of correction is detected and a plurality of steps for selecting non-correction, two directional correction, forward correction, and backward correction are performed, thereby correcting the high radio frequency signal according to conditions of the high radio frequency signal. It is preferable that the restoration system operates according to the restoration method.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-woong Lee, Dae-woong Kim
  • Publication number: 20080285406
    Abstract: Provided is an optical disc apparatus which reproduces with use of a PRML method an optical disc having data recorded in a plurality of code lengths, the optical disc apparatus including: an AD conversion unit adapted to convert a reproduction signal of the optical disc into a multi-value digital signal; a waveform equalization unit adapted to perform waveform equalization on the multi-value digital signal on the basis of a predetermined partial response to generate an equalized reproduction signal; a decoding unit adapted to generate decoded data corresponding to data recorded on the optical disc from the equalized reproduction signal; and a crest value extraction unit adapted to extract a crest value for each of the code lengths on the basis of the decoded data and a type of the predetermined partial response.
    Type: Application
    Filed: May 7, 2008
    Publication date: November 20, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyuki Moro, Yasuhiro Kanishima, Hideyuki Yamakawa, Tatsuji Ashitani
  • Patent number: 7453692
    Abstract: A modular transmission interface is provided on a motherboard. The motherboard has a South Bridge and a power transmission port. The transmission interface includes a slot connector and an adaptor board. The slot connector is provided on the motherboard, and is connected to the South Bridge and the power transmission port. The adaptor board has a board body, a mating connector provided on the board body and connected detachably to the slot connector, a hard disk connector provided on the board body and connected to the mating connector, and an optical disk drive connector provided on the board body and connected to the mating connector. A hard disk and an optical disk drive can be connected to the motherboard through the adaptor board, thereby facilitating assembly and maintenance.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: November 18, 2008
    Assignee: Aopen Inc.
    Inventor: Yuang-Chih Chen
  • Patent number: 7433289
    Abstract: The present invention relates to a frequency detection method for an optical disc bit data reproduction apparatus. The frequency detection method uses the optical disc bit data reproduction apparatus including an Analog to Digital Converter (ADC), an interpolator, an asymmetry compensator, a digital bit and successive bit length detector, a frequency detector, a phase detector and a Digital Controlled Oscillator (DCO). In the frequency detection method includes the primary frequency detection step and the secondary frequency detection step. In the primary frequency detection step, status of input RF digital bit data frequency versus sampling frequency is determined and the sampling frequency is corrected so as to allow the sampling frequency to be rapidly adjusted to the frequency of the RF digital bit data, thus primarily detecting frequency.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: October 7, 2008
    Assignee: LG Electronics Inc.
    Inventors: Eun Pyo Lee, Gun Jae Koo
  • Patent number: 7426167
    Abstract: An information layer 0 comprises a system lead-in area, data lead-in area, data area, and middle area, an information layer 1 comprises a system lead-out area, data lead-out area, data area, and middle area, an end position of the data area of layer 1 is positioned outer than a start position of the data area of layer 0, the data lead-in area comprises a guard track zone wider than a test zone in the data lead-out area, the data lead-out area comprises a guard track zone wider than a test zone and a management zone in the data lead-in area, the middle area of layer 0 comprises a guard track zone wider than a test zone in the middle area of layer 1, and the middle area of layer 1 comprises a blank zone wider than a test zone in the middle area of layer 0.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: September 16, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Watabe, Hideo Ando, Sumitaka Maruyama, Yutaka Kashihara, Akihito Ogawa
  • Patent number: 7414933
    Abstract: In a PLL circuit, a phase error of a reproduced signal is extracted in either a way based on a zero-cross timing or a way based on a self-running timing. A decision is made as to whether the reproduced signal is in a continuous-wave interval where an inversion period of the reproduced signal remains constant or in a random-wave interval where the inversion period of the reproduced signal varies at random. When the reproduced signal is in a continuous-wave interval, a phase error is extracted on the self-running-timing basis. When the reproduced signal is in a random-wave interval, a phase error is extracted on the zero-cross-timing basis. A continuous-wave interval may be replaced by a specified-pattern repetition interval where the inversion period of the reproduced signal changes in accordance with a repetition of a specified pattern.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: August 19, 2008
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Junichiro Tonami
  • Publication number: 20080159095
    Abstract: Compressed audio data for 5.1 channels stored in the DVD-ROM 11A is read by the AC-3 decoder 12 of a pseudo multi-channel stereo play-back apparatus and, after expansion, stored temporarily in a buffer 13, channel by channel. Among stored audio data stored in the buffer 13, audio data for left and right channels and for a front center channel are then subjected to the phase transformation. Audio data for left and right front channels are mixed with the phase transformed audio data by first and second mixing circuits 21 and 22 and mixed audio data are converted into analog audio signals by first and second D/A converters. The apparatus is capable of pseudo reproduction of the multi-channel audio signals stored in a recording medium such as a DVD-ROM by two channel play-back with an excellent sound effect which is not obtainable by usual two-channel play-back systems.
    Type: Application
    Filed: February 28, 2008
    Publication date: July 3, 2008
    Inventor: Satomi Shigaki
  • Patent number: 7369625
    Abstract: An apparatus and method for slicing an RF signal and compensating for the slice level of an RF signal reproduced from a disk, which minimizes a block error rate by optimizing the slice level of the RF signal according to variations in symmetry of the RF signal when slicing the RF signal. A comparator converts the RF signal reproduced from the disk into a digital signal by comparing the RF signal with a slice level, a low-pass filter low-pass filters the digital signal and provides the result to the comparator as the slice level, and a slice level compensator compensates for the slice level provided to the comparator by the low-pass filter according to variations in symmetry of the RF signal.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: May 6, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-yeup Kim, Sung-ro Go
  • Patent number: 7336574
    Abstract: An apparatus for detecting abnormal states which prevents damage to a laser diode or data recorded on a disc and swiftly correcting the abnormal state. An overflow/underflow detector detects whether overflow or underflow of the laser diode occurs, by comparing a laser diode output power control value, which is output from the laser diode output power control circuit, with an overflow setting value and an underflow setting value. A mode switch switches an operation mode of the laser diode output power control circuit from a recording mode to a reproducing mode, in response to the detection result of the overflow/underflow detector.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: February 26, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-gyo Seo