Binary Signal Detecting Using A Clock Signal Patents (Class 369/59.19)
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Patent number: 11791841Abstract: Provided are a bit flipping device and method and a computer readable program for the same. The bit flipping device for input data having a two-dimensional array pattern includes: a clustering unit configured to generate at least one input data sequence based on the two-dimensional array pattern of the input data and classify the input data sequence into at least one cluster according to a preset method; and a bit flipping unit configured to perform bit flipping on erroneous bits in the input data sequence based on the classified cluster. Therefore, it is possible to further reduce inefficiency while further reducing system complexity compared to the existing error correction code-based bit flipping method by coupling the bit flipping device to an output side of a partial response maximum likelihood (PRML) detector to classify an output value of the PRML detector into at least one cluster and perform bit flipping based on the classified result.Type: GrantFiled: July 11, 2022Date of Patent: October 17, 2023Assignee: FOUNDATION OF SOONGSIL UNIVERSITY-INDUSTRY COOPERATIONInventors: Jaejin Lee, Seongkwon Jeong
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Patent number: 11792053Abstract: A method of realization of adaptive equalization and an adaptive equalizer. The adaptive equalizer comprises an equalizer unit, which is used for equaling an input signal according to a compensation coefficient to obtain an output signal; a sampling comparison unit, which is connected to an output of the equalizer and is used for sampling a comparison result of the output signal of the equalizer and a reference voltage corresponding to reference voltage step; a data processing unit, which is connected to the sampling comparison unit and the equalizer unit. It is used for scanning a reference voltage step to determine range of the reference voltage steps to which step the amplitude of the output signal is corresponding; and scanning a compensation coefficient step, and determining the compensation coefficient for equalization according to the range of reference voltage steps.Type: GrantFiled: September 13, 2022Date of Patent: October 17, 2023Assignee: EverPro Technologies Company LimitedInventors: Liang Xu, Yan Li, Jinfeng Tian, Yufeng Cheng, Yanan Chen
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Patent number: 11430482Abstract: A data storage device is disclosed comprising a head actuated over a magnetic media, wherein the head comprises a write element, a read element, a laser, and a near field transducer. An operating thermal gradient of the magnetic media is periodically measured at an operating power setting for the laser that achieves a target magnetic write width. When a slope of the operating thermal gradient exceeds a threshold, a test thermal gradient and magnetic write width of the magnetic media is measured at multiple power settings for the laser in order to detect a contamination of the near field transducer.Type: GrantFiled: June 24, 2021Date of Patent: August 30, 2022Assignee: Western Digital Technologies, Inc.Inventors: Sukumar Rajauria, Robert Lee Smith, Taiebeh Tahmasebi
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Patent number: 11088817Abstract: The present application discloses a data transmission method, a data transmission device, and a computer readable storage medium. The data transmission method includes: determining a logic level of the data signal according to detection potential of each sampling point in the data signal, and regenerating the data signal according to the logic level and a preset amplitude.Type: GrantFiled: September 30, 2020Date of Patent: August 10, 2021Assignee: HKC Corporation LimitedInventor: Mingliang Wang
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Patent number: 10698396Abstract: An information processing apparatus has an input data acquisition unit that acquires a plurality of input data, a fault tolerance requirement acquisition unit that acquires a fault tolerance requirement for the plurality of input data, a training data definition unit that defines an output which satisfies the fault tolerance requirement, a fault pattern generation unit that generates a plurality of fault patterns which include at least one of the plurality of input data based on the plurality of input data and the fault tolerance requirement, a model update unit that updates the information processing model so as to tolerate a fault of the input data satisfying the fault tolerance requirement, and an execution control unit that applies the plurality of input data to the information processing model updated by the model update unit and executes the information processing model.Type: GrantFiled: March 9, 2018Date of Patent: June 30, 2020Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hiromasa Shin, Mitsuru Kakimoto, Yoshiaki Shiga
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Patent number: 9207741Abstract: A storage apparatus includes first and second controller modules. The first controller module monitors power states of the first and second controller modules. When the monitoring results indicate that the power state of the first controller module is an ON state and the power state of the second controller module is an ON processing state in which an ON process of switching from OFF to ON is being executed, the first controller module maintains the power state of the first controller module upon detection of a power control signal for controlling the power state of the first controller module.Type: GrantFiled: March 8, 2013Date of Patent: December 8, 2015Assignee: FUJITSU LIMITEDInventors: Nina Tsukamoto, Shigeyuki Maeda
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Patent number: 9030921Abstract: Techniques are provided for increasing spectral efficiency over data channels in a storage or communication system. In some embodiments, data may be encoded and transmitted over multiple channels. The transmitted data from the multiple channels may be considered together as a channel bundle, thereby increasing the edge transitions of the group of signals to improve clock recovery and reduce coding constraints. In some embodiments, the channel bit size is reduced to maximize data rates based on the reduced coding constraints. Furthermore, the channel bundle has only one channel with timing markers, so that a receiver may receive information from the channel bundle and recover clocking based on the timing markers in the one channel.Type: GrantFiled: June 6, 2011Date of Patent: May 12, 2015Assignee: General Electric CompanyInventors: John Anderson Fergus Ross, Michael James Hartman, John Erik Hershey, Richard Louis Zinser, Xiaolei Shi
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Patent number: 8958276Abstract: In a method of correcting a channel bit pattern that violates bi-phase modulation constraint in a bi-phase modulated portion of a high frequency modulation (HFM) signal, a sequence of channel bits is recovered from the HFM signal. The recovered sequence of channel bits is analyzed to generate a bi-phase modulation compliant sequence of channel bits based on the recovered sequence of channel bits, wherein the bi-phase modulation compliant sequence of channel bits does not violate the bi-phase modulation constraint in the bi-phase modulated portion of the HFM signal. Bi-phase modulated HFM bits are recovered from the bi-phase modulation compliant sequence of channel bits to generate a detection output corresponding to the recovered bi-phase modulated HFM bits.Type: GrantFiled: October 31, 2013Date of Patent: February 17, 2015Assignee: Marvell International Ltd.Inventors: Charles Pandana, Mats Oberg
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Patent number: 8854936Abstract: Embodiments of optical disc drives are described that perform automatic forward sense calibration of write laser power using a sample and hold sampling strategy that is automatically determined based on an automatically selected write strategy. Embodiments of the described optical disc drive may be dynamically configured to support any optical disc media, any write mode, and any write strategy. The write strategies supported may include dynamically changing write speeds and/or write power levels across the respective optical media tracks. As the optical drive is automatically configured for a selected write media/write mode/write strategy, the sample and hold sampling delays used to control the sampling of a forward sense feedback signal are also automatically configured, thereby allowing each forward sense sampling point to be aligned with an area of the forward sense feedback signal that corresponds to a power level of interest and that avoids distortion in the feedback signal.Type: GrantFiled: September 18, 2013Date of Patent: October 7, 2014Assignee: Marvell International Ltd.Inventors: Gary Christopher Maul, Tom Geukens
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Patent number: 8570849Abstract: A method for adjusting a tilt angle of an objective lens with respect to one of a multilayer optical disc having a plurality of recording layers and an optical axis of an optical information recording/reproducing apparatus, wherein a use wavelength ? and a numerical aperture NA are defined by conditions: 390<?<420 and 0.75<NA<0.90. The method includes determining the tilt angle of the objective lens such that a spot quality defined through a predetermined transparent parallel flat plate matches a predetermined standard, and tilting the objective lens to have the determined tilt angle. When t1 represents a thickness of the predetermined transparent parallel flat plate and t2 represents a design protective layer thickness at which a coma caused when off-axis light is incident on the objective lens becomes smallest, t1 and t2 satisfy: ?0.015<t1?t2<0.005.Type: GrantFiled: April 28, 2011Date of Patent: October 29, 2013Assignee: Hoya CorporationInventors: Satoshi Inoue, Shuichi Takeuchi
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Patent number: 8477582Abstract: Devices, systems, methods, and other embodiments associated with clocking a radio frequency channel are described. In one embodiment, an apparatus includes a wobble channel logic configured to at least partially decode a digital wobble signal and configured to control a time base generator to generate a clock signal that is synchronized to wobble data. The apparatus further includes scaling logic to scale the clock signal to produce a scaled clock signal, and radio frequency channel logic configured to at least partially decode a digital radio frequency signal. The radio frequency channel logic is configured to be clocked by the clock signal and the wobble channel logic is configured to be clocked by the scaled clock signal.Type: GrantFiled: June 11, 2012Date of Patent: July 2, 2013Assignee: Marvell International Ltd.Inventors: Jin Xie, Jingfeng Liu
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Patent number: 8462602Abstract: A data recovery device including an analog to digital converter (ADC), a filtering-equalizing unit, a zero crossing detector, a data phase locked loop, a data mapping unit and an estimation unit is provided. The ADC converts a radio frequency signal to a plurality of sampling data points. The sampling data points are converted to a plurality of retiming data points and a clock signal by the filtering-equalizing unit, the zero crossing detector and the data phase locked loop. The data mapping unit selects a plurality of maximum data points and minimum data points from the returning data points, and determines whether to map the maximum data points and the minimum data points to other levels for partially reconstructing the retiming data points. The estimation unit recovers the reconstructed retiming data points to a modulation signal.Type: GrantFiled: March 4, 2011Date of Patent: June 11, 2013Assignee: Sunplus Technology Co., Ltd.Inventors: Shih-Hsien Liu, Zhieng-Chung Chen
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Patent number: 8446807Abstract: A super-resolution medium (1) has a medium identification information for specifying a type of medium recorded in a medium information area (3) by use of pre-pits having a length not shorter than a length of a resolution limit of an optical system in a reproducing device (10).Type: GrantFiled: June 11, 2010Date of Patent: May 21, 2013Assignee: Sharp Kabushiki KaishaInventors: Hideharu Tajima, Masaki Yamamoto, Go Mori, Nobuyuki Takamori
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Patent number: 8339917Abstract: Aspects of the disclosure provide a signal processing circuit. The signal processing circuit includes an analog to digital converter (ADC) configured to receive an analog input signal, sample the analog input signal based on a sampling clock signal, and convert the sampled analog input signal into a digital output signal, an equalizer configured to equalize the digital output signal, a phase-shift module configured to phase-shift the equalized digital output signal based on a phase-shift signal, and a timing compensation module coupled to the phase-shift module to detect a timing error, and to adjust the phase-shift signal based on the timing error.Type: GrantFiled: September 27, 2011Date of Patent: December 25, 2012Assignee: Marvell International Ltd.Inventors: Jin Xie, Mats Oberg
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Patent number: 8331208Abstract: An information readout device includes an equalizer and a maximum likelihood detector. The equalizer includes a second-order Volterra filter, and equalizes a readout signal read out from an information recording medium to a predetermined characteristic to output the equalization signal. The maximum likelihood detector outputs a binary signal through maximum likelihood detection based on the equalization signal. By limiting the number of second-order terms of the second-order Volterra filter to three terms or four terms, a nonlinear component can be effectively corrected.Type: GrantFiled: February 8, 2008Date of Patent: December 11, 2012Assignee: NEC CorporationInventor: Yutaka Yamanaka
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Publication number: 20120307617Abstract: Techniques are provided for increasing spectral efficiency over data channels in a storage or communication system. In some embodiments, data may be encoded and transmitted over multiple channels. The transmitted data from the multiple channels may be considered together as a channel bundle, thereby increasing the edge transitions of the group of signals to improve clock recovery and reduce coding constraints. In some embodiments, the channel bit size is reduced to maximize data rates based on the reduced coding constraints. Furthermore, the channel bundle has only one channel with timing markers, so that a receiver may receive information from the channel bundle and recover clocking based on the timing markers in the one channel.Type: ApplicationFiled: June 6, 2011Publication date: December 6, 2012Applicant: GENERAL ELECTRIC COMPANYInventors: John Anderson Fergus Ross, Michael James Hartman, John Erik Hershey, Richard Louis Zinser, Xiaolei Shi
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Patent number: 8315128Abstract: Various embodiments of the present invention provide apparatuses, systems and methods for heat assisted magnetic recording. For example, an apparatus is disclosed that includes a signal generator operable to generate laser trigger pulses at the transition rate of the magnetic write data signal, a variable delay element operable to control an alignment between the laser pulse control signal and the magnetic write data signal, a phase difference detector operable to control the variable delay element, a triggerable pulse generator circuit operable to generate a laser pulse control signal based on the laser trigger pulses, a magnetic write head operable to record data to a magnetic storage medium under control of the magnetic write data signal, and a laser diode operable to heat the magnetic storage medium under control of the laser pulse control signal.Type: GrantFiled: January 9, 2012Date of Patent: November 20, 2012Assignee: LSI CorporationInventors: Ross S. Wilson, Jason S. Goldberg
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Patent number: 8300514Abstract: In the invention, a movable lens varying the rate of convergence or divergence of light reaching an objective lens by moving in an optical axis direction has its position adjusted to correspond to ambient temperature. The objective lens is arranged to be tilted with respect to an optical axis of light reaching the objective lens from the movable lens. First coma aberration of which the amount produced varies according to movement of the movable lens, and second coma aberration of which the amount produced varies due to variation in the warping state of an optical disc that is caused along with variation in ambient temperature both occur in the radius direction of the optical disc, and the objective lens has its tilting direction adjusted such that the first coma aberration and the second coma aberration have their increasing and decreasing directions of the amount of coma aberration produced with respect to variation in ambient temperature reversed.Type: GrantFiled: October 6, 2009Date of Patent: October 30, 2012Assignee: Funai Electric Co., Ltd.Inventor: Noritaka Tanabe
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Patent number: 8289314Abstract: A method of modulating and demodulating a signal includes modulating data information included in an input data signal provided from an external source and clock information included in an input clock signal provided from the external source into a transmission signal, using (n+1) delay clock signals generated based on the input clock signal, where n is a natural number. The transmission signal is demodulated into an output clock signal including restored clock information and an output data signal including restored data information, using (m+1) delay clock signals generated based on the clock information, where m is a natural number less than n.Type: GrantFiled: September 29, 2009Date of Patent: October 16, 2012Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB FoundationInventors: Weon-Jun Choe, Ah-Reum Kim, Kyo-Jin Choo, Deog-Kyoon Jeong, Do-Hwan Oh, Hee-Soo Song
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Patent number: 8284648Abstract: An optical disk apparatus is provided that has a signal processing circuit for equalizing a signal so as to achieve predetermined equalization, in which interference between codes is permitted, by means of an adaptive equalization circuit or the like, and for performing binarization by means of a maximum likelihood decoding circuit in which interference is performed as a rule, and thereby achieves stabilized signal reproduction in a narrow-band transmission. When evaluating the quality of the recorded signal through the use of the recording parameter learning and the reproduction system such as recorded signal verification, the optical disk recording apparatus is capable of highly precisely evaluating the quality of the recorded signal by fixing a circuit characteristic after suspending the optimization operation of the adaptive equalization circuit or the like for optimizing the characteristic by the reproduced signal. An optical disk recording method is also provided.Type: GrantFiled: November 15, 2007Date of Patent: October 9, 2012Assignee: Hitachi, Ltd.Inventors: Koichiro Nishimura, Junya Iizuka, Manabu Katsuki, Takakiyo Yasukawa
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Patent number: 8270269Abstract: An asynchronous timing detector 3 detects and measures a specific pattern (sync pattern) of audio and video reproduced signals having a digital value form an A/D converter 2 and its appearance interval based on an asynchronous clock generated by an asynchronous clock generator 4, and calculates a cycle ratio of the measured sync pattern appearance interval (the number of clock pulses of the asynchronous clock) to a normal value (the number of clock pulses of a synchronous clock obtained by measuring a sync pattern appearance interval using the synchronous clock). A pseudo-synchronous clock generator 7 thins the asynchronous clock based on the cycle ratio to generate a pseudo-synchronous clock which is pseudo-synchronous with channel data. Therefore, even when an initial frequency error is large, frequency and phase pull-in is relatively quickly performed until a timing recovery operation becomes stable.Type: GrantFiled: November 11, 2005Date of Patent: September 18, 2012Assignee: Panasonic CorporationInventors: Hiroki Mouri, Akira Yamamoto
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Patent number: 8264932Abstract: An optical disc device and an adjusting method for a recording condition for use with the optical disc device that records data into an optical disc medium by using codes whose shortest run length is 2T and reproduces the recorded data by using an adaptive equalizing procedure and a PRML procedure, wherein the recording condition is so adjusted that a reproduced signal with desired quality can be obtained, by using, as the adaptive equalizing procedure, a procedure in which a tap coefficient Cn is set to a value obtained by averaging values of a tap coefficient an renewed by a LMS method, located symmetrically with each other along the time axis.Type: GrantFiled: July 27, 2011Date of Patent: September 11, 2012Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Hiroyuki Minemura, Takahiro Kurokawa
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Patent number: 8243571Abstract: A reproduction signal evaluation method according to the present invention relates to adjustment of an edge portion between a shortest mark and a shortest space in a data sequence including marks and spaces in combination that is recordable on an information recording medium. In a pattern including a shortest mark and a shortest space adjacent before or after the shortest mark, a shift amount of an edge of the shortest mark is obtained from a differential metric calculated regarding one of a first pattern in which a space adjacent to the shortest mark and not adjacent to the shortest space is longer than the shortest space; and a second pattern in which a mark adjacent to the shortest space and not adjacent to the shortest mark is longer than the shortest mark.Type: GrantFiled: September 29, 2009Date of Patent: August 14, 2012Assignee: Panasonic CorporationInventors: Kiyotaka Ito, Yasumori Hino, Harumitsu Miyashita, Isao Kobayashi
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Patent number: 8238207Abstract: A technique capable of realizing a power saving in a device for reproducing/recording digital signals by properly controlling a frequency of a clock. The device for reproducing/recording digital signals (device for reproducing an optical disk) includes: a difference comparing circuit for comparing a first parameter (demodulating block counter) updated each time a process for one correcting block is done in a demodulating circuit with a second parameter (error correcting block counter) updated each time a process of one correcting block is done in an error correcting circuit; and a circuit (clock controlling circuit etc.) for switching a frequency of a master clock (MCLK) depending on a comparison result of the difference comparing circuit. Thereby, the frequency of the clock can be switched both of when the demodulation for one correcting block is ended and when the correcting process for one correcting block is ended by using the switched master clock.Type: GrantFiled: July 4, 2011Date of Patent: August 7, 2012Assignee: Renesas Electronics CorporationInventor: Yutaka Nagai
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Publication number: 20120163147Abstract: A synchronization detecting circuit detects a synchronous signal from a reproduced signal of a recording medium in which a random shift method is employed. A window generator in the synchronization detecting circuit generates a third window having as a central phase one predicted phase in a second predicted coordinate that is obtained by replicating a first predicted coordinate indicating a predicted phase of each synchronous signal that repeatedly appears in the reproduced signal and having a phase width equivalent to twice a random shift width when the synchronous signal is not detected using a first window after the synchronous signal is detected using a second window by a synchronization detector.Type: ApplicationFiled: March 2, 2012Publication date: June 28, 2012Inventor: Hiroyuki SHIN-E
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Publication number: 20120163148Abstract: A synchronization detecting circuit detects a synchronous signal from a reproduced signal of a recording medium in which a random shift method is employed. A window generator in the synchronization detecting circuit generates a third window having as a central phase one predicted phase in a second predicted coordinate that is obtained by replicating a first predicted coordinate indicating a predicted phase of each synchronous signal that repeatedly appears in the reproduced signal and having a phase width equivalent to twice a random shift width when the synchronous signal is not detected using a first window after the synchronous signal is detected using a second window by a synchronization detector.Type: ApplicationFiled: March 2, 2012Publication date: June 28, 2012Inventor: Hiroyuki SHIN-E
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Patent number: 8203922Abstract: A reproduction signal evaluation method according to the present invention relates to adjustment of an edge portion between a shortest mark and a shortest space in a data sequence including marks and spaces in combination that is recordable on an information recording medium. In a pattern including a shortest mark and a shortest space adjacent before or after the shortest mark, a shift amount of an edge of the shortest mark is obtained from a differential metric calculated regarding one of a first pattern in which a space adjacent to the shortest mark and not adjacent to the shortest space is longer than the shortest space; and a second pattern in which a mark adjacent to the shortest space and not adjacent to the shortest mark is longer than the shortest mark.Type: GrantFiled: September 29, 2009Date of Patent: June 19, 2012Assignee: Panasonic CorporationInventors: Kiyotaka Ito, Yasumori Hino, Harumitsu Miyashita, Isao Kobayashi
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Patent number: 8199626Abstract: Devices, systems, methods, and other embodiments associated with clocking a radio frequency channel are described. In one embodiment, an apparatus includes a wobble channel logic configured to at least partially decode a digital wobble signal and configured to control a time base generator to generate a clock signal that is synchronized to wobble data. The apparatus further includes downsampling logic to scale the clock signal to produce a scaled clock signal, and a radio frequency channel logic to at least partially decode a digital radio frequency signal. The clocking signal is connected to clock the radio frequency channel logic, and the scaled clocking signal is connected to clock the wobble channel logic.Type: GrantFiled: July 1, 2011Date of Patent: June 12, 2012Assignee: Marvell International LtdInventors: Jin Xie, Jingfeng Liu
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Patent number: 8179760Abstract: A reproduction signal evaluation method according to the present invention relates to adjustment of an edge portion between a shortest mark and a shortest space in a data sequence including marks and spaces in combination that is recordable on an information recording medium. In a pattern including a shortest mark and a shortest space adjacent before or after the shortest mark, a shift amount of an edge of the shortest mark is obtained from a differential metric calculated regarding one of a first pattern in which a space adjacent to the shortest mark and not adjacent to the shortest space is longer than the shortest space; and a second pattern in which a mark adjacent to the shortest space and not adjacent to the shortest mark is longer than the shortest mark.Type: GrantFiled: October 5, 2009Date of Patent: May 15, 2012Assignee: Panasonic CorporationInventors: Kiyotaka Ito, Yasumori Hino, Harumitsu Miyashita, Isao Kobayashi
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Patent number: 8174949Abstract: Various embodiments of the present invention provide systems, methods and media formats for processing user data derived from a storage medium. As an example, a system is described that includes a storage medium with a series of data. The series of data includes a servo data and a user data region. The user data region includes a first synchronization pattern and a second synchronization pattern located a distance from the first synchronization pattern. A storage buffer is provided that is operable to receive at least a portion of the series of data. A retiming circuit calculates an initial phase offset and frequency offset for a defined bit within the storage buffer using a first location of the first synchronization pattern and a second location of the second synchronization pattern. An error correction loop circuit re-samples the series of data from the storage buffer based at least in part on the initial phase offset and a frequency offset.Type: GrantFiled: July 2, 2009Date of Patent: May 8, 2012Assignee: LSI CorporationInventor: Nayak Ratnakar Aravind
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Publication number: 20120087225Abstract: A digital PLL (phase locked loop) circuit (and method thereof), includes an AAF (anti aliasing filter) that limits a frequency bandwidth of an input RF (radio frequency) signal on the basis of a given cutoff frequency, an ADC (analog to digital converter) that samples an output signal of the AAF on the basis of a given sampling frequency, a down converter that converts a data rate of the ADC, and a digital phase tracking unit that generates a synchronous clock signal from an output signal of the down converter on the basis of a given internal frequency. The cutoff frequency and the sampling frequency are fixed, respectively, even when a frequency bandwidth of the RF signal fluctuates. The down converter reduces the data rate according to an increase in the frequency bandwidth of the RF signal.Type: ApplicationFiled: September 22, 2011Publication date: April 12, 2012Applicant: Renesas Electronics CorporationInventor: Hiromi Honma
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Publication number: 20120075976Abstract: A data recovery device including an analog to digital converter (ADC), a filtering-equalizing unit, a zero crossing detector, a data phase locked loop, a data mapping unit and an estimation unit is provided. The ADC converts a radio frequency signal to a plurality of sampling data points. The sampling data points are converted to a plurality of retiming data points and a clock signal by the filtering-equalizing unit, the zero crossing detector and the data phase locked loop. The data mapping unit selects a plurality of maximum data points and minimum data points from the returning data points, and determines whether to map the maximum data points and the minimum data points to other levels for partially reconstructing the retiming data points. The estimation unit recovers the reconstructed retiming data points to a modulation signal.Type: ApplicationFiled: March 4, 2011Publication date: March 29, 2012Applicant: SUNPLUS TECHNOLOGY CO., LTD.Inventors: Shih-Hsien Liu, Zhieng-Chung Chen
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Patent number: 8130607Abstract: An apparatus for detecting burst cutting areas on optical discs includes an optical pickup head, a front-end processing unit, a sync pattern detector, a channel clock recovery device, and a data demodulator. The front-end processing unit generates a BCA signal in response to a radio frequency signal. The sync pattern detector counts the BCA signal according to a reference clock, detects a sync pattern of the BCA signal and outputs a channel bit length counting value. The channel clock recovery device generates a channel clock according to the reference clock and the channel bit length counting value. The data demodulator transfers the BCA signal into a BCA data according to the channel clock. The sync pattern detector continuously counts the BCA signal and continuously outputs a plurality of counting values, so that the sync pattern of the BCA signal can be determined according to at least three sequential counting values.Type: GrantFiled: September 23, 2009Date of Patent: March 6, 2012Assignee: Sunplus Technology Co., Ltd.Inventors: Chia-Ming Chang, Chun-Nan Liu, Ping-Chiang Yang
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Patent number: 8089845Abstract: The generation of a pseudo-lock is prevented in a JFB offset compensator whose use has been conventionally limited due to a tendency to generate the pseudo-lock, and performance degradation of a PLL and a Viterbi decoder is suppressed. A means for monitoring an offset of a read signal is provided independently from the JFB offset compensator. With this configuration, the generation or a possibility of the generation of the pseudo-lock can be detected to reset an integrator. In order to reduce the influence of a large sporadic offset triggering the pseudo-lock, there may also be provided a limitter for limiting the absolute value of an offset signal inputted to the integrator or a limitter for limiting the absolute value of an offset compensation signal.Type: GrantFiled: November 14, 2008Date of Patent: January 3, 2012Assignees: Hitachi, Ltd., Hitachi-LG Data Storage, Inc.Inventor: Atsushi Kikugawa
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Patent number: 8064310Abstract: An optical disk recording device that detects a shift of the recording position with respect to an optical disk, has a pre-pit distribution detecting circuit that detects the distribution of pre-pits for a plurality of wobbles based on binarized pre-pit signals obtained by binarizing pre-pit signals corresponding to pre-pits on said optical disk and a wobble counter value obtained by counting said binarized pre-pit signals in synchronization with a locked wobble, which is a wobble signal having a period corresponding to a wobble on said optical disk and fixed in phase; and a wobble slip determining circuit that compares the distribution of said pre-pits detected by said pre-pit distribution detecting circuit and a reference pre-pit distribution corresponding to a desired recording position, thereby determining the shift amount of the recording position with respect to said desired recording position for each wobble.Type: GrantFiled: June 15, 2007Date of Patent: November 22, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Tomoyuki Maekawa
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Patent number: 8040777Abstract: An information recording method using a recording medium includes forming a plurality of recording pulses in accordance with both a reference waveform having been stored in the recording medium and data regarding a shifting value relying on material of the recording medium also having been stored in the recording medium in a table manner, and recording information included in the plurality of recording pulses to the recording medium. The recording information is arranged to be stored according to the material of the recording medium.Type: GrantFiled: June 14, 2007Date of Patent: October 18, 2011Assignee: Hitachi, Ltd.Inventors: Takeshi Maeda, Hirofumi Sukeda, Hiroyuki Minemura, Hidehiko Kando, Makoto Miyamoto
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Patent number: 8031573Abstract: Aspects of the disclosure provide a signal processing circuit to reconstruct data from an analog signal. The signal processing circuit includes an analog to digital converter (ADC), an equalizer, a first timing compensation module, a phase-shift module and a second timing compensation module. The ADC receives an analog input signal, samples the analog input signal based on a sampling clock signal, and converts the sampled analog input signal into a digital output signal. The equalizer equalizes the digital output signal. The first timing compensation module detects a first timing error based on the digital output signal, and adjusts the sampling clock signal based on the first timing error. The phase-shift module phase-shifts the equalized digital output signal based on a phase-shift signal. The second timing compensation module detects a second timing error based on the equalized digital output signal, and adjusts the phase-shift signal based on the second timing error.Type: GrantFiled: April 26, 2010Date of Patent: October 4, 2011Assignee: Marvell International Ltd.Inventors: Jin Xie, Mats Oberg
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Patent number: 8018798Abstract: A demodulation circuit accurately demodulates a wobble signal of an optical disk without being affected by a phase shift induced by crosstalk. An A-D converter subjects wobble signal reproduced from an optical disk to A-D conversion and feeds a result of conversion to a zero-crossing detection circuit. The zero-crossing detection circuit detects zero-crossing points of the wobble signal. A sinusoidal wave generation circuit generates a sinusoidal wave by means of sequentially connecting sinusoidal wave elements whose periods are each equal to a time interval between zero-crossing points. A multiplier multiplies an original wobble signal by a sinusoidal wave signal. A slicer detects an HMW-modulated portion of the wobble signal, and another slicer detects an MSK-modulated portion of the wobble signal.Type: GrantFiled: March 25, 2008Date of Patent: September 13, 2011Assignee: TEAC CorporationInventor: Keishi Ueno
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Publication number: 20110199878Abstract: According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer.Type: ApplicationFiled: April 25, 2011Publication date: August 18, 2011Inventors: Koji TAKAZAWA, Seiji Morita, Kazuyo Umezawa, Naoki Morishita, Yasuaki Ootera, Hideo Ando, Naomasa Nakamura
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Publication number: 20110199879Abstract: According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer.Type: ApplicationFiled: April 26, 2011Publication date: August 18, 2011Inventors: Koji TAKAZAWA, Seiji Morita, Kazuyo Umezawa, Naoki Morishita, Yasuaki Ootera, Hideo Ando, Naomasa Nakamura
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Patent number: 8000200Abstract: A modulation control system for use with a high frequency modulator is described. This system comprises a latch for selectively receiving enable signals, wherein the latch transmits a latched signal in response to receiving at least two of the enable signals; a selection device coupled to the latch for receiving the latched signal, a voltage source, and a terminal for receiving at least one of the enable signals, wherein the selection device transmits a selected signal; and a logic device coupled to the selection device and a terminal for receiving a modulated enable signal, wherein the logic device transmits a synchronized signal for either enabling or disabling the high frequency modulator in response to receiving the selected signal associated with at least one of the enable signals.Type: GrantFiled: December 16, 2009Date of Patent: August 16, 2011Assignee: Texas Instruments IncorporatedInventors: Akihiko Doi, Shengyuan Li, Lundy Findlay Taylor
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Publication number: 20110194395Abstract: According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer.Type: ApplicationFiled: April 21, 2011Publication date: August 11, 2011Inventors: Koji TAKAZAWA, Seiji Morita, Kazuyo Umezawa, Naoki Morishita, Yasuaki Ootera, Hideo Ando, Naomasa Nakamura
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Publication number: 20110194394Abstract: According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer.Type: ApplicationFiled: April 20, 2011Publication date: August 11, 2011Inventors: Koji TAKAZAWA, Seiji Morita, Kazuyo Umezawa, Naoki Morishita, Yasuaki Ootera, Hideo Ando, Naomasa Nakamura
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Patent number: 7978572Abstract: A technique capable of realizing a power saving in a device for reproducing/recording digital signals by properly controlling a frequency of a clock. The device for reproducing/recording digital signals (device for reproducing an optical disk) includes: a difference comparing circuit for comparing a first parameter (demodulating block counter) updated each time a process for one correcting block is done in a demodulating circuit with a second parameter (error correcting block counter) updated each time a process of one correcting block is done in an error correcting circuit; and a circuit (clock controlling circuit etc.) for switching a frequency of a master clock (MCLK) depending on a comparison result of the difference comparing circuit. Thereby, the frequency of the clock can be switched both of when the demodulation for one correcting block is ended and when the correcting process for one correcting block is ended by using the switched master clock.Type: GrantFiled: May 14, 2009Date of Patent: July 12, 2011Assignee: Renesas Electronics CorporationInventor: Yutaka Nagai
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Patent number: 7974169Abstract: Devices, systems, methods, and other embodiments associated with wobble channel clocking are described. In one embodiment, an apparatus implemented with a clock generator, a clock scaling logic, radio frequency channel logic, and wobble channel log. The clock generator generates a clocking signal. The clock scaling logic scales the clocking signal to produce a scaled clocking signal. The radio frequency channel logic at least partially decodes a digital radio frequency signal from an optical disk. The wobble channel logic at least partially decodes a digital wobble signal from the optical disk. Either the clocking signal or the scaled clocking signal is used to clock the radio frequency channel logic, and the other clocking signal or the scaled clocking signal is used to clock the wobble channel.Type: GrantFiled: April 3, 2009Date of Patent: July 5, 2011Assignee: Marvell International Ltd.Inventors: Jin Xie, Jingfeng Liu
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Patent number: 7974162Abstract: A digital data demodulator which can reduce a loss of decodable digital data, and increase capability of reproducing digital data inputted through a transmission line even when an error occurs in the transmission line. In the digital data demodulator, a specific pattern detector (113) detects a specific pattern to be included in a modulation code, from a bit string inputted through a transmission line (104). A modulation code identifying unit (117) generates a demodulation data strobe signal (119) according to a phase of the modulation code including the specific pattern. An error corrector (121) samples demodulation data (109) in response to the demodulation data strobe signal (119) and reproduces the data to the original digital data.Type: GrantFiled: June 18, 2008Date of Patent: July 5, 2011Assignee: Panasonic CorporationInventors: Makoto Okazaki, Yasushi Ueda
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Patent number: 7965597Abstract: Aspects of the disclosure provide a method for recording. The method includes receiving a tracking signal corresponding to a recording track on a storage medium, phase-locking an internal signal to the tracking signal by reducing a phase error generated based on the internal signal and the tracking signal, generating a phase bias, combining the phase bias into the phase error to phase-shift the internal signal from the tracking signal, and recording on the recording track based on the internal signal.Type: GrantFiled: July 8, 2010Date of Patent: June 21, 2011Assignee: Marvell International, Ltd.Inventors: Mats Oberg, Zachary Keirn
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Patent number: RE42535Abstract: An optical disc drive for recording and playing back a recordable-type optical disc includes a driving mechanism for rotating the optical disc, an optical pick-up for writing and reading data to and from the optical disc, signal processor for processing signals read out from the optical disc by means of the optical pick-up, a CPU for controlling the driving mechanism, the optical pick-up and the signal processor. The optical disc drive is further equipped with a detecting device for detecting an ATIP error and a counter for counting the number of ATIP errors. The optical disc drive counts the number of ATIP errors caused in a predetermined time based on the synchronization signal (SUBCODE-SYNC) produced by a clock provided in the optical disc drive after the synchronization signal (SUBCODE-SYNC) has been synchronized with a synchronization signal (ATIP-SYNC) obtained from a reference optical disc.Type: GrantFiled: October 29, 2002Date of Patent: July 12, 2011Assignee: Mitsumi Electric Co, LtdInventor: Junichi Andoh
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Patent number: RE43337Abstract: A pre-treating circuit for accessing the disc and a method thereof, which are especially used for treating the signal waveform that violates the encoding rule of the disc information, are provided. The present invention can modulate the signal waveform that violates the encoding rule, so that the waveform is not changed during at least 3 continuous periods of the clock signal. The present invention also replaces any wrong 16-bit data which violate the encoding rule, with approximated 16-bit data before they are decoded, or receives approximated 8-bit data which correspond to the incorrect 16-bit data, by directly referring to a table. Therefore, the subsequent decoding module can acquire more data for continuous processing, so as to improve the data reading reliability and to prevent the “picky disc” or “disc error reading” problem from happening.Type: GrantFiled: August 28, 2009Date of Patent: May 1, 2012Assignee: Tian Holdings, LLCInventor: Sl Ouyang
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Patent number: RE44808Abstract: An optical disc drive having an optical pickup head emitting a light beam to an optical storage medium, detecting the light beam reflected from the optical storage medium, and outputting a signal based on the received reflected light, having a jitter measuring unit measuring jitter in signals output from the optical pickup head and having an evaluation unit determining from the measured jitter if the optical storage medium is good or defective. The jitter measuring unit measures jitter in a train of 3T or longer marks or spaces from an optical storage medium to which digital information is recorded as a train of marks or spaces of length kT based on a period T and an integer k of two or more.Type: GrantFiled: January 8, 2013Date of Patent: March 18, 2014Assignee: Panasonic CorporationInventors: Shin-ichi Kadowaki, Mamoru Shoji, Atsushi Nakamura, Takashi Ishida