Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for training and deploying machine-learning estimation networks in a communications system. One of the methods includes: processing first information with ground truth information to generate a first RF signal by altering the first information by channel impairment having at least one channel effect, using a receiver to process the first RF signal to generate second information, training a machine-learning estimation network based on a network architecture, the second information, and the ground truth information, receiving by the receiver a second RF signal transmitted through a communication channel including the at least one channel effect, inferring by the trained estimation network the receiver to estimate an offset of the second RF signal caused by the at least one channel effect, and correcting the offset of the RF signal with the estimated offset to obtain a recovered RF signal.

Abstract: A method and apparatus for adapting an equalizer coefficients to a channel comprising filtering a high frequency error monitor slicer output and a data slicer output to isolate selected high frequency symbol values. Filtering a low frequency error monitor slicer output and the data slicer output to isolate selected low frequency symbol values. Generating a high frequency error monitor slicer threshold signal with a first adaptation module. Generating a low frequency error monitor slicer threshold signal with the first adaptation module or a second adaption module. Combining the high frequency error monitor slicer threshold signal and the low frequency error monitor slicer threshold signal to generate a difference signal. Integrating the difference signal with an accumulator to generate equalizer coefficients to adapt the equalizer to the channel. Providing the high frequency and low frequency error monitor slicer threshold signal to respective slicers.

Abstract: An interstitial creator provides an interstitial creation interface for display on a user device, the interstitial creation interface facilitating addition of an interstitial to a playlist comprising pointers to media files of media items to be played one after another on the user device without user interaction. The interstitial creator receives, through the interstitial creation interface, user input specifying interstitial configuration parameters for the interstitial, and creates the interstitial based on an interstitial template and the received interstitial configuration parameters, wherein the created interstitial is supplemental content to be added before or after one of the media files of the media items.

Abstract: [Object] To provide an information processing apparatus by which sound can be smoothly re-listened to. [Solution] There is provided an information processing apparatus including: a reproduction processing unit that performs reproduction of a recorded sound on a basis of a reproduction start instruction for starting re-listening of the recorded sound from a position tracking back a predetermined time from a reproduction start time, at which the reproduction start instruction is input, to a position of a present time.

Abstract: An optically-based target detection system includes a holographic detection filter designed to produce a concentrated spot when a target is present.

Abstract: A personal digital ID device provides a digital identifier to a service for a predetermined duration in response to user interaction. The user interaction may include a button press. The personal digital ID device may be in the form of a bracelet, a key fob, or other form factor. The service may be provided by a mobile device, in the cloud, or elsewhere.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for priority based data processing.

Abstract: Embodiments of optical disc drives are described that perform automatic forward sense calibration of write laser power using a sample and hold sampling strategy that is automatically determined based on an automatically selected write strategy. Embodiments of the described optical disc drive may be dynamically configured to support any optical disc media, any write mode, and any write strategy. The write strategies supported may include dynamically changing write speeds and/or write power levels across the respective optical media tracks. As the optical drive is automatically configured for a selected write media/write mode/write strategy, the sample and hold sampling delays used to control the sampling of a forward sense feedback signal are also automatically configured, thereby allowing each forward sense sampling point to be aligned with an area of the forward sense feedback signal that corresponds to a power level of interest and that avoids distortion in the feedback signal.

Abstract: A data recovery method includes the following steps. Firstly, plural sampling values are classified into a first group, a second group, a third group and a fourth group. A first channel estimation value and a second channel estimation value are generated according to the sampling values of the second group and the third group. A judging step is performed to judge whether a first sampling value of the first group is lower than the first channel estimation value or a second sampling value of the fourth group is higher than the second channel estimation value. If the judging condition is satisfied, a polarity of the first sampling value or the second sampling value is changed and then the plural sampling values are outputted. If the judging condition is not satisfied, the plural sampling values are directly outputted.

Abstract: When a phase shift is to be evaluated, based on a difference between an output from a waveform equalization circuit to equalize an input reproduced signal to a predetermined target equalization characteristic and the target equalization characteristic, the phase shift of the reproduced signal relative to a channel clock, a group delay characteristic with respect to the frequency of the waveform equalization circuit is fixed. Hence, an equalized waveform as an output from the waveform equalization circuit can preserve phase shift information of the inputted reproduced signal to correctly detect the phase shift of the reproduced waveform using the equalized waveform. It is hence possible to realize, with high precision, optimal value learning of various parameters for the recording, reproduction, and servo by use of the phase shift as an index.

Abstract: An approach is described that allows an optical disc drive to accurately verify the power level of irradiation beam power levels associated a write strategy used in high speed, high density optical disc media formats using a front monitor diode with a relatively slow rise time and/or relative slow fall time compared to the clock cycle speed of the write strategy signal. A portion of encoded data to be written to an optical disc media may be overwritten to include a predetermined data pattern. During write strategy processing of the data, the predetermined data pattern is replaced with a constant write strategy power level. The constant write strategy output placed within the write strategy signal may control the optical disc drive laser to emit a constant irradiation beam for a duration sufficiently long to allow the front monitor diode to obtain an accurate measure of the irradiation beam power level.

Abstract: Embodiments of optical disc drives are described that perform automatic forward sense calibration of write laser power using a sample and hold sampling strategy that is automatically determined based on an automatically selected write strategy. Embodiments of the described optical disc drive may be dynamically configured to support any optical disc media, any write mode, and any write strategy. The write strategies supported may include dynamically changing write speeds and/or write power levels across the respective optical media tracks. As the optical drive is automatically configured for a selected write media/write mode/write strategy, the sample and hold sampling delays used to control the sampling of a forward sense feedback signal are also automatically configured, thereby allowing each forward sense sampling point to be aligned with an area of the forward sense feedback signal that corresponds to a power level of interest and that avoids distortion in the feedback signal.

Abstract: Devices, systems, methods, and other embodiments associated with clocking a radio frequency channel are described. In one embodiment, an apparatus includes a wobble channel logic configured to at least partially decode a digital wobble signal and configured to control a time base generator to generate a clock signal that is synchronized to wobble data. The apparatus further includes scaling logic to scale the clock signal to produce a scaled clock signal, and radio frequency channel logic configured to at least partially decode a digital radio frequency signal. The radio frequency channel logic is configured to be clocked by the clock signal and the wobble channel logic is configured to be clocked by the scaled clock signal.

Abstract: A system with a nonlinear element processes a replay signal with a scaling factor into a signal compensated for asymmetry. The replay signal may include data from an optical disk. The scaling factor may be estimated based on the compensated signal and a scaling factor gain. The replay signal and the compensated signal may be converted into digital signals and processed digitally. In one embodiment, the compensated signal may be calculated as approximately the scaling factor multiplied by a square of an amplitude of the replay signal added to the amplitude of the replay signal. In another embodiment, the compensated signal may be calculated as approximately the scaling factor multiplied by an absolute value of an amplitude of the replay signal added to the amplitude of the replay signal. A related method is also disclosed. Other embodiments are provided, and each of the embodiments described herein can be used alone or in combination with one another.

Abstract: Described are techniques for identifying a data storage volume exhibiting a performance problem. First information indicating a sorted ordering of a plurality of maximum response times is displayed for a plurality of data storage volume. A first of the plurality of data storage volumes having a largest one of the plurality of maximum response times is selected. In response to such selecting, additional information is displayed in the user interface about the first data storage volume. The additional information includes at least one workload or performance characteristic of the first data storage volume.

Abstract: A data recovery device including an analog to digital converter (ADC), a filtering-equalizing unit, a zero crossing detector, a data phase locked loop, a data mapping unit and an estimation unit is provided. The ADC converts a radio frequency signal to a plurality of sampling data points. The sampling data points are converted to a plurality of retiming data points and a clock signal by the filtering-equalizing unit, the zero crossing detector and the data phase locked loop. The data mapping unit selects a plurality of maximum data points and minimum data points from the returning data points, and determines whether to map the maximum data points and the minimum data points to other levels for partially reconstructing the retiming data points. The estimation unit recovers the reconstructed retiming data points to a modulation signal.

Abstract: A digital PLL (phase locked loop) circuit (and method thereof), includes an AAF (anti aliasing filter) that limits a frequency bandwidth of an input RF (radio frequency) signal on the basis of a given cutoff frequency, an ADC (analog to digital converter) that samples an output signal of the AAF on the basis of a given sampling frequency, a down converter that converts a data rate of the ADC, and a digital phase tracking unit that generates a synchronous clock signal from an output signal of the down converter on the basis of a given internal frequency. The cutoff frequency and the sampling frequency are fixed, respectively, even when a frequency bandwidth of the RF signal fluctuates. The down converter reduces the data rate according to an increase in the frequency bandwidth of the RF signal.

Abstract: A method of determining characteristics of a signal and an apparatus using the method. The apparatus for determining characteristics of a signal includes: a level detector receiving sample values of a radio frequency (RF) signal and binary data obtained by binarizing the RF signal, generating selection signals based on the binary data, classifying each of the sample values of the RF signal into one of a plurality of levels using the selection signals, and outputting average values of sample values of each level; and a signal characteristics determiner determining a characteristics value that indicates the characteristics of the RF signal using the average values of the sample values belonging to each level.

Abstract: The present invention achieves higher precision and lower power consumption by reducing semiconductor chip occupation area. A semiconductor integrated circuit which can be mounted on an optical disk device has: a wobble signal generating circuit capable of receiving first, second, third, and fourth light reception output signals A, B, C, and D of a light receiving element in an optical pickup and detecting a wobble in a recordable disk; a differential phase detection signal (DPD) generating circuit for tracking an unrecordable disk; and two A/D converters and an arithmetic circuit.

Abstract: Aspects of the disclosure provide a signal processing circuit. The signal processing circuit includes an analog to digital converter (ADC) configured to receive an analog input signal, sample the analog input signal based on a sampling clock signal, and convert the sampled analog input signal into a digital output signal, an equalizer configured to equalize the digital output signal, a phase-shift module configured to phase-shift the equalized digital output signal based on a phase-shift signal, and a timing compensation module coupled to the phase-shift module to detect a timing error, and to adjust the phase-shift signal based on the timing error.

Abstract: An optical disk apparatus is provided that has a signal processing circuit for equalizing a signal so as to achieve predetermined equalization, in which interference between codes is permitted, by means of an adaptive equalization circuit or the like, and for performing binarization by means of a maximum likelihood decoding circuit in which interference is performed as a rule, and thereby achieves stabilized signal reproduction in a narrow-band transmission. When evaluating the quality of the recorded signal through the use of the recording parameter learning and the reproduction system such as recorded signal verification, the optical disk recording apparatus is capable of highly precisely evaluating the quality of the recorded signal by fixing a circuit characteristic after suspending the optimization operation of the adaptive equalization circuit or the like for optimizing the characteristic by the reproduced signal. An optical disk recording method is also provided.

Abstract: Detecting a defect on a storage device is disclosed. Detecting includes receiving a signal read from a storage device, sampling the signal to obtain a set of signal samples, wherein the sampling starts at an arbitrary time, computing a defect value for a defect type using the set of signal samples, comparing the defect value with a threshold associated with the defect type, determining whether there is a defect of the defect type based at least in part on the comparison, and in the event that a defect is detected, outputting an indication associated with the defect.

Abstract: An asynchronous timing detector 3 detects and measures a specific pattern (sync pattern) of audio and video reproduced signals having a digital value form an A/D converter 2 and its appearance interval based on an asynchronous clock generated by an asynchronous clock generator 4, and calculates a cycle ratio of the measured sync pattern appearance interval (the number of clock pulses of the asynchronous clock) to a normal value (the number of clock pulses of a synchronous clock obtained by measuring a sync pattern appearance interval using the synchronous clock). A pseudo-synchronous clock generator 7 thins the asynchronous clock based on the cycle ratio to generate a pseudo-synchronous clock which is pseudo-synchronous with channel data. Therefore, even when an initial frequency error is large, frequency and phase pull-in is relatively quickly performed until a timing recovery operation becomes stable.

Abstract: An optical disc device and an adjusting method for a recording condition for use with the optical disc device that records data into an optical disc medium by using codes whose shortest run length is 2T and reproduces the recorded data by using an adaptive equalizing procedure and a PRML procedure, wherein the recording condition is so adjusted that a reproduced signal with desired quality can be obtained, by using, as the adaptive equalizing procedure, a procedure in which a tap coefficient Cn is set to a value obtained by averaging values of a tap coefficient an renewed by a LMS method, located symmetrically with each other along the time axis.

Abstract: A frequency-modulated coding and data recording and storage device that uses plasmonic-dielectric nanostructures of concentric two-layer core-shell design to store data includes a flat transparent substrate having a top surface divided into cells with side dimension d on the order of tens of nanometers and a core-shell plasmonic-dielectric nanostructure disposed in each cell. Each plasmonic nanostructure of concentric core-shell has a predetermined ratio of radii and a predetermined aspect ratio such that when an infrared or visible wavelength signal is applied to each said core-shell plasmonic-dielectric nanostructure a peak scattering amplitude of the applied signal is at different plasmonic resonance frequencies for core-shell plasmonic-dielectric nanostructures with different ratio of radii and different aspect ratios.

Abstract: If the read speed is increased while high-frequency modulated carrier is fixed at a constant frequency, it becomes difficult to separate the read signal from the carrier by using bandwidth limitation of the analog system because the upper limit of the read signal band nears to the carrier frequency. Moreover, if the separation between them is eased by raising the carrier frequency, a problem that write-waveform controls become difficult arises. However, the carrier amplitude can be suppressed simultaneously preventing leakage to the read signal band by converting the carrier frequency into the stop-band of the adaptive equalizer by making the use of aliasing that occurs at the A/D conversion.

Abstract: When a phase shift is to be evaluated, based on a difference between an output from a waveform equalization circuit to equalize an input reproduced signal to a predetermined target equalization characteristic and the target equalization characteristic, the phase shift of the reproduced signal relative to a channel clock, a group delay characteristic with respect to the frequency of the waveform equalization circuit is fixed. Hence, an equalized waveform as an output from the waveform equalization circuit can preserve phase shift information of the inputted reproduced signal to correctly detect the phase shift of the reproduced waveform using the equalized waveform. It is hence possible to realize, with high precision, optimal value learning of various parameters for the recording, reproduction, and servo by use of the phase shift as an index.

Abstract: Devices, systems, methods, and other embodiments associated with clocking a radio frequency channel are described. In one embodiment, an apparatus includes a wobble channel logic configured to at least partially decode a digital wobble signal and configured to control a time base generator to generate a clock signal that is synchronized to wobble data. The apparatus further includes downsampling logic to scale the clock signal to produce a scaled clock signal, and a radio frequency channel logic to at least partially decode a digital radio frequency signal. The clocking signal is connected to clock the radio frequency channel logic, and the scaled clocking signal is connected to clock the wobble channel logic.

Abstract: According to one embodiment, a device includes a filter which limits a frequency bandwidth of a reproduced signal from an optical disc, an AD conversion module which converts an output signal from the filter into a multilevel digital signal, an equalizing module for equalizing a waveform of the multilevel digital signal based on a predetermined partial response class and generating an equalizing playback signal, a detection module for generating binary data corresponding to data recorded on the optical disc based on the equalizing playback signal, a module for determining an amplitude value of each of an input signal to and an output signal from the equalizing module with respect to each binary data sequence output from the detection module, and a module for adjusting a high-frequency amplification amount of the filter such that an amplitude value before waveform equalization and an amplitude value after waveform equalization satisfy a predetermined relationship.

Abstract: A method for automatically tuning an analog filter includes the steps of making an analog filter filter an input signal to output a filtered signal according to a filtering characteristic, sampling the filtered signal to generate sampled data, computing a sector data number of the sampled data that does not complying with a specified data format, and tuning the filtering characteristic of the analog filter according to the sector data number.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes a summation circuit, a data detector circuit, an error feedback circuit, and an error calculation circuit. The summation circuit subtracts a low frequency offset feedback from an input signal to yield a processing output. The data detector circuit applies a data detection algorithm to a derivative of the processing output and provides an ideal output. The error feedback circuit includes a conditional subtraction circuit that conditionally subtracts an interim low frequency offset correction signal from a delayed version of the derivative of the processing output to yield an interim factor. The error calculation circuit generates an interim low frequency offset correction signal based at least in part on the interim factor and a derivative of the ideal output.

Abstract: A data recovery device including an analog to digital converter (ADC), a filtering-equalizing unit, a zero crossing detector, a data phase locked loop, a data mapping unit and an estimation unit is provided. The ADC converts a radio frequency signal to a plurality of sampling data points. The sampling data points are converted to a plurality of retiming data points and a clock signal by the filtering-equalizing unit, the zero crossing detector and the data phase locked loop. The data mapping unit selects a plurality of maximum data points and minimum data points from the returning data points, and determines whether to map the maximum data points and the minimum data points to other levels for partially reconstructing the retiming data points. The estimation unit recovers the reconstructed retiming data points to a modulation signal.

Abstract: The invention provides an electronic apparatus. In one embodiment, the electronic apparatus comprises an analog-to-digital converter (ADC) and an enable device. The analog-to-digital converter converts an analog input signal to a digital output signal with a resolution having a plurality of bits. The enable device dynamically adjusts the resolution of the analog-to-digital converter according to an instruction signal.

Abstract: In a reproducing apparatus, a reading unit reads an information signal from a storage medium, and a converter converts the information signal reproduced by the reading unit into a first digital signal by sampling the information signal in accordance with a reference clock signal with a predetermined frequency higher than the frequency of the information signal. An oversampling unit generates a second digital signal by increasing the number of samples of the first digital signal output from the converter. A data detector selects two adjacent samples from the second digital signal on the basis of the frequency of the information signal reproduced by the reading unit and a phase change of the information signal. The data detector then generates read data using the selected samples of the digital signal.

Abstract: An optical disc device and an adjusting method for a recording condition for use with the optical disc device that records data into an optical disc medium by using codes whose shortest run length is 2T and reproduces the recorded data by using an adaptive equalizing procedure and a PRML procedure, wherein the recording condition is so adjusted that a reproduced signal with desired quality can be obtained, by using, as the adaptive equalizing procedure, a procedure in which a tap coefficient Cn is set to a value obtained by averaging values of a tap coefficient an renewed by a LMS method, located symmetrically with each other along the time axis.

Abstract: The generation of a pseudo-lock is prevented in a JFB offset compensator whose use has been conventionally limited due to a tendency to generate the pseudo-lock, and performance degradation of a PLL and a Viterbi decoder is suppressed. A means for monitoring an offset of a read signal is provided independently from the JFB offset compensator. With this configuration, the generation or a possibility of the generation of the pseudo-lock can be detected to reset an integrator. In order to reduce the influence of a large sporadic offset triggering the pseudo-lock, there may also be provided a limitter for limiting the absolute value of an offset signal inputted to the integrator or a limitter for limiting the absolute value of an offset compensation signal.

Abstract: An A/D converter samples a read signal in synchrony with a system clock sclk having a fixed frequency, to perform an A/D conversion. A fluctuation compensator is configured as an internal-feedback-type compensation filter, and suppresses fluctuation of a digital signal output from the A/D converter. A digital PLL uses an interpolator to generate, by interpolation, a sampled value of the read signal at a timing in synchrony with a channel frequency, and uses NCO to generate a synchronizing clock and an interpolated-phase signal that is fed back to the interpolator. A binarization circuit binarizes the read signal based on the interpolated value output from the interpolator. The frequency characteristic of the fluctuation compensator is controlled based on the frequency value output from the loop filter.

Abstract: Detecting a defect on a storage device is disclosed. Detecting includes receiving a signal read from a storage device, sampling the signal to obtain a set of signal samples, wherein the sampling starts at an arbitrary time, computing a defect value for a defect type using the set of signal samples, comparing the defect value with a threshold associated with the defect type, determining whether there is a defect of the defect type based at least in part on the comparison, and in the event that a defect is detected, outputting an indication associated with the defect.

Abstract: A system includes a sampling module and a correction module. The sampling module is configured to sample an input signal at sampling points and to output samples. The correction module is configured to output a correction factor when the first one of the samples is preceded by a second one of the samples having a first polarity, and when the first one of the samples is followed by a third one of the samples having a second polarity that is opposite of the first polarity. The correction factor comprises a correction value that is based on at least one of the samples that precedes the first one of the samples. The correction value is used to correct the input signal at a first one of the sampling points corresponding to the first one of the samples.

Abstract: In an information reproducing device for performing maximum likelihood decoding using asynchronous sample data, data from the recording medium 101 is sampled by an A/D converter 103 at an asynchronous sampling clock generated by a clock generator 104, to obtain asynchronous sample data. A timing detector 106 detects a phase ? of the asynchronous sampling clock, where recording timings of data of the recording medium 101 are reference points. A reference value generator 108 generates reference values used in a Viterbi decoder 107, based on basic phase reference values at a phase of 0 and a phase signal ? of the asynchronous sampling clock. A basic reference value learner 109 learns and modifies the phase-0 basic reference values based on the phase signal ?, the asynchronous sample data, and the reference values.

Abstract: An optical disk apparatus for writing signals on a recording medium by irradiating the recording medium with a laser beam modulated based on the signals includes a first converting unit for converting a first reflected laser beam component from the recording medium into electrical signals; a second converting unit for converting a second reflected laser beam component into electrical signals; a first sample-and-hold unit for sampling and holding the electrical signals from the first converting unit; a second sample-and-hold unit for sampling and holding the electrical signals from the second converting unit; and transmitting devices for transmitting the held signals from the first and the second sample-and-hold units. The sampled signals are averaged, and the averaged signal is held in each of the first and the second sample-and-hold units during signal writing.

Abstract: Aspects of the disclosure provide a signal processing circuit to reconstruct data from an analog signal. The signal processing circuit includes an analog to digital converter (ADC), an equalizer, a first timing compensation module, a phase-shift module and a second timing compensation module. The ADC receives an analog input signal, samples the analog input signal based on a sampling clock signal, and converts the sampled analog input signal into a digital output signal. The equalizer equalizes the digital output signal. The first timing compensation module detects a first timing error based on the digital output signal, and adjusts the sampling clock signal based on the first timing error. The phase-shift module phase-shifts the equalized digital output signal based on a phase-shift signal. The second timing compensation module detects a second timing error based on the equalized digital output signal, and adjusts the phase-shift signal based on the second timing error.

Abstract: A writing condition adjusting apparatus according to the present invention adjusts a writing condition using first and second recording patterns. The first recording pattern is used to adjust a writing condition for recording marks and spaces, of which the lengths are equal to or longer than a predetermined recording length, while the second recording pattern is used to adjust a writing condition for recording marks and spaces, of which the lengths are shorter than the predetermined recording length by one recording unit length. If it has been decided that the writing condition that has once been determined by making the write adjustment on such marks that are shorter by one recording unit length needs to be adjusted again, a signal index value that has been defined based on the first recording pattern is set to be a target value.

Abstract: Devices, systems, methods, and other embodiments associated with wobble channel clocking are described. In one embodiment, an apparatus implemented with a clock generator, a clock scaling logic, radio frequency channel logic, and wobble channel log. The clock generator generates a clocking signal. The clock scaling logic scales the clocking signal to produce a scaled clocking signal. The radio frequency channel logic at least partially decodes a digital radio frequency signal from an optical disk. The wobble channel logic at least partially decodes a digital wobble signal from the optical disk. Either the clocking signal or the scaled clocking signal is used to clock the radio frequency channel logic, and the other clocking signal or the scaled clocking signal is used to clock the wobble channel.

Abstract: The invention relates to the reading of digital optical recordings at very high density (CD, DVD, etc.). Reading is done by a PRML (“Partial Response Maximum Likelihood”) technique which uses a model of analog response to the recording of an isolated information bit. Customarily, the response model is represented by four or five signal samples having standardized levels 1 or 2. To take account of particular phenomena of super-resolution reading, the invention proposes the use of a model having 6 to 10 samples that can take 4 or 5 standardized levels. This model can result from the superposition of two simpler models having only two possible levels of samples taken from 1, 2 and 3.

Abstract: An apparatus and method for measuring the quality of a signal on an optical disc based on level information of a viterbi decoder are provided. The signal quality measuring apparatus includes: a binary unit that generates binary signals from input RF signals; a channel identifier that receives the input RF signals and the binary signals output from the binary unit and outputs reference level values corresponding to the binary signals; and an information calculator that receives the reference level values and detects a signal quality value.

Abstract: The present invention provides for an apparatus and method of controlling writing a signal to an optical disc in an optical disk system and including the step of generating a feedback signal to dynamically tune the signal output from a laser source, and including generating a plurality of timing signals serving to define a plurality of sampling windows for selecting data samples from RF signals derived from a signal reflected from the disc, generating a plurality of runlength selection signals to allow for measurement of light reflection at required runlength lands or pits, and measuring light reflected at a runlength land or pit in processing means and employing the measured signal as the said feedback signal for the said tuning of the signal source.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes a summation circuit, a data detector circuit, an error feedback circuit, and an error calculation circuit. The summation circuit subtracts a low frequency offset feedback from an input signal to yield a processing output. The data detector circuit applies a data detection algorithm to a derivative of the processing output and provides an ideal output. The error feedback circuit includes a conditional subtraction circuit that conditionally subtracts an interim low frequency offset correction signal from a delayed version of the derivative of the processing output to yield an interim factor. The error calculation circuit generates an interim low frequency offset correction signal based at least in part on the interim factor and a derivative of the ideal output.

Abstract: A digital signal reproducing apparatus includes an analog to digital converter for sampling and quantizing a signal read from an optical recording medium in accordance with a reproduced clock having a frequency which is one-half of a channel bit frequency and outputting an obtained digital RF signal, an offset compensation circuit for reducing an offset component in an amplitude direction from the digital RF signal, and a simplified interpolation filter for reconstructing a signal indicating a predetermined pattern recorded in the optical recording medium from the output signal of the offset compensation circuit and outputting the reconstructed signal. A control operation is performed to reduce the magnitudes of respective values shown by first phase error information on a section with the predetermined pattern and by second phase error information on a section other than the section with the predetermined pattern.

Abstract: There is provided an optical information recording/reproducing apparatus capable of obtaining a high super-resolution effect using an optical information recording medium in which a super-resolution thin film is formed. An optical information recording medium 1 having a super-resolution layer is irradiated with a laser light in a light emission pattern such that a bias light emission portion that does not cause the super-resolution layer to be in the state of super-resolution and a pulse light emission portion that causes the super-resolution layer to be in the state of super-resolution alternatively appear, and reflected light is detected. A reproduction signal based on the pulse light emission portion and a reproduction signal based on the bias light emission portion are acquired.