Abstract: A switch queue predictive protocol (SQPP) includes a packet switching system including: a switch fabric having a cross-point switch, and a plurality of line cards, each coupled to the switch fabric. A cross-point buffer is located at each cross-point of the cross-point switch. The switch fabric also includes a plurality of actual available queue space tables (AAQSTs), each identifying the actual queue space available in a row of the cross-point buffers. Each of the line cards includes an input buffer, an output buffer, and a predicted available queue space table (PAQST) identifying predicted queue space available in a corresponding row of the cross-point buffers. Packet information is transmitted from a source line card to the switch fabric only if available queue space is predicted by the corresponding PAQST. The switch fabric uses the AAQST to update the PAQST after packet information is transmitted to a destination line card.

Abstract: A method and system for controlling a plurality of pipes in a computer network, including at least one processor for a switch, the at least one processor having a queue, the plurality of pipes utilizing the queue for transmitting traffic through the switch, wherein each pipe is assigned a priority ranking class, each class has a unique priority rank with respect to each of the other classes, the ranks ranging from a highest priority rank to a lowest priority rank. A transmission probability is calculated for each pipe responsive to its priority rank. If excess bandwidth exists for the queue, the transmission probability of each pipe is linearly increased. Alternatively, if excess bandwidth does not exist, the transmission probability for each pipe is exponentially decreased. Packets are transferred from a pipe to the queue responsive to the pipe transmission probability and priority rank.

Abstract: A method, apparatus, and computer-readable media for sending a frame of data from a first channel to a second channel using at least one of m memory buffers for storing a frame, m being at least 2, in which n of the m buffers have an available status and p of the m buffers have an unavailable status, wherein m=n+p, comprises reserving q of the n buffers having the available status to the first channel, wherein q?n; when a frame is received from the first channel, storing the frame in i of the q buffers, wherein 1?i?q, and changing the status of the i buffers to unavailable; selectively assigning the frame to the second channel; wherein if the frame is assigned to the second channel, the i buffers storing the frame are assigned to the second channel, and when the frame is subsequently sent over the second channel, the status of the i buffers is changed to available; wherein if the frame is not assigned to the second channel, the frame is discarded and the status of the i buffers is changed to available; and wh

Abstract: A packet crosspoint works with an arbiter to control the number of packets being received at the input ports of the cross-connect from traffic sources coupled thereto. This is accomplished by monitoring the number of packets waiting in buffers in the output ports, as well as the number of other packets which the arbiter has already granted for transmission to the input ports of the cross-connect, but which have not as of yet been received in the output queue of the destination output port. An audit mechanism is included for ensuring that output port grant counters do not drift upward based on the fact that some granted packets are lost in the system.

Abstract: Packets are scheduled for transmission over a communication link in a network, using a Largest Weighted Delay First (LWDF) scheduling policy. A delay measure Wi, i=1, 2, . . . N, is computed for each of N packets, each associated with a corresponding one of N data flows and located in a head position in a corresponding one of N data flow queues. The computed delay measures are then weighted using a set of positive weights ?1, ?2, . . . , ?N. The packet having the largest weighted delay Wi/?i associated therewith is then selected for transmission. In an embodiment configured to meet a quality of service (QoS) requirement specified in terms of a deadline Ti and an allowed deadline violation probability ?i, e.g., a requirement specified by P(Wi>Ti)??i, the weights ?i in the set of positive weights ?1, ?2, . . . , ?N may be given by ?i=?Ti/log ?i. The invention can also be used to meet other types of QoS requirements, including, e.g., requirements based on packet loss probabilities.

Abstract: There is provided a packet scheduler for managing output awaiting packets stored in a plural of queue blocks each having a weighting coefficient settled based on an output guaranteeing bandwidth, whereby an output order for the head packets is stored in respective queue blocks. The packet scheduler includes means for controlling selection of a queue having a packet to be sent at the highest priority, based on scheduled output time information obtained by calculation using management information of the output awaiting packets and the weighting coefficient of each queue, and means for correcting processing carried out in the controlling means based on the current time information. The arrangement enables to ensure assignment of vacant bandwidth in a fair manner while suppressing erroneous operation deriving from deviation of a scheduled packet output time from the real time caused by a calculation error or the like in WFQ calculation.

Abstract: The invention is an unique control method that maintains the bandwidth efficiency of Optical Burst Switched, Labeled Optical Burst Switched, and other burst or packet switched networks. The invention also combines in a novel manner the delayed Reserve-a-Fixed-Duration (RFD) class of switching techniques and special classes of slow Switching Elements.

Abstract: The invention comprises a method and apparatus for providing differentiated Quality-of-Service (QoS) guarantees in scalable packet switches. The invention advantageously uses a decentralized scheduling hierarchy to regulate the distribution of bandwidth and buffering resources at multiple contention points in the switch, in accordance with the specified QoS requirements of the configured traffic flows.

Abstract: A switch fabric includes a first plurality of data switches each having a plurality of input ports and a plurality of output ports the plurality of switches capable of switching any of its input ports to any of its output ports with the plurality of data switches having inputs coupled to a plurality of input buses so that a first byte of a first one of the input buses is coupled to a first one of the plurality of switches, and a succeeding byte of the first input bus is coupled to a succeeding one of the plurality of switches.

Abstract: Packet data from multiple types of data sources is stored. The data sources have reroutable and non-reroutable data. The multiple types of data sources flow into a multiuser channel in a wireless spread spectrum code division multiple access communication system. A queue for incoming data from each data source is provided. A backlog of data in the queue is tracked. Based on in part the tracked backlog, data flow from each of the data sources is limited. For each data source capable of rerouting packet data, packet data is selectively rerouted. For each data source not capable of rerouting packet data, packet data is selectively not sent.

Abstract: A switch queue predictive protocol (SQPP) includes a packet switching system including: a switch fabric having a cross-point switch, and a plurality of line cards, each coupled to the switch fabric. A cross-point buffer is located at each cross-point of the cross-point switch. The switch fabric also includes a plurality of actual available queue space tables (AAQSTs), each identifying the actual queue space available in a row of the cross-point buffers. Each of the line cards includes an input buffer, an output buffer, and a predicted available queue space table (PAQST) identifying predicted queue space available in a corresponding row of the cross-point buffers. Packet information is transmitted from a source line card to the switch fabric only if available queue space is predicted by the corresponding PAQST. The switch fabric uses the AAQST to update the PAQST after packet information is transmitted to a destination line card.

Abstract: An approach to queuing data at a network switching node includes assigning a queue value such as a priority value or a weight to each of a plurality of queues which temporarily store data packets to be forwarded toward a link on the network. A bandwidth value related to a maximum amount of data to be transferred on the link is defined. A data limit value is assigned to each of the queues to limit the amount of data that can be forwarded from each queue. The data limit value is derived from the bandwidth value for the link. By placing bandwidth-related limits on the queues, low-priority queues are prevented from being dominated by high-priority queues, that is, low-priority queues are not prevented from forwarding their data by the priority structure. Also, the bandwidth-related limits allow for control of traffic flow to prevent overloading lower-capacity links on the network.

Abstract: A method for selecting packets comprises pipelining execution of packet selection processes so that execution of each of the packet selection processes occurs at different levels of a scheduling hierarchy. At least two different packets are selected at two different times in response to execution of the packet selection processes.

Abstract: In a multi-QOS level queuing structure, packet payload pointers are stored in multiple queues and packet payloads in a common memory pool. Algorithms control the drop probability of packets entering the queuing structure. Instantaneous drop probabilities are obtained by comparing measured instantaneous queue size with calculated minimum and maximum queue sizes. Non-utilized common memory space is allocated simultaneously to all queues. Time averaged drop probabilities follow a traditional Weighted Random Early Discard mechanism. Algorithms are adapted to a multi-level QOS structure, floating point format, and hardware implementation. Packet flow from a router egress queuing structure into a single egress port tributary is controlled by an arbitration algorithm using a rate metering mechanism. The queuing structure is replicated for each egress tributary in the router system.

Abstract: An approach for allocating bandwidth in a satellite communication system is disclosed. The system includes a set of global queues that store bandwidth requests, which are received from a number of satellite terminals. The received bandwidth request include a high priority rate request, a low priority rate request, a high priority volume request, and a low priority volume request. A bandwidth control processor determines bandwidth request type and priority of the received bandwidth requests and places the bandwidth requests in the appropriate global queues based upon the determined bandwidth request type and priority. Each of the global queues corresponds to a data rate associated with of each a plurality of channels. The system also utilizes a set of local queues that correspond to the channels. The BCP moves the bandwidth requests from the global queues to the local queues. The BCP then allocates the transmission slots in response to the bandwidth requests stored in the local queues.

Abstract: A network switch includes network switch ports, each including a port filter configured for detecting user-selected attributes from a received layer 2 frame. Each port filter, upon detecting a user-selected attribute in a received layer 2 frame, sends a signal to a switching module indicating the determined presence of the user-selected attribute, for example whether the data packet has a prescribed priority value. The network switch includes a flow control module that determines which of the network switch ports should output a flow control frame based on the determined depletion of network switch resources and based on the corresponding priority value of the network traffic on each network switch port. Hence, any network switch port that receives high priority traffic does not output a flow control frame to the corresponding network station, enabling that network station to continue transmission of the high priority traffic.

Abstract: An arbitration scheme is used for scheduling connections between input ports and output ports. Input ports request connections to the output ports for a next time slot. Arbitration parameters, such as priority and weight, are identified for the buffer requests. Output port arbitrations are conducted for each one of the output ports according to the arbitration parameters. If there are more than two input buffers with the same priority and weight, a round robin arbitration is used. Grants are issued to the input port buffers winning the output port arbitrations. Input port arbitrations are conducted using the same arbitration parameters for input ports receiving multiple grants. The grants are accepted by the input port buffers winning the input port arbitrations. The input port buffers accepting the grants are connected to the requested output ports.

Abstract: In Switches, switch inputs and outputs may be grouped into (e.g., small) modules called input shared blocks (or “ISBs”) and output shared blocks (or “OSBs”), respectively. Each of the switches includes three (3) main parts: (i) input shared blocks (ISBs); (ii) a central switch fabric (or “ATMCSF”); and (iii) output shared blocks (OSBs). Input link sharing at every ISB-ATMCSF interface and output link sharing at every ATMCSF-OSB interface cooperate intelligently to resolve output contention and essentially eliminate any speedup requirement in central switch fabric. Each of the proposed switches can easily scale to a large size by cascading additional input and output shared blocks (ISBs and OSBs). Instead of using a centralized scheduler to resolve input and output contention, the each of the switches applies a distributed link reservation scheme upon which cell scheduling is based.

Abstract: A system and method of scheduling traffic from a plurality of queues onto a link is disclosed. At least one of the queues has an agreed bandwidth requirement and at least one of the queues has no agreed bandwidth requirement. The method comprises the steps of assigning a weight to each queue having an agreed bandwidth requirement, the weight being determined in dependence on the bandwidth requirement, grouping the queues having no agreed bandwidth requirement into a group, Q*, and assigning a weight to the group, and scheduling the queues for transmission on the link in dependence on their assigned weight and on a last transmission time for the respective queue, wherein if a scheduled queue has no traffic to transmit another queue is scheduled, the group Q* being scheduled after the other queues.

Abstract: A multi-layer network element for forwarding received packets from an input port to one or more output ports with quality of service. When output queues exceed or meet a threshold value below the queue's capacity packets are randomly discarded. When the queue becomes full, the network element determines which flow caused the queue to overflow. The priority of that flow is lowered. In a multicast packet, the packet may have different priorities at each output port. Scheduling of multiple output queues at each output port uses a weight round robin approach that allocates a weight portion of packets to transmit at each time interval. A packet is not interrupted during its transmission, even if the weight portion is met during a packet's transmission. The excess number of bytes transmited as a result of not interrupting the packet are accounted for in the next round.

Abstract: A congestion control method and apparatus in a cell-switched data switch. The switch attaches a tag with a discard processing indicator, such as a particular random number, to all cells belonging to a same packet. In determining which cells to drop when running a congestion control algorithm such as RED, the switch compares the discard processing indicator of the cells with a discard criterion and only drops cells that conform with the discard criterion.

Abstract: A method for switching a plurality of packet-oriented signals and an apparatus for performing the method includes supplying a signal to port units, each having ports, at one port, some ports, or all ports. A signal is connected from one port to another port of another unit by a central switching unit. Signal transmission therebetween is performed by transmission of data blocks. Each port unit ascertains the address information item for each packet supplied and uses the item to determine the appropriate receiving port unit. Each port unit stores the data packet in a buffer memory, compiles availability information and transmits it to the switching unit, which evaluates availability and ascertains further transmission without blocking occurring. The switching unit connects the necessary paths between the transmitting and receiving port units and transmits the packets/cells through the paths.

Abstract: An initiator node for a storage area network used with storage nodes having command queue capability maintains a current queue depth, and a maximum queue depth associated with each storage node. It initializing the maximum queue dependent on the type of the storage nodes it sees, and limits the number of commands queued to each storage node to the current queue depth associated with the storage node. It dynamically adjusts the current queue depth for each storage node based upon queue refusals generated by the storage nodes and the maximum queue depth associated with the storage nodes.

Abstract: A packet switch device having a plurality of input buffers; a packet switch; a plurality of schedulers, having a pipeline scheduling process module wherein a plurality of time units corresponding to the number of output lines is spent in scheduled sending process of the fixed length packets from the input buffer, and wherein the scheduled sending process is executed in a number of processes, in parallel, the number of processes corresponding to the number of the input lines, having a sending status management module wherein sending status of the fixed length packets which constitute one frame is managed for each of the input lines, and provided corresponding to any of the output lines; and at least one result notification module for notifying the input buffer of result information from the scheduled sending process performed by each of the plurality of schedulers.

Abstract: Methods and apparatus for forwarding packets in a multistage interconnection network are provided which timestamp packets using a substantially system-wide timing reference and a merge sorting variant to restore packets to the proper order, using the timestamp information carried in the packets. One implementation determines when packets passing along different paths in the network can be safely forwarded, even when no packets have recently been received on some of the paths, by forwarding status messages along otherwise idle paths. The status messages provide information that can be used by downstream components to allow them to determine when packets passing over other paths can safely be forwarded. One implementation simultaneously resequences packets being delivered to all n outputs of the multistage interconnection network. The resequencing operations are distributed among a plurality of switching elements making up the interconnection network.

Abstract: Data transmission system comprising a plurality of Local Area Networks (LANs) (10-1 to 10-4) interconnected by a hub (12) including the same plurality of LAN adapters (16-1 to 16-4) respectively connected to the LANs and a packet switch (14) interconnecting all LAN adapters wherein a packet transmitted by any adapter to the packet switch includes a header containing at least the address of the adapter to which the packet is forwarded. At each cross point is located a memory block for storing any data packet received from the input port corresponding to the cross point and which is to be forwarded to the output port corresponding to the cross point.

Abstract: A method for scheduling an input and output buffered ATM or packet switch and, more particularly, to a method for cell-scheduling an input and output buffered switch that is adapted to a high-speed large switch is provided. The input and output buffered switch has multiple switching planes, and its structure is used to compensated for decreasing performance of the input buffered switch resulting from HOL (head-of-line) blocking of the input buffered switch. The input and output buffered switch consists of input buffer modules grouping several input ports and output ports and output buffer modules, and each input buffer module has several FIFO queues for the associated module output buffer modules. In the input and output buffered switch having multiple switching planes, cell scheduling is carried out using a simple iterative matching (SIM) method.

Abstract: A packet scheduling scheme schedules packets from a plurality of queues onto outgoing link. The scheme associates a weight and a virtual start time with each of the queues. Queues are selected, in order of the virtual start time, until a non-empty queue is selected. One or more packets are sent from the selected queue and then the virtual start time is updated, based on the length of the transmitted packet and the weight associated with the selected queue.

Abstract: Hardware interconnected around multiple packet forwarding engines prepends sequence numbers to packets going into multiple forwarding engines through parallel paths, After processing by the multiple forwarding engines, packets are reordered using queues and a packet ordering mechanism, such that the sequence numbers are put back into their original prepended order. Exception packets flowing through the forwarding engines do not follow a conventional fast path, but are processed off-line and emerge from the forwarding engines out of order relative to fast path packets. These exception packets are marked, such that after they exit the forwarding engines, they are ordered among themselves independent of conventional fast path packets. Viewed externally, all exception packets are ordered across all multiple forwarding engines independent of the fast path packets.

Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a plurality of calendars with different service rates to allow a user to select the service rate which he desires. If a customer has chosen a high bandwidth for service, the customer will be included in a calendar which is serviced more often than if the customer has chosen a lower bandwidth.

Abstract: The assignment result reception circuit 11 receives the accumulation assignment result from the external portion, and sends the already-assigned input port and output port information to the assignment request mask circuit 12. The assignment request mask circuit 12 uses the already-assigned input port and output port information received from the assignment result reception circuit 11, performs the mask process on the connection assignment request received from the external portion, and sends its result to the M×N scheduler circuit 13. The M×N scheduler circuit 13 determines the assignment of the port connection in accordance with the information received from the assignment request mask circuit 12, and sends the connection assignment result to the external portion and the assignment result transmission circuit 14.

Abstract: A method for policing traffic on a computer communications network having a multitude of nodes interconnected by various communications media. An individual policer is established at each node for monitoring and/or policing the traffic incoming to that node. Traffic policy parameters are established for traffic-classes and the policy is implemented at each individual policer. Thresholds may be established and when the thresholds are met or exceeded the individual policer will export the traffic conditions at the respective node. The other individual policers or a master policer will receive the exported information. -The individual policers police the traffic incoming to its associated node depending on the traffic condition information received from all the nodes. Several classes may be handled by each individual policer. Leaky bucket algorithms may be used in some instances.

Abstract: One embodiment of the present invention provides a system that facilitates packet communication between a device within a computing system and one or more additional devices of the computing system. The system receives either a point-to-point packet or a broadcast packet from the devices and inspects the header of the packet to determine the type of packet. The system also examines the state of the computing system to determine whether the state of the computer system is broadcast preferred or point-to-point only. If the type of the packet is broadcast and the state of the computing system is broadcast preferred, the system sends the packet to all of the additional devices. If the type of the packet is broadcast and the state of the computing system is point-to-point only, the system delays sending the packet until the state of the computing system changes to broadcast preferred.

Abstract: Disclosed is a channel allocation method on performing a data communication in a wide band wireless multi-media communication system, which allocates selectively reserved time slots or contention time slots, according to the quantity of data to be sent. In the method, contention time slots are used for sending data if the quantity of data to be sent is smaller than a critical value, or reserved time slots are used if the data quantity is greater than the critical value.

Abstract: In a LAN relaying/switching apparatus accommodating many LAN transmission lines, a controller performs a flow control which limits a data transmission for terminal portions which have inputted the data in which an output queue of a queue portion included in queue management module portions has exceeded a preset threshold value.

Abstract: A multiport network device includes a multiplicity of receive queues, a multiplicity of transmit queues and a forwarding engine for transferring entries from the receive queues to the transmit queues. When a transmit queue is greater than a first hysteresis point, the forwarding engine prevents transfer of entries from a receive queue to the transmit queue and transfer of entries to the transmit queue is allowed when the length of the transmit queue falls below a second hysteresis point.

Abstract: Method and apparatus for traffic flow control in data switches are disclosed. Emission and loss priorities of cells to be switched are translated into a single discard priority, referred to as a bandwidth priority, which has consistent meaning across different emission priorities. This translation allows simultaneous consideration of loss and emission priority in determining which cells to discard when a switch becomes congested with cell traffic. Such consideration alleviates problems that can arise if cell discard decisions are based solely on either loss priority or emission priority. The invention is particularly useful for Asynchronous Transfer Mode (ATM) switches.

Abstract: A system and method are disclosed which allow unstored computed results to be accessed without the normal overhead associated with traditional data forwarding and bypass techniques. Through the use of multiplexers and bi-directional OR controllers the unstored data is readily accessible for use before it is stored in a register file. The circuitry used also allows bi-directional travel across a register file or bank as information is passed between the bi directional controllers used. Latches can also be used in the circuitry. Additionally, the features of the invention allow the required number of select signals fed to the multiplexers used to be reduced over conventional methods. These reductions are possible through circuitry disclosed herein.

Abstract: A method, for use with systems that transmit information in data packets, includes running a first scheduling method on at least one first-stage scheduler device which guarantees first connection parameters during a transmission process. The first connection parameters correspond to transmission rates for the data packets. The method also includes storing a queue identifier in packet headers of the data packets and determining to run, based on the queue identifier, a second scheduling method on a second-stage scheduler device which limits second connection parameters during the transmission process. The second connection parameters correspond to higher transmission rates for the data packets than the first connection parameters and precedes the first scheduling method. The method further includes bypassing the first scheduling method when the transmission rates are not to be limited.

Abstract: Forward performance monitoring cells are inserted into a processing queue coupled to an access controller. A plurality of ATM cell input sources are coupled to the controller. Each source supports a plurality of ATM connections. The controller controllably admits cells from the input sources into the queue. Before a forward performance monitoring cell corresponding to a particular ATM connection is inserted into the queue, an interim cell corresponding to that connection is first transmitted to the controller, which controllably admits the interim cell into the queue. The queue is monitored to detect the presence of the interim cell in the queue, without interrupting maintenance of counts for the respective ATM connections. Then, while the interim cell remains within the queue, the count for the ATM connection corresponding to that interim cell is stored in the interim cell, thereby converting the interim cell into the desired forward performance monitoring cell.

Abstract: A dual round robin arbitration technique for a switch in which input ports include virtual output queues. A first arbitration selects, for each of the input ports, one cell from among head of line cells of the virtual output queues to generate a first arbitration winning cell. Then, for each of the output ports, a second arbitration selects one cell from among the first arbitration winning cells requesting the output port.

Abstract: To manage each channel of a system connected by multichannels every channel, an initiator has at least one I/O request queue every channel and a management queue. When the channel is extinguished, a KILL command is assigned to the management queue and transmitted to a target. A management queue agent of the target sends the KILL command to an execution agent of each queue and extinguishes the queues.

Abstract: In an N×N packet switch, for example an ATM switch, multicast connections receive backpressure signals from congested output ports in the switch core. The cells in the connections are destination address modified not to send to the congested output port, but to continue sending to the other output ports in the connection. The multicast cells may include a user selected primary route identification and be queued in a unicast input queue for the primary route before being destination address modified. Destination address modification for congestion may be accompanied by partial packet discard, through destination address modification of the remaining cells forming part of a multiple cell packet to remove the destination address for the congested port (whether or not it is now congested) where one of the multiple destination addresses of one of the cells in the packet has been modified to remove the destination address of the congested output port.

Abstract: An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet memory arbitration scheme aligns access of devices reading and writing into packet memory allowing full-rate access to the packet memory.

Abstract: A two-dimensional round-robin scheduling method with multiple selection is provided. The two-dimensional round-robin scheduling method in accordance with an embodiment of the present invention includes following steps. First step is for checking whether a request is received from the input buffer module and building mxm request matrix r(i,j), i,j=1, . . . , m. Second step is for setting mxm search pattern matrix, d(i,j), i,j=1, . . . , m. The search pattern matrix describes search sequence, S=1, . . . , m. Third step is for initializing elements of mxm allocation matrix a(i,j), i,j=1, . . . , m. The allocation matrix contains information whether transmission request is accepted and which switching plane the accepted request uses in transmission. Fourth step is for examining a request matrix in accordance with the search sequence S and finding r(i,j) that sent a request.

Abstract: An interface apparatus provides a connection between a host having an IEEE 1394 input/output port and a mass storage device having an ATA input/output port. A receive FIFO and a transmit FIFO within the interface apparatus operates to store small-size packets, or operates to store the buffer address of large-size packets, as the small and large size packets are respectively received from the host or transmitted to the host. In both the host receive and host transmit modes of operation of the interface apparatus, the small-size packets are found in the receive FIFO or the transmit FIFO, whereas the data content of large-size packets is stored in the buffer as the corresponding buffer address is stored in the receive FIFO or the transmit FIFO.

Abstract: An apparatus and method are disclosed for maintaining free buffer information for a network switch. A first Random Access Memory (RAM), located on the network switch, functions to store values that indicate whether or not free buffers, located in a second RAM, are available for storing received data frames. An input logic is provided for placing values in the first RAM to indicate which free buffers are available for storing the data frames. When free buffers are required to store data frames, the output logic searches the first RAM and locates values that indicate available free buffers in the second RAM. The output logic then generates buffer pointers that address the locations of the free buffers in the second RAM. The buffer pointers that are generated are stored in a small capacity queue on the network switch to provide immediate availability to free buffers.

Abstract: A queue length for a queue storing packets transmitted through a communications network is temporarily increased at a time instant corresponding to an onset of congestion of the queue for a time period. Increasing the queue length in this way may be accommodated by providing an auxiliary storage area for packets that would otherwise be stored in the queue. The auxiliary storage area may be associated with a different physical storage device than a storage device associated with the queue.

Abstract: A packet memory system including a memory space having a multiplicity of addressable memory locations for the storage of data packets, pointer control means for generating a write pointer which progressively defines where data is to be written to the memory space and a read pointer which progressively defines where data is to be read from the memory space and an ageing clock which defines a succession of intervals. The pointer control means generates a ‘current’ pointer and a ‘discard’ pointer and for each interval is operative to cause the ‘current’ pointer to correspond to an immediately previous value of the write pointer and to cause the discard pointer to correspond to an immediately previous value of the said current pointer. In this manner the portion of the memory space between the ‘discard’ pointer and the read pointer denotes data which has been in said memory space for at least two of said intervals.

Abstract: A queue scheduling mechanism in a data packet transmission system, the data packet transmission system including a transmission device for transmitting data packets, a reception device for receiving the data packets, a set of queue devices respectively associated with a set of priorities each defined by a priority rank for storing each data packet transmitted by the transmission device into the queue device corresponding to its priority rank and a queue scheduler for reading, at each packet cycle, a packet in one of the queue devices determined by a normal priority preemption algorithm. The queue scheduling mechanism includes a credit device that provides, at each packet cycle, a value N defining the priority rank to be read by the queue scheduler from the queue device corresponding to the priority N instead of the queue device determined by the normal priority preemption algorithm.