Asynchronous Transfer Mode (atm) Patents (Class 370/905)
  • Patent number: 8605636
    Abstract: Disclosed is a method capable of minimizing a period of time required for a handover network acquisition procedure when a handover occurs between communication networks which provide communication services using different mobile communication technologies. When a modem for a handover communication network performs network acquisition due to the occurrence of a handover, the modem previously extracts information about a handover channel from a Universal Handover Direction Message (UHDM), and uses the extracted channel information in a network acquisition procedure. Accordingly, the modem for a handover communication network can easily acquire a handover network even without using a preferred roaming list, and can omit an radio frequency (RF) tuning procedure by extracting a corresponding code division multiple access (CDMA) channel from the received UHDM, thereby reducing the total handover processing time period and increasing the success rate of the handover.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: December 10, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jeong-Min Noh, Myoung-Hoon Cho
  • Patent number: 8264993
    Abstract: A method and a multimode terminal for minimizing current consumption and simultaneously reducing a handover processing time when a handover occurs between communication networks which provide communication services using different mobile communication technologies. The communication network modems of the multimode terminal are interconnected via a one-to-one communication path, so that a handover target communication network modem is powered on only when handover actually occurs. In this way, by efficiently determining a time point when the handover target communication network modem is powered on, a processing time according to the occurrence of handover can be reduced, and additional current consumption can be minimized.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: September 11, 2012
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jeong-Min Noh, Ho-Joong Kim
  • Patent number: 8224973
    Abstract: An embodiment of the present invention provides a mobile station to communicate with an application service provider (ASP) in a wireless network using a Universal Services Interface (USI) comprising, memory, one or more processors and a transceiver, to store some or all USI context as required by the ASP and wherein when a user accesses the ASP, the USI client inserts relevant USI context as part of an ASP request message and in order to fetch the USI context of the MS, a USI proxy sends the USI context request to a USI server and the USI server sends a USI context response back to the USI proxy which contains the USI context for the MS.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: July 17, 2012
    Assignee: Intel Corporation
    Inventors: Muthaiah Venkatachalam, Pouya Taaghol
  • Patent number: 7953863
    Abstract: An embodiment of the present invention provides an apparatus, comprising a mobile station (MS) operable to communicate with an application service provider (ASP) in a wireless network, the wireless network including a Universal Services Interface (USI); and wherein the MS includes a USI client adapted to store some or all USI context as required by said ASP and wherein when a user accesses the ASP using something other than a web-browser, the USI client inserts relevant USI context as part of an ASP request message.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: May 31, 2011
    Assignee: Intel Corporation
    Inventors: Muthaiah Venkatachalam, Pouya Taaghol
  • Patent number: 7551575
    Abstract: A stream parser for receiving, parsing, and/or pre-processing network data traffic directly from an incoming unreconstructed data stream. To extract meaningful data from the unreconstructed data stream, the stream parser employs a context switch module for re-forming parts of packet headers as the data stream is streaming through the stream parser. The stream parser includes a logic unit operated by microcode stored in a program module, as well as a channel configuration memory controlled by software in a master processor. Because of this combination of hardware processing and software control, the stream parser is both quick and flexible.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: June 23, 2009
    Assignee: Marvell Israel (M.I.S.L.) Ltd.
    Inventor: Dan Aleksandrowicz
  • Patent number: 7539203
    Abstract: According to embodiments of the present invention, a data source provides data on multiple channels to a data sink. In embodiments, each channel shares the same random access memory (RAM)-based flow control and has first-in-first-out (FIFO) read/write.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: May 26, 2009
    Assignee: Intel Corporation
    Inventor: Rajesh B. R. Rao
  • Patent number: 7529274
    Abstract: A wireless communications system in which an access point (AP) transmits a downlink signal for reception by one or more subscriber unit(s) (SU) and the subscriber unit (SU) transmits an uplink signal for reception by the access point (AP). The downlink signal from the access point (AP) carries syncronisation bursts (2) at predetermined times and data contained in frames interleaved between the synchronisation bursts. Each synchronisation burst comprises an offset pointer (4) to the start of the subsequent downlink frame.
    Type: Grant
    Filed: July 10, 2002
    Date of Patent: May 5, 2009
    Assignee: Cambridge Broadband Networks Limited
    Inventor: John David Porter
  • Patent number: 7461286
    Abstract: A memory system includes a memory hub controller that sends write data to a plurality of memory modules through a downstream data bus and receives read data from the memory modules through an upstream data bus. The memory hub controller includes a receiver coupled to the upstream data bus and a transmitter coupled to the downstream data bus. Similarly, each of the memory modules includes a receiver coupled to the downstream data bus and a transmitter coupled to the upstream data bus. Each receiver includes a receive clock generator that is synchronized by coupling a known pattern of data to the receiver. The receiver determines which phase of the receive clock best captures the known pattern and uses that receive clock phase during normal operation.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: December 2, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Ralph James
  • Patent number: 7433394
    Abstract: A transmitting/receiving arrangement comprises a baseband module (1) and a radio-frequency module (3), which are connected to one another via a bidirectional data line (21) and a bit clock line (22) of a digital interface (2). In order to eliminate the influence of delay loops during the transmission of data in the opposite direction to the bit clock either the data bits are transmitted repeatedly or a bit clock frequency is set which is lower than the bit clock frequency for rectified transmission of bit clock signal and data signal.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: October 7, 2008
    Assignee: Infineon Technologies AG
    Inventors: Berndt Pilgram, Dietmar Wenzel
  • Patent number: 7136624
    Abstract: An object is to select destination mobile stations so as to prevent directional beams directed to the respective mobile stations from interfering with each other in application of a directional antenna, and to allocate the radio resources to the mobile stations thus selected.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: November 14, 2006
    Assignee: NTT DoCoMo, Inc.
    Inventors: Yoshiaki Ofuji, Sadayuki Abeta, Mamoru Sawahashi
  • Patent number: 7068657
    Abstract: A method for facilitating inverse multiplexing over asynchronous transfer mode is disclosed herein. The method includes receiving a stream of sequentially aligned ATM cells via an originating end point logical communication link. A sequence identifier is associated with each one of the ATM cells for creating sequence-identified ATM cells. The sequence-identified ATM cells are forwarded to a destination endpoint logical communication link in a distributed manner over a plurality of IM communication links. A first one of said IM communication links has disparate data transmission rates in at least one data transmission direction with respect to a second one of the IM communication links.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: June 27, 2006
    Assignee: Alcatel
    Inventor: Stefan Keller-Tuberg
  • Patent number: 7068665
    Abstract: Disclosed is an asynchronous transfer mode relating to a cell switching method, a cell format converter thereof, and a switching system thereof which are proper for switching an AAL2 ATM cell and an AAL5 ATM cell using an AAL2/AAL5 converter and an AAL5/AAL2 converter. Namely, AAL2 traffic may be switched at an AAL level using the AAL2/AAL5 and AAL5/AAL2 converters, so as to increase a system efficiency and provide a flexible interface between AAL2 and AAL5 protocol.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: June 27, 2006
    Assignee: LG Electronics Inc.
    Inventor: Kwang Il Lee
  • Patent number: 6895248
    Abstract: A resource allocation method for use in a wireless ATM network comprises receiving on a wireless signaling channel a request for access to a shared frequency-time sliced wireless medium. A channel matrix is then searched for a set of available frequency-time slots. The channel matrix represents a time frame within the shared frequency-time sliced wireless medium, and is used to keep track of resource allocation in the time-frequency sliced medium. The set of available time-slots is then allocated if the allocation does not violate a frequency switching constraint, and if the set of available frequency-time slots contains a number of slots no smaller than a requested number of slots. In a preferred embodiment of the invention, the searching step uses a greedy resource allocation strategy to search a channel-chunk matrix comprising a list of contiguous chunks of available time slots in each frequency of the shared frequency-time sliced wireless medium.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: May 17, 2005
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Bora A. Akyol, Donald C. Cox
  • Patent number: 6738360
    Abstract: The present invention relates to a system and method for reliably transmitting data over wireless communication channels. The invented system 10 comprises a transmitting device 12 having an error control coding circuit 20 and an interleaver circuit 22 in communication with each other. The invented system 10 also includes a receiving device 14 having an error control decoding circuit 26 and a de-interleaver circuit 28 in communication with each other. The transmitting device 12 and the receiving device 14 communicate over a wireless communication channel 16. The error control coding circuit 20 applies an error control code to the data before it is transmitted over the communication channel 16. The data is also interleaved prior to being transmitted. After transmission over the communication channel 16, the data is de-interleaved and any transmission errors are detected and corrected.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: May 18, 2004
    Assignee: Verizon Laboratories Inc.
    Inventors: Arianne M. Lewis, Arnold M. Michelson, Evert Basch, Allen H. Levesque
  • Patent number: 6690649
    Abstract: A QoS management apparatus in which the quality of the requested QoS for each path and different values of the state are managed. A QoS monitor, a registered QoS, and an operation determining function are provided for each path, and the QoS is precisely managed.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: February 10, 2004
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6625156
    Abstract: A method of establishing Quality-of-Service (QoS) communications within a network proposes the encapsulation of a control message that facilitates QoS for an associated data flow, according to a protocol not implementing resource reservation, such as the User Datagram Protocol (UDP). The encapsulated control message is then propagated through the network on a routed path, while the associated data flow is propagated over a short-cut path through the network.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: September 23, 2003
    Assignee: Nortel Networks Limited
    Inventors: Jack Shaio, Rahul Kasralikar
  • Patent number: 6611231
    Abstract: Methods, apparatuses and systems are provided for use in a wireless routing network. One apparatus, for example, includes an adaptive antenna that is configurable to receive a transmission signal from a transmitter and in response transmit corresponding outgoing multi-beam electromagnetic signals exhibiting a plurality of selectively placed transmission peaks and transmission nulls within a far field region of a coverage area. The adaptive antenna may also be configured to selectively receive at least one incoming electromagnetic signal directed through the coverage area. The adaptive antenna includes at least one antenna array and logic. The antenna array has a plurality of antenna elements. The logic is operatively coupled to the antenna array and configured to selectively control the placement of the transmission peaks and transmission nulls within the outgoing multi-beam electromagnetic signals.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: August 26, 2003
    Assignee: Vivato, Inc.
    Inventors: William J. Crilly, Jr., Ken Biba, Robert J. Conley
  • Patent number: 6556568
    Abstract: A receiving method for absorbing cell-fluctuation with a minimum data delay in low-speed transmission in an ATM switching network. In a cell fluctuation absorption receiving method of a CLAD device equipped in an ATM switching network, the CLAD device for assembling or disassembling cells from or to a bit string having a fixed communication speed of data communication from the connected communication device includes a CLAD unit having a receiving buffer corresponding to the communication speed of each of the addresses, and before storing the first received cell data, storing dummy data in a receiving buffer, the dummy data corresponding to the fluctuation guarantee time.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: April 29, 2003
    Assignee: Hitachi Communication Technologies, Ltd.
    Inventor: Toshimitsu Sasaki
  • Patent number: 6545979
    Abstract: A system and method for calculating round trip delay (RTD) values in a switched digital network such as an asynchronous transfer mode (ATM) network. A loopback cell such as an ATM operation and maintenance (OAM) cell is used to carry a delta value through the network. The delta value, which represents a processing interval at a loopback node or an intermediate node, is calculated utilizing timestamps generated at specific ingress and egress ports of network nodes. Cell Transfer Delay (CTD) and Cell Delay Variations (CDV) values are calculated based on the measured RTD.
    Type: Grant
    Filed: November 27, 1998
    Date of Patent: April 8, 2003
    Assignee: Alcatel Canada Inc.
    Inventor: André Poulin
  • Patent number: 6532237
    Abstract: An apparatus for and method of enabling the debugging and testing of complex multilevel PNNI based ATM networks. The invention has applications in networks wherein one or more nodes implement only the Minimum Function PNNI implementation and wherein these modes must operate correctly in a PNNI hierarchy environment. A plurality of PTSEs representing simulated virtual portions of an ATM network are injected into a node under test. The PTSEs represent hierarchical portions of ATM networks that are difficult or impossible to implement. The virtual portions of the networks may or may not have been able to be created using real physical network elements. The method includes first generating the injection file containing all the PTSEs to be simulated and then injecting this file into the node under test.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: March 11, 2003
    Assignee: 3Com Corporation
    Inventors: Alexander Or, Haim Rochberger, Ken Benstead
  • Patent number: 6483834
    Abstract: A system for creating a switched virtual circuit that includes a switch that receives initial information and a connection management system that is electrically connected to the switch, wherein the switch sends a signal to the connection management system that contains information as to the proper connection for the initial information and wherein the connection management system creates a virtual circuit that will reconfigure and transmit the initial information in such a manner that no information is lost when the initial information is transmitted by the virtual circuit.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: November 19, 2002
    Assignee: Sprint Communications Company L.P.
    Inventor: Bruce Fredrick Salisbury
  • Publication number: 20020141450
    Abstract: A method and apparatus for processing bytes received from a data stream includes multiple parallel byte processing engines that simultaneously process a first set of bytes received from a data channel during a first cycle and simultaneously process a second set of bytes received from the data channel during a second cycle. The method and apparatus further includes a state memory for storing byte information pertaining to the first set of bytes. When processing HDLC protocol bytes, the multiple parallel byte processing engines process the first and second set of bytes to identify at least one delineating byte contained within the data channel in accordance with a HDLC protocol.
    Type: Application
    Filed: April 2, 2001
    Publication date: October 3, 2002
    Inventor: Ramesh Duvvuru
  • Patent number: 6459699
    Abstract: In an ATM switching module, expansion interfaces are connected in pair to an ATM switch to respectively operate in active and standby states. When another ATM switching module is installed and a connection is established between an expansion interface of standby state and the newly installed ATM switching module, a process sets the standby state expansion interface in hot-standby state, and holds off incoming ATM cells destined for the hot-standby state expansion interface until the connection is ready to accept cell traffic, whereupon the hot-standby state expansion interface is switched to active state, whereby the ATM switch and an ATM switch of the another switching module constitute a multi-stage configuration.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: October 1, 2002
    Assignee: NEC Corporation
    Inventors: Toshiharu Kimura, Tetsuro Maeda
  • Patent number: 6456860
    Abstract: A wireless communication system having base station equipment which forms a wireless zone and base station control equipment which performs channel control of calls occurred in the radio stations located in the wireless zone, in cooperation with a switching center. The base station equipment extracts a specific speech signal that has control information included in speech signals generated by a variable rate codec. The base station equipment disassembles the speech signals and the control information into individual transmission units and transmits the transmission units to the radio base station. The base station radio control equipment outputs or accepts control information including identification information, and performs delivery of the control information between the radio station and the switching center.
    Type: Grant
    Filed: July 7, 1999
    Date of Patent: September 24, 2002
    Assignee: Fujitsu Limited
    Inventor: Tatsuru Nakagaki
  • Patent number: 6411624
    Abstract: The invention comprises a telecommunications signaling processor that processes Signaling System #7 (SS7) telecommunications signaling messages to select Asynchronous Transfer Mode (ATM) virtual connections and provide control messages indicating the selected ATM virtual connections.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: June 25, 2002
    Assignee: Sprint Communications Company L.P.
    Inventors: Joseph Michael Christie, William Lyle Wiley, Royal Dean Howell
  • Patent number: 6314174
    Abstract: A call control apparatus shortens a call releasing process to effect the releasing process efficiently. The call control apparatus has a delay time determining factor managing function to manage a delay time determining factor which determines a delay time of the call releasing process for each path, a path order establishing function to establish an order of paths having successively smaller delay times based on the delay time determining factor, and a release request message transmitting function to transmit release request messages to effect the call releasing process to nodes or terminals according to the order of paths.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: November 6, 2001
    Assignee: Fujitsu Limited
    Inventor: Tomoyuki Furutono
  • Patent number: 6243395
    Abstract: ATM data can be transferred via a highspeed serial data bus standardized by the IEEE 1394 format. In a data transferring apparatus for transferring data by employing a serial bus standardized by the IEEE 1394 format, an ATM cell transferring apparatus is comprised of an adding circuit for adding a predetermine header in order that an ATM cell used in a network defined by the ATM system is stored into the data field of the isochronous packet defined by the IEEE 1394 format.
    Type: Grant
    Filed: November 4, 1997
    Date of Patent: June 5, 2001
    Assignee: Sony Corporation
    Inventors: Takahiro Fujimori, Makoto Sato, Tomoko Tanaka
  • Patent number: 6189034
    Abstract: In a computer system having a memory, a processor, and a network interface, a method for dynamically launching a conferencing application upon the receipt of an incoming call having the steps of: receiving an incoming call signal on the network interface; processing the incoming call signal to detect an intended recipient application; and launching the intended recipient application. An apparatus for dynamically launching a conferencing application upon the receipt of an incoming call having a call directing module; a process manager coupled to the call directing module; and, a conferencing component coupled to the network interface; and the call directing module; the conferencing component containing a circuit for notifying the call directing module upon receipt of an incoming call and causing the call director to signal the process manager to activate a conferencing application.
    Type: Grant
    Filed: May 8, 1996
    Date of Patent: February 13, 2001
    Assignee: Apple Computer, Inc.
    Inventor: Guy Riddle
  • Patent number: 6128295
    Abstract: An Asynchronous Transfer Mode (ATM) switching device (20) has ATM cells (both point-to-point and point-to-multipoint) routed therethrough to one or more physical output links (31-38). The switching device (20) includes a cell buffer memory (92) which is the sole storage area on an egress exchange terminal for all cells, including point-to-multipoint cells, regardless of to which physical output link the cell is destined. For point-to-multipoint cells, pointers to the location of the cell in the cell buffer memory (92) are stored in one or more pointer queues (114), the pointer queues (114) corresponding to physical output links over which the point-to-multipoint cells are expected to be propagated. As each physical output link is selected, the pointer in the corresponding pointer queue is used to obtain the cell from the cell buffer memory (92) for readout on the selected link.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: October 3, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Gunnar Larsson, Anders Bjenne, Clarence Fransson, Raimo Sissonen
  • Patent number: 6122337
    Abstract: A service clock regenerator regenerates a local clock from time stamps of a remote clock transmitted over a network by determining the slope of (or difference between current and previous) time stamps of the remote clock and the slope of time stamps of the local clock. A phase difference is formed as the difference between the slope of the time stamps of the remote clock and the slope of the time stamps of the local clock and this phase difference is accumulated to generate a phase error signal. The phase error signal is filtered to generate a frequency adjustment signal having a magnitude that depends on the phase error signal. The frequency of the local clock is adjusted according to the magnitude of the frequency adjustment signal thereby reducing a phase difference between the remote time stamps and the local time stamps.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: September 19, 2000
    Assignee: Maker Communications, Inc.
    Inventors: Scott Bleiweiss, Peter Chantiles
  • Patent number: 6031840
    Abstract: The invention comprises a telecommunications signaling processor that processes Signaling System #7 (SS7) telecommunications signaling messages to select Asynchronous Transfer Mode (ATM) virtual connections and provide control messages indicating the selected ATM virtual connections.
    Type: Grant
    Filed: November 22, 1996
    Date of Patent: February 29, 2000
    Assignee: Sprint Communications Co. L.P.
    Inventors: Joseph Michael Christie, deceased, by Joseph S. Christie, executor, by Jean M. Christie, executrix, William Lyle Wiley, Royal Dean Howell
  • Patent number: 5991265
    Abstract: An ATM system transmits different types of cells (data, forward resource management (RM) and backward RM) from station A through switch(es) to station B. Different fields in an Available Bit Rate (ABR) table provide controls over the rate of such cell transmissions. First particular field values in such table control the selection of successive ones of cell decision blocks which determine the type of cell to be transmitted. Second particular field values in such table control the selection of one of a plurality of entries in an exponent table which also provides other parameter values controlling the generation of an explicit rate. Third particular field values in the ABR table control the selection of an individual one of a plurality of rate decision blocks each indicating an individual rate of cell transmission from the station A to the station B.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: November 23, 1999
    Assignee: Conexant Systems, Inc.
    Inventor: Bradford C. Lincoln
  • Patent number: 5970107
    Abstract: A service clock regenerator regenerates a local clock from time stamps of a remote clock transmitted over a network by determining the slope of (or difference between current and previous) time stamps of the remote clock and the slope of time stamps of the local clock. A phase difference is formed as the difference between the slope of the time stamps of the remote clock and the slope of the time stamps of the local clock and this phase difference is accumulated to generate a phase error signal. The phase error signal is filtered to generate a frequency adjustment signal having a magnitude that depends on the phase error signal. The frequency of the local clock is adjusted according to the magnitude of the frequency adjustment signal thereby reducing a phase difference between the remote time stamps and the local time stamps.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: October 19, 1999
    Assignee: Maker Communications, Inc.
    Inventors: Scott Bleiweiss, Peter Chantiles
  • Patent number: 5959994
    Abstract: An enhanced ATM switch with CPU node interconnect functionality and peripheral interconnect functionality and network functionality. The ATM switch provides low latency transfer between computer nodes and performs input/output operations with peripherals through the ATM network. SCSI Fibre Channel protocol (FCP) commands are implemented according to ATM standards to provide communication with peripherals. A segmentation and reassembly (SAR) unit is provided for performing ATM segmentation and reassembly. The SAR includes functional units which allow direct connection of an application agent to the core of the switch once the cell characteristics are determined by the application agent and provides ATM cell translation to and from available kernel buffers. The transmission media in the ATM network comprises digital optical links. The enhanced ATM switch may also include a synchronous optical network (SONET) interface for providing SONET transmission over the digital optical links in the ATM network.
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: September 28, 1999
    Assignee: NCR Corporation
    Inventors: Gary Lee Boggs, Robert Samuel Cooper, Gene Robert Erickson, Douglas Edward Hundley, Gregory H. Milby, P. Keith Muller, Curtis Hall Stehley, Donald G. Tipon
  • Patent number: 5956342
    Abstract: An Asynchronous Transfer Mode switch and method which facilitate priority arbitration of point-to-point and point-to-multipoint transmission are disclosed. To execute point-to-multipoint operation a bandwidth arbiter maintains a first list of connections and bit vectors indicating designated destination ports. The list maintained by the bandwidth arbiter is then compared to an unassigned output port bit vector to determine matches therebetween at which point-to-multipoint transmission may be made by utilizing instantaneously unused bandwidth within the switch. To execute point-to-point operation each input port maintains a list of connections associated with each output port, and those lists are used in conjunction with output port request information per input port in the bandwidth arbiter to match requests to the unassigned output port bit vector. The bandwidth arbiter may also assign priority to connections in the list.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: September 21, 1999
    Assignees: Fujitsu Network Communications, Inc., Fujitsu Limited
    Inventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser, Matthias L. Colsman
  • Patent number: 5923681
    Abstract: An error correction circuit for an ATM header of an ATM cell uses a sequence of synchronous comparator circuits to generate a correction mask. The sequence of comparators, when used in a processor having a 32-bit bus, provide for near minimum processing delay at an ATM node. The error correction circuit also provides error status flags for an ATM cell processor, allowing for the processor to discard ATM cells with multiple errors.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: July 13, 1999
    Assignee: Tektronix, Inc.
    Inventor: Claude Denton
  • Patent number: 5912892
    Abstract: A method of routing Asynchronous Transfer Mode (ATM) connections in a network. A Virtual Path Index (VPI) and a Virtual Channel Index (VCI) identify connections in the network. The bits of the VPI and VCI are selectively allocated, allowing for an increased number of paths in the network. Fractional paths are thereby created, increasing the routing capabilities of the network. Multiplexing of paths in the network further enhances the network routing capability. Cells containing data are switched on the connections in the network. A plurality of tables in the ATM hardware stores a VPI value and a value representing the number of significant bits allocated to the VPI for the purpose of switching cells. Cells with the same VPI are routed over the same paths as dictated in part by the values in the corresponding tables.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: June 15, 1999
    Assignee: Hughes Electronics Corporation
    Inventors: Andrew W. Barnhart, Lawrence R. Kreeger
  • Patent number: 5892770
    Abstract: A first data stream for a first data transmission system having a first data rate contains ATM data cells and structural data, which are distributed as spaced apart data in accordance with a specified instruction and are assigned to a section including in each case a plurality of ATM data cells. While retaining its ATM data cell format, the first data stream is converted into a second data stream containing only ATM data cells for a second data transmission system having a second data rate which is higher than the first data rate. The structural data are thereby selected (or picked out) from the first data stream and are input into a marked structural cell having the ATM cell format, for the section. The structural cell is inserted into the second data stream to partially fill an unoccupied section resulting from the differing data rates.
    Type: Grant
    Filed: February 22, 1996
    Date of Patent: April 6, 1999
    Assignee: Tektronix, Inc.
    Inventors: Andreas Wolf, Hans-Werner Arweiler
  • Patent number: 5859856
    Abstract: A number of storage units and a number of state machines are provided to reorder interleaved ATM data cells for a number of channels incoming to a networked host computer. The storage units store the incoming ATM data cells, a number of data structures tracking the stored ATM data cells for the channels and the free resources, and an unload schedule queue. The state machines load and unload the incoming ATM data cells, and update the tracking data structures and schedule queue accordingly.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: January 12, 1999
    Assignee: Sun Microsystems, Inc.
    Inventors: Rasoul M. Oskouy, Denny Gentry
  • Patent number: 5852602
    Abstract: In a credit control method and system, an initial credit value is sent from a receiving-side to a sending-side prior to transferring a packet. Transfer of a packet is started on the sending-side when this credit value is received. On the receiving-side, a new credit value is calculated when the packet is received, and the same number of packets as the number indicated by the calculated new credit value are received and processed. A new credit value is sent to the sending-side whenever receiving buffers whose number equals the preceding new credit value are emptied. On the sending-side, the sum of the new credit value and the initial credit value, whenever the new credit value is received, is stored as a credit value indicating the number of successively transmittable packets. The stored credit value is decremented by one on the sending-side whenever a packet is sent, and packets are continuously transferred until the credit value becomes "0" or there is no more packet to be sent.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: December 22, 1998
    Assignee: NEC Corporation
    Inventor: Tsugio Sugawara
  • Patent number: 5815498
    Abstract: A transmission method for ATM cells presented by local stations to a central station, and for ATM cells presented by the central station to the local stations, wherein a cell destined for the central station is stored in a cell buffer of one of the local stations and a first character is written to a register of the local station when the cell destined for the central station is presented in the local station. A second character is written to the register of the local station when an empty time slot is present in the local station. The register of each of the local stations are periodically read, and contents of the read local registers of the local stations are transmitted to the central station as register codes. Permit codes are transmitted from the central station to the local stations based on a location of the first characters in the registers, with the permit codes signifying permission to transmit a cell during a specific time slot.
    Type: Grant
    Filed: October 17, 1995
    Date of Patent: September 29, 1998
    Assignee: Koninklijke PTT Nederland N.V.
    Inventor: Mark Johannes Gerardus Dirksen
  • Patent number: 5809012
    Abstract: A communication system for use with a network for transmitting fixed-length cells from a transmitting terminal via a virtual connection in the network to a receiving terminal.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: September 15, 1998
    Assignee: Fujitsu Limited
    Inventors: Tadahiro Takase, Kazuo Hajikano, Takeshi Kawasaki, Toshio Shimoe, Tetsuo Tachibana, Teruaki Hagihara, Satoshi Kakuma, Masami Murayama, Ryuichi Takechi, Satoshi Kuroyanagi, Jyoei Kamoi, Hiroshi Tomonaga
  • Patent number: 5781320
    Abstract: A fiber optic access architecture consisting of a remote terminal for receiving broadband asynchronous transfer mode (ATM) traffic from a broadband switching system is disclosed. The broadband traffic is delivered over a pair of OC-12 links to common elements of the remote terminal. The common elements deliver the traffic to one of two high speed ATM buses. The ATM buses deliver the ATM traffic to one of a plurality of line cards that interface with the customer drop to the customer premise equipment. The line cards can include POTS (plain old telephone service) line cards and special line cards as are known to provide the traditional voice and special service. In addition to the standard line cards, the system includes the fiber line cards of the invention for delivering high speed, broadband traffic to the customer premise. The fiber line cards include 16 bit cell-based UTOPIA-2 bus interface for receiving traffic from each of the ATM buses.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: July 14, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: Charles Calvin Byers
  • Patent number: 5777995
    Abstract: A translator in an element of a wideband network transforms a format restored by a CCITT information cell into other predetermined formats. It performs this function by inserting cells from a microprocessor into network data flow in asynchronous transfer mode (ATM) and extracting from the network data flow cells addressed to the microprocessor. The translator includes an input portion for receiving input data cells from the network data flow and for modifying a header of cells in the input data so as to adapt them to perform functions in the ATM layer. Preferably, the translator is implemented as an integrated circuit which serves as an interface between the network and the microprocessor, and which configures and manages asynchronous transfer mode multiplexer functions.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: July 7, 1998
    Assignee: Telefonica De Espana, S.A.
    Inventors: Pedro Luis Chas Alonso, Luis Antonio Merayo Fernandez, Ana Altadill Arregui, Jose Manuel Suarez Martel, Ignacio Carretero
  • Patent number: 5771350
    Abstract: The present invention relates to an Asynchronous Transfer Mode(ATM) network adaptor for the simultaneous processing of the multi-channel traffic, and includes an R-interface(RIF) means composed of a plurality of first interface means, which output the CBR traffic according to their token signal indicating a point of time occupying the bus or in the case of having the same header address as its own, after receiving the external CBR traffic, and composed of a plurality of second interface means which receive the external VBR traffic and also output it to the external; a Multipled Traffic bus(MT-bus) is connected to the first interface means, being used for transmitting multiplexed channels by providing constant bandwidth necessary for the CBR traffic transmission; a system bus is connected to the first and second interface means, and used for transmitting not only VBR traffic of the second interface means but also the resource control signal of the system; and an ATM Network Interface(ANI) means used for transm
    Type: Grant
    Filed: April 9, 1996
    Date of Patent: June 23, 1998
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
    Inventor: Dong Won Kim
  • Patent number: 5751697
    Abstract: A method of scheduling cell transmission over an asynchronous transfer mode communication channel. The channel has a characteristic transmission rate that is related to the system clock frequency .function. and an allowed cell rate ACR expressed as a floating point number having a mantissa m, and an exponent e, where 0.ltoreq.m.ltoreq.511, 0.ltoreq.e.ltoreq.31 and ACR=(1+m/512)*2.sup.e. If m.gtoreq.128 then the reciprocal of the mantissa portion (1+m/512) is evaluated by piece-wise linear approximation of the function: ##EQU1## Otherwise, if m<128 then the mantissa portion is evaluated by piece-wise linear approximation of the function: ##EQU2## A selected cell is then scheduled for transmission at a time T relative to the transmission time T.sub.0 of a cell transmitted immediately prior to the selected cell, where T=T.sub.0 +(ACR.sup.-1)*f.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: May 12, 1998
    Assignee: PMC-Sierra, Inc.
    Inventors: Sivakumar Radhakrishnan, Stephen J. Dabecki
  • Patent number: 5737312
    Abstract: A call processor performs call set-up/release processing based upon absence/presence of valid data from an SVC service terminal and either decreases or increases an idle band of the network by an amount equivalent to the assigned band of the SVC service terminal. Further, the call controller sends a network an OAM cell for band assignment or am OAM cell for canceling band assignment based upon absence/presence of valid data from a PVC service terminal and either decreases or increases an idle band of the network by an amount equivalent to the assigned band of the PVC service terminal. In a case where the transfer rate of data sent from terminal is high, a band assignment controller send the network an OAM cell for retesting band increase, increases the assigned band of the terminal by a prescribed amount and decreases the idle band by an amount equivalent to the increase in the assigned band.
    Type: Grant
    Filed: December 5, 1996
    Date of Patent: April 7, 1998
    Assignee: Fujitsu Limited
    Inventor: Yasushi Sasagawa
  • Patent number: 5724358
    Abstract: A system and method for communicating multiple priority level data packets between input ports and output ports of a switch is disclosed where the data packet has a header portion identifying at least one output port destination and a level of priority, selected from a predetermined set of priority levels, of the data within the data packet. A buffer, shared by the output ports, stores the data packet in a selected buffer location based on the output port destination and priority level of the data packet. Pointers to buffer locations containing data packets having a particular priority level are stored in one or more priority sub-queues for one or more of the plurality of output ports based on the output port destinations and the priority level of the data packet. The data packets are output to the output ports in priority order.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: March 3, 1998
    Assignee: Zeitnet, Inc.
    Inventors: Kent H. Headrick, Kannan Devarajan
  • Patent number: 5724351
    Abstract: A multicast switch for routing incoming cells having a multicast bit pattern and a priority value, arriving at a plurality of input ports, to one of a plurality of output ports, which includes input port controllers and routing modules. Each of the routing modules routes received cells to an associated one of a plurality of groups of output ports and provides a feedback priority value based on a priority value associated with a lowest priority cell passed to the associated group of output ports.
    Type: Grant
    Filed: August 7, 1995
    Date of Patent: March 3, 1998
    Inventors: Hung-Hsiang Jonathan Chao, Byeong-Seog Choe
  • Patent number: 5715250
    Abstract: An Asynchronous Transfer Mode-Local Area Network (ATM-LAN) connection apparatus is connected between an ATM terminal of a LAN emulation protocol and an ATM switch connected to ATM terminals of an Internet Protocol (IP) over ATM protocol. The ATM-LAN connection apparatus includes ATM physical layer sections for transmission and reception of an ATM cell, AAL5-SAR sections for reassembly and segmentation of an AAL5 packet, a LAN emulation protocol processing section for performing minimum LAN emulation protocol processing with respect to the specific ATM terminal, an IP over ATM protocol processing section, and a bridging section for frame format conversion between both the protocols.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: February 3, 1998
    Assignee: NEC Corporation
    Inventor: Ayumi Watanabe