Abstract: An input sampling method includes the following operations. A first pulse signal and a second pulse signal are received. Logical operation is performed on the first pulse signal and the second pulse signal to determine a to-be-sampled signal. The to-be-sampled signal is obtained by shielding an invalid part of the second pulse signal according to a logical operation result. Sampling process is performed on the to-be-sampled signal to obtain a target sampled signal.

Abstract: Technologies for low jitter and low power ring oscillators with multi-phase signal reassembly are described. A ring oscillator circuit includes a ring oscillator with a set of M delay stages, each stage outputs a phase signal, where M is a positive integer greater than one. The ring oscillator circuit includes a phase selector circuit coupled to the ring oscillator. The phase selector circuit can receive M phase signals from the ring oscillator and generate N phase signals based on the M phase signals, where N is a positive integer less than M.

Abstract: A method for processing a video includes performing a determination, by a processor, that a first video block is partitioned to include a first prediction portion that is non-rectangular and non-square; adding a first motion vector (MV) prediction candidate associated with the first prediction portion to a motion candidate list associated with the first video block, wherein the first MV prediction candidate is derived from a sub-block MV prediction candidate; and performing further processing of the first video block using the motion candidate list.

Abstract: A system for transmitting a value via a pulse-width-modulated signal, comprises a transmitter and a receiver. The transmitter is configured for detecting the value and for outputting a pulse-width-modulated signal having a pulse width which represents the value or a range around the value. The receiver is configured for deriving the value or the range from the pulse-width-modulated signal, by evaluating the pulse width. The transmitter is furthermore configured to read back the emitted pulse-width-modulated signal and to check whether the value or the range can be derived from the emitted pulse-width-modulated signal, and, if the value or the range cannot be derived, to output an error signal to the receiver.

Abstract: Foreign substance detection can be performed with a simple configuration in a power transmission system. A power transmitting apparatus that wirelessly transmits power to a power receiving apparatus, the power transmitting apparatus comprises: determination means for, in a case where an initial impedance value and the detected output impedance value do not match and there is no change in the output impedance value between before and after the transmission of a predetermined detection signal, determining that a foreign substance is present within a predetermined power transmission range, and, in a case where the initial impedance value and the detected output impedance value do not match and there is a change in the output impedance value between before and after the transmission of the predetermined detection signal, determining that a power receiving apparatus is present within the predetermined power transmission range.

Abstract: A power converter for providing a negative voltage is provided. A coupling controller circuit receives a digital control signal and provides a control signal. A reverse voltage converter circuit receives the control signal and provides a reverse voltage. The reverse voltage converter circuit includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a seventh switch, an eighth switch, a coupling control signal triggering circuit and a pulse width modulation circuit. A first reverse logic circuit is connected to a second reverse logic circuit. The second reverse logic circuit is connected to the pulse width modulation circuit and is configured to provide a trigger signal to the pulse width modulation circuit. The pulse width modulation circuit turns on or off the reverse voltage converter circuit according to the trigger signal.

Abstract: A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, determines whether a first block is available and whether a second block is available, the first block and the second block being defined relative to a current block to be processed; selects a context model based on whether the first block is available, whether the second block is available, which of inter prediction and intra prediction is to be applied to the first block, and which of inter prediction and intra prediction is to be applied to the second block; and encodes, using the context model selected, a parameter indicating which of intra prediction and inter prediction is to be applied to the current block.

Abstract: Method and electronic device for the pulse-modulated actuation of a load in a vehicle, a period duration (TPM) of a frequency (fPM) of the pulse modulation being able to be divided into an integer number (N) of sections (TSTEP), the duration of each of which corresponds to a multiple of a period duration (TOSC) of a clock signal, and the method having the steps of: calculating a frequency (fPM+1, fPM) or period duration (TPM+1, TPM) of a period of the pulse modulation on the basis of underlying frequency modulation, and determining the duration of a respective section (TSTEP) of a period duration (TPM) of the pulse modulation using the calculated frequency (fPM+1, fPM) or period duration (TPM+1, TPM) of a period of the pulse modulation.

Abstract: A method for transferring data from an actuating element to a control unit activating the actuating element. The control unit activates an inductance contained in the actuating element, for the transfer of the data in the actuating element in parallel to the inductance, a load being connected in parallel, or not.

Abstract: A method for increasing performance of a voltage-buck switched-mode voltage regulator includes generating a first pulse-width modulation signal based on a clock signal, decreasing a frequency of the clock signal to form a modified clock signal, passing the modified clock signal to a digital modulation circuit as a regulated clock signal; and generating a second pulse-width modulation signal based on the regulated clock signal using the digital modulation circuit. The first pulse-width modulation signal includes a period T1 and an off duration D2 corresponding to a first duty cycle. The off duration D2 is an intrinsic pulse-width modulation signal generation latency. The second pulse-width modulation signal includes a period T2 and the off duration D2. The decreased frequency of the modified clock signal causes T2 to be greater than T1 such that a second duty cycle of the second pulse-width modulation signal is increased relative to the first duty cycle.

Abstract: The present disclosure relates to a data driving device, a data processing device, and a system for driving a display device and, more particularly, it relates to a data driving device, a data processing device, and a system for smoothly performing a low-speed communication through a communication line including an alternating current coupling capacitor.

Abstract: System having baseband units; a radio equipment controller module; radio equipment modules coupled to a physical antenna port having a slave port coupled to a master port of the radio equipment controller module or another radio equipment module. The radio equipment modules receive an uplink antenna-carrier stream from a physical antenna port and transmit the stream to its slave port and, if a master port is connected to another radio equipment module, it synchronizes and sums the stream with an uplink antenna-carrier stream from said master port, creating a summed uplink antenna-carrier stream transmitted to its slave port. The radio equipment modules receive a downlink antenna-carrier stream from the radio equipment controller module or another radio equipment module to its slave port for transmission to said physical antenna port and, if a master port is connected to another radio equipment module, forwards the downlink antenna-carrier stream to the master port.

Abstract: A system and method for calibrating a pulse width modulation (PWM) signal that extends the on time by a higher resolution increment. The system comprises a PWM generator that receives a VDDIO rail to generate first and second PWM signals, the second PWM signal having an on time extended by the higher resolution increment having a commanded length. The system further comprises a VDDIO circuit that receives the VDDIO rail and outputs a VDDIO signal. First and second analog-to-digital converters are configured to generate a first and second sets of PWM samples and first and second sets of VDDIO samples. A microcontroller is configured to calculate an actual increment length based on the samples, and to compensate for a difference between the commanded length and the actual increment length.

Abstract: An electronic timepiece includes a storage that stores specific-region DST application rule information and local time information that includes, in association with each other, DST application rules for each region and standard-wave transmitting station information indicating each station transmitting standard waves receivable in the region; a processor that controls clock time to be kept by a clock circuit and displays time to be displayed on a display; and a standard wave receiver that receives standard waves and obtains time information. The processor calibrates the clock time based on the time information indicated by the standard waves received by the standard wave receiver, and controls the display time based on whether the specific-region DST application rule information and the DST application rule information associated with the standard-wave transmitting station information indicating a station transmitting the received standard waves satisfy a predetermined condition.

Abstract: An encoder for modulating data on level transitions of a signal transmitted on a wired communication channel to increase channel data throughput, comprising a circuitry configured for receiving a signal transmitted by a transmitting communication node, the signal carries a message to one or more receiving communication nodes connected to a wired communication channel, calculating a respective delay period consisting of a number of delay time units encoding one or more data items, delaying one or more transitions of a waveform level of the signal by the respective delay period to modulate the signal to carry the data item(s) and transmitting the modulated signal to one or more of the receiving communication nodes having a decoder configured for demodulating the modulated signal.

Abstract: A drive module for use in a switching power supply generating output voltage from input voltage by turning on/off an output transistor and a synchronous rectification transistor includes: a zero-cross detection circuit detecting zero-cross of inductor current flowing when the synchronous rectification transistor is turned on; a drive logic circuit turning on the output transistor and turning off the synchronous rectification transistor when control signal is at first logic level, turning off the output transistor and turning on the synchronous rectification transistor when the control signal is at second logic level, and turning off both the output transistor and the synchronous rectification transistor when the zero-cross is detected; and a logic level switching circuit switching the control signal to third logic level when the zero-cross is detected, wherein the zero-cross detection circuit, the drive logic circuit, and the logic level switching circuit are integrated in a single package.

Abstract: A signal processor including a Pulse Width Modulation (PWM) encoder configured to encode data into a data PWM pattern; and a block encoder coupled to the PWM encoder, and configured to determine a checksum of the data PWM pattern, wherein the PWM encoder is further configured to encode the checksum into a checksum PWM pattern, and append the checksum PWM pattern on the data PWM pattern for transmission as a PWM signal.

Abstract: An apparatus for use in a polar transmitter to perform distortion estimation and compensation is provided. The apparatus includes a mixing unit, a signal processing unit, an estimation unit and a compensation unit. The mixing unit is configured to mix a test output signal and a frequency down-converting signal to generate a mixed signal. The processing unit is configured to perform signal processing on the mixed signal to generate a processed signal. The estimation unit is configured to perform distortion estimation on the processed signal to generate a distortion estimation result. The compensation unit is configured to perform pre-distortion compensation on input signals of the polar transmitter according to the distortion estimation result.

Abstract: A circuit includes a transmission channel that outputs a continuous-wave signal based on a reference signal, a transmit monitoring signal path that couples out a portion of the transmit signal as a monitoring signal, a test phase shifter that receives the reference signal and generates a phase-shifted signal based on a sequence of phase offsets applied to the reference signal, a phase mixer that mixes the phase-shifted signal and the monitoring signal to generate a mixer output signal including a plurality of direct current (DC) values, an analog-to-digital converter that samples the mixer output signal in order to provide a sequence of DC values; and a monitor circuit that applies a discrete Fourier transform (DFT) to the sequence of DC values to generate a plurality of DFT bins with corresponding DFT bin values, and generate compensated phase information of the transmission channel using at least two DFT bin values.

Abstract: A bit flipping algorithm for an LDPC decoder evaluates a data sequence d with respect to a parity code matrix H. Where one or more checks fail, bits of d are flipped such that for some iterations, the bits are flipped with bias toward and original data sequence r. For example, for some iterations, where the number of failed checks are below a first threshold T1, bits are only permitted to flip back to the value of that bit in the original data sequence r. In such iterations, bits are permitted to flip from the value in the original data sequence r only when the number of failed checks is greater than a second threshold T2, T2>T1. Values for thresholds may be based on a number of flipped bits from a previous iteration and may be calculated using a syndrome s=Hd from a previous iteration.

Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a program that allow an improvement in the rate of modulation of PWM signals. Pulse width modulation (PWM) is performed to convert one of a 0 or 1 represented by a bit of a pulse density modulation (PDM) signal into which an audio signal has been PDM-modulated, into a maximum-length pulse of a maximum pulse width of a PWM signal having a period equal to the period of the PDM signal, and convert the other of the 0 or 1 of the PDM signal into a minimum-length pulse of a minimum pulse width of the PWM signal at a position adjacent to the center of the period of the PWM signal. The present technology is applicable, for example, to audio reproduction systems that reproduce audio signals.

Abstract: The invention relates to the controlling of a rectifier with multiple electrical phases. In at least one electrical phase, the duty cycles are merged with one another in two consecutive cycles of the pulse-width modulated controlling, i.e. in a first PWM-pulse, the duty cycle is shifted to the end of the PWM-pulse, and in a subsequent PWM-pulse, the duty cycle is shifted to the start of the PWM-pulse. As a result, there must be no switching process between two consecutive PWM-pulses. In this way, the switching losses and consequently the rise in temperature of the rectifier can be minimised.

Abstract: Systems, methods, and devices enable the implementation of antenna diversity techniques. Devices include a first wireless communications device that includes a plurality of antennas, and a transceiver coupled to the plurality of antennas and configured to send and receive data in accordance with a wireless transmission protocol, while the peer wireless communication device may have a single antenna or multiple antennas. Devices also include a processor configured to, in a first mode, calculate an angle of arrival (AoA) with the plurality of antennas or an angle of departure (AoD) associated with single antenna, and, in a second mode, send data to and receive data from a second wireless communications device via at least a first antenna of the plurality of antennas, where the first antenna is selected by the processor based on one of a first plurality of signal measurements between the first and second wireless communications devices.

Abstract: A fault detection circuit may be used to determine if voltage supplied by a voltage regulator as power to sequential logic circuitry falls below a minimum voltage expected to be required by the sequential logic circuitry for proper operation. Information regarding voltage levels supplied to the sequential logic circuitry prior to such an occurrence may be written to a memory, for example to allow for further analysis.

Abstract: A system for monitoring pulse width modulation (PWM) duty operation execution for motor control, which can detect whether or not the PWM duty operation execution used for torque and speed control of a motor is performed normally within an interrupt execution timing, and perform failure diagnosis depending upon the detected result, thus enhancing stability of motor control.

Abstract: Systems, methods, and devices enable the implementation of antenna diversity techniques. Devices include a first wireless communications device that includes a plurality of antennas, and a transceiver coupled to the plurality of antennas and configured to send and receive data in accordance with a wireless transmission protocol, while the peer wireless communication device may have a single antenna or multiple antennas. Devices also include a processor configured to, in a first mode, calculate an angle of arrival (AoA) with the plurality of antennas or an angle of departure (AoD) associated with single antenna, and, in a second mode, send data to and receive data from a second wireless communications device via at least a first antenna of the plurality of antennas, where the first antenna is selected by the processor based on one of a first plurality of signal measurements between the first and second wireless communications devices.

Abstract: An apparatus comprises a programmable delay line (PDL) to receive a pulse-width modulation (PWM) signal as input and to generate a first output; a selection unit to provide PWM signal or its inverted version as a second output; and a sequential unit coupled to the PDL to sample the second output with the first output and to generate a pulse-frequency modulation (PFM) output. A voltage regulator comprises mutually coupled on-die inductors for coupling to a load; a bridge coupled to the mutually coupled on-die inductors, including a low-side switch and a high-side switch; a PWM controller for controlling the low-side and high-side switches during a first load current; and a PFM controller for controlling the low-side and high-side switches during a second load current, the second load current being smaller than the first load current, the PFM controller comprising a comparator and a first PDL coupled to the comparator.

Abstract: A power supply apparatus comprises: a power supply unit configured to perform wireless power supply to an electronic device; a communication unit configured to communicate with the electronic device using power for the wireless power supply; one or more processors; and a memory storing instructions which, when the instructions are executed, cause the power supply apparatus to function as: an acquisition unit configured to acquire information for performing communication using the power; and a control unit configured to control communication with the electronic device based on the information, wherein in a case where the electronic device can perform communication using the power, the control unit controls the communication unit such that a modulation degree indicating a degree to which an amplitude changes in amplitude modulation for the communication is smaller the higher the power transmitted is.

Abstract: Methods are described herein for communications bus data transmission using relative ground shifting. A plurality of voltage lines of at least one electronic control unit (ECU) are monitored. The at least one ECU electrically coupled to a communications bus. A voltage differential across at least two of the plurality of voltage lines of the at least one ECU is measured. A pulse or data stream is injected into the communications bus via one or two voltage lines based on the measured voltage differential having an amplitude lower than a predetermined voltage threshold.

Abstract: A timer including a Pulse Width Modulation (PWM) signal generator configured to generate, based on a clock, a PWM signal having a first frequency resolution; a PWM time shifter configured to receive from the PWM signal generator the PWM signal having the first frequency resolution, and output a PWM signal having a second frequency resolution, wherein the second frequency resolution is higher than the first frequency resolution; and a control monitor configured to: control the PWM time shifter to time shift rising edges or falling edges of the PWM signal by an amount corresponding with a second frequency resolution.

Abstract: In a transmission circuit that transmits transmission data using an amplitude shift modulation method (ASK modulation method) for changing an amplitude of carrier waves based on the transmission data or a transmission system that uses the transmission circuit, a phase of the carrier waves is changed based on the transmission data to suppress an irradiation of carrier wave components.

Abstract: A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected signal based on a first feedback signal and the multi-bit PCM signal. The method includes generating a first single-bit PWM signal based on the first corrected signal and the voltage ramp signal. The method includes delaying the voltage-ramp signal and generating a second corrected signal based on a second feedback signal and the multi-bit PCM signal. The method includes generating a second single-bit PWM signal based on the second corrected signal and the delayed voltage ramp signal and generating a multi-bit pulse-density modulation (PDM) signal based on the first single-bit PWM signal and the second single-bit PWM signal.

Abstract: A signal transmission system includes a switch component and a choke component each coupled to one of a first power wire and a second power wire, a first conductive path between the switch component and a load, a second conductive path between the choke component and the load, and a control block. The control block controls the switch component to not conduct when providing a control signal to the first and/or second conductive paths. When the switch component does not conduct, a magnetic core of the choke component does not reach magnetic saturation. When the switch component conducts, the magnetic core of the choke component operates at magnetic saturation.

Abstract: An encoding modulation method and transmitter are described. The method includes: oversampling and noise-shaping received multi-bit data to obtain N bits of data; using the N bits of data as a lookup table address to obtain a PWM puke modulation signal; multiplexing synthetic orthogonal (IQ) complex data of the PWM pulse modulation signal to be real number signal data; and converting the multiplexed real number signal data to an analog signal for power amplification and output, N being an integer representing a smaller number of bits than the received multi-bit data.

Abstract: System, methods and apparatus are described that offer improved performance of an Inter-Integrated Circuit (I2C) bus. A method of testing a spike filter in a legacy I2C device includes generating a command to be transmitted on a serial bus in accordance with an I2C protocol, where the command includes an address corresponding to the legacy slave device, merging the command with a sequence of pulses to obtain a test signal, transmitting the test signal on the serial bus, and determining the efficacy of a spike filter in the first slave device based on whether the legacy slave device acknowledges the test signal. Each pulse in the sequence of pulses has a duration that is less than 50 ns. The spike filter is expected to suppress pulses that have a duration of less than 50 ns.

Abstract: The present disclosure provide a transmission method and a device, which relate to the technical field of communications and reduce overhead and improve work efficiency in an application of cooperative transmission in aspects of synchronization, sharing of information such as data and the like, obtaining of channel information and data transmission. Meanwhile application scenarios may also be extended. The method specifically includes: obtaining, by an access point AP, a parameter value, wherein the parameter value is a frequency difference between a crystal oscillator frequency of the AP and a reference crystal oscillator frequency of a reference AP or a delay difference of the AP with respect to the reference AP; compensating, by the AP, a phase difference or a time difference according to the parameter value when both of the AP and the reference AP send data. The present disclosure is applied to an application of a cooperative transmission.

Abstract: An ion implantation system has a first chamber and a process chamber with a heated chuck. A controller transfers the workpiece between the heated chuck and first chamber and selectively energizes the heated chuck first and second modes. In the first and second modes, the heated chuck is heated to a first and second temperature, respectively. The first temperature is predetermined. The second temperature is variable, whereby the controller determines the second temperature based on a thermal budget, an implant energy, and/or an initial temperature of the workpiece in the first chamber, and generally maintains the second temperature in the second mode. Transferring the workpiece from the heated chuck to the first chamber removes implant energy from the process chamber in the second mode. Heat may be further transferred from the heated chuck to a cooling platen by a transfer of the workpiece therebetween to sequentially cool the heated chuck.

Abstract: Provided are methods and systems for smart backlighting. For example, there is provided a system for use with a vehicle. The system includes a primary subsystem configured to perform a first function. Further, the system includes a backlight subsystem configured to perform a second function, the second function being independent of the first function. Moreover, the system can includes a controller configured to generate a single signal including a first instruction for causing the primary subsystem to perform the first function and a second instruction for causing the backlight subsystem to perform the second function.

Abstract: Systems and methods are disclosed for low power RF communications, comprising receiving an AM signal using a passive RF receiver circuit, converting the AM signal to a digital output signal using a comparator, receiving the digital output signal from the comparator, determining whether the digital output signal is valid or not using a digital signal processing circuit, and upon detection of a valid digital output signal, enabling an active RF receiver circuit for RF signal processing.

Abstract: A digital down converter with equalization includes a composite ADC that performs demodulation of a received analog signal, converting the signal into in phase baseband signal and quadrature baseband signal. Equalization is performed to correct for misalignment of the frequency responses of the sub-ADCs in the composite ADC. In a form, ADC output signals are applied to a mixer array to frequency down-shift the digital form of the input signal, followed by digital filtering to effect convolutions of portions of the digital form of the input signal with a set of convolution coefficients determined so that the net processing is mathematically equivalent to down conversion with equalization. In another form, the ADC output signals are directly applied to a digital filter to effect both frequency down-shifting and convolutions, with filter coefficients determined so that the net processing is mathematically equivalent to down conversion with equalization.

Abstract: A built-in self-testing method of a near field communication device including several functions tests a first internal communication link between a first function and a second function. The testing is performed by sending, on said first internal communication link, a first command from said first function used as a transmitter to said second function used as a receiver, and by checking said first command has been correctly executed by said second function.

Abstract: A pulse-drive resonant clock with on-the fly mode changing provides robust operation in a resonant clock distribution network, in particular for processor circuits having a dynamically-varied operating frequency. The clock drivers for the resonant clock distribution network include a pulse width control circuit having selectable operating modes corresponding to multiple clocking modes of the resonant clock distribution network. The pulse width control circuit includes a delay line that has a selectable delay length to provide pulse enable signals that control the pulse widths of the clock drivers in a sector of the resonant clock distribution network. The delay line responds to a mode control signal so that at least one pulse width of the output is changed from a first pulse width to a second pulse width without generating half-cycles with a pulse width narrower than the first or second pulse width.

Abstract: A system having has a pulse width modulation controller to successively activate each of a plurality of channels each in its own individual channel time slot is described. The system also has a sampling multiplexer configured to successively sample a signal derived from each of the plurality of channels during each individual channel time slot. Each individual time slot has an individual sampling sequence.

Abstract: The present subject matter provides systems and methods for remotely controlling a hearing assistance device, including using a personal wireless device such as a cellular telephone. One embodiment includes a communication system for controlling a hearing assistance device. The system includes a personal wireless device including a short range radio transmitter. The short range radio transmitter is programmed to transmit instructions to the hearing assistance device by conversion of inputs to the personal wireless device into control signals for the hearing assistance device using on/off keying of the short range radio transmitter.

Abstract: A ripple-based control switching regulator includes a switch, an inductor, a capacitor, an output voltage processing unit and a control unit. Where the switch is utilized to output selectively output a first reference voltage or a second reference voltage as an output voltage according to a control signal. The inductor is coupled to the switch, and produces an inductor output voltage according to the output voltage. The capacitor is coupled to the inductor. The output voltage processing unit is used to output a processed inductor output voltage according to the output voltage and the inductor output voltage. The control unit is used to output the control signal according to at least the processed inductor output voltage.

Abstract: A PWM receiver circuit receives and demodulates pulse width modulated (PWM) data signals without requiring synchronization such that no synchronization preamble need be provided with the PWM data signal. Embodiments may consume less power since there is no need to repeatedly synchronize a PLL, counter or other circuitry to the PWM data signal. Furthermore, the PWM receiver circuit operates in view of or is “tolerant” to jitter in the frequency of the PWM signal and also to a relatively wide range of intentional variation in the frequency. Interleaved operation of parallel PWM receiver circuits are utilized in some embodiments. In one embodiment currents are integrated during low and high portions of the duty cycle of the PWM data signal and the difference in the respective voltages generated through such integration used to demodulate the PWM data signal.

Abstract: A NFC payment module and controlling method are provided. The NFC payment module is embedded in a smart device and includes an encapsulation shell, a micro controller, a radio-frequency chip, an antenna, and a security chip. The phase detection and the power amplification can be performed by the radio-frequency chip with the antenna, which is commanded by the smart device. Therefore, the modulation phase angle is adjusting until the modulation phase angel is equal to the specific phase angle of the transaction signal.

Abstract: A digitally controlled buck boost regulator includes an H-bridge circuit including a plurality of switches configured to receive an input voltage signal and generate an output voltage signal based on the input voltage signal and switching signals provided thereto. A controller generates a pulse width modulation (PWM) control value in response to a value of the output voltage signal, and a quantizer/mapper receives the PWM control value and provides a first mapping to a mapped PWM control value if the PWM control value is outside a predetermined range of PWM control values, and generates a second mapping to a mapped PWM control value if the PWM control value is within the predetermined range. A digital pulse width modulator is configured to generate switching signals based on the mapped PWM control value, and provide the generated switching signals to the H-bridge circuit.

Abstract: A liquid jet apparatus according to the present invention includes a drive waveform generator adapted to generate a drive waveform signal, a modulator adapted to execute pulse modulation on the drive waveform signal, a digital power amplifier adapted to power-amplify the modulated signal, on which the pulse modulation is executed by the modulator, with a pair of switching elements push-pull coupled with each other, a low pass filter adapted to smooth the amplified digital signal obtained by the power-amplification of the digital power amplifier, and a modulation period modification circuit adapted to modify a modulation period of the pulse modulation of the modulator based on data of the drive waveform signal.