Abstract: Digital signal transmitter/receiver equipment includes a first transmitter/receiver unit that handles digital signals and a second transmitter/receiver unit connected to the first transmitter/receiver unit via a transmission line to subject a digital signal to both a modulation/demodulation process and a frequency conversion process. The object is to suppress the signal attenuation due to a cable connecting the first transmitter/receiver unit to the second transmitter/receiver unit. Each of the first and second transmitter/receiver units includes a first frequency-shift modulation unit that sets the frequency of the digital signal transmitted between the first and second transmitter/receiver units to a value lower than an intermediate frequency at a frequency conversion processed by the second transmitter/receiver unit, and a second frequency-shift demodulation unit for demodulating the digital signal subjected to a frequency-shift modulation.

Abstract: In an FSK modulated signal receiving station a synchronization sub-system is arranged to sample the received signal and to select one sample per symbol within a detection window having a finite length, said samples being selected at predeterined instants. This produces a number of versions of the sampled signal and these different versions of the signal are then processed in parallel to determine the signal timing and the signal frequency offset.

Abstract: An M-ary FSK receiver in which a frequency down-converted signal is treated as an M-ary DPSK signal with symbol repetition coding. The output of a frequency demodulator (20) is integrated (22) over an optimally chosen time interval which is a fraction of the symbol interval to obtain N phase change estimates per symbol. These N sub-symbols are manipulated (24, 26) to obtain corresponding soft decisions which are then summed (32, 34) over a symbol period (or a substantial fraction thereof) to provide an overall soft decision for each bit comprising an M-ary symbol. These outputs may be used directly as soft decisions for forward error correction or applied to a threshold circuit to obtain hard decisions.

Abstract: A modulation system is provided with a data analyzer detecting input of a modulated data and a modulation clock signal and latching and detecting an edge of the modulated data, in response to the modulated data and the modulation clock signal, a signal controller, responsive to an output of the data analyzer, carrying out an operation process with respect to the frequency deviation data and carrying out one of a frequency deviation amplitude control operation and a frequency deviation time control operation, a digital-to-analog converter converting an output of the signal controller into an analog signal, and a transmitting unit transmitting an output of the digital-to-analog converter.

Abstract: A circuit is provided by which in the case of the transmission of a short packet signal through an FSK transmission channel having a frequency error for transmission and reception, directly from one shaped rectangular pulse of a frequency detected bit synchronization signal having a DC offset (this pulse including a bias distortion as it is) a clock signal can be generated indicating the points of time when the base-band signal passes through its center level and the point of time when it arrives its maximum or minimum value (data sampling points of time). This invention utilizes the fact that the bit synchronization signal is in the form of a sine wave because it has been band limited.

Abstract: An encoder/decoder for an emergency alert system to enable broadcasters to receive, store, re-broadcast and originate emergency alert messages. Multiple emergency alert signals are received by the encoder/decoder. A digital signal processor of the encoder/decoder scans the reception of the multiple emergency alert messages to determine the presence of an incoming emergency alert signal. The digital signal processor provides digital implementation of a frequency shift key modulation and a frequency shift key demodulation to encode and decode emergency alert messages. Additionally, the digital signal processor functions as a central processing unit to control input/output ports over a digital signal processor bus for performing all encoding and decoding functions and to control all encoding and decoding functions.

Abstract: A method for determining the best time to sample data bits of a data bit stream of a received information signal in a digital communication system includes the steps of determining the current derivative of a respective sample of the information signal, weighting the sample by a predetermined amount, determining an accumulated derivative value for the same sample number of a previous symbol of the information signal, weighting the previous accumulated derivative value by another predetermined amount, summing the two weighted values together and assigning this accumulated derivative value to the respective sample. The method further includes the step of comparing the accumulated derivative values of a predetermined number of consecutive samples to determine which sample has the greatest accumulated derivative value. The sample having the greatest accumulated derivative value substantially corresponds to the beginning of a symbol.

Abstract: A method and system for alerting a mobile terminal in a high-attenuation propagation environment within a mobile satellite communication network are disclosed herein. The method comprises receiving an incoming call directed to the mobile terminal, generating a paging signal in response to the incoming call, determining whether the mobile terminal has failed to receive the paging signal, and generating an alerting signal in response to the determination that the mobile terminal has failed to receive the paging signal.

Abstract: The present invention relates to a circuit for allocating a channel to a transmission between at least two modems that use an electric network as a medium for the transmission of a binary data flow. The circuit includes, on the receive side, a device for selecting a channel that is selected for having the best transmission level according to the energy received on several transmission channels. The transmission of the binary data flow occurs, at least at the beginning of each communication on the several channels.

Abstract: Packets of data are transmitted over a distributed communications network formed by a number of transceivers. To minimize interference by other signals, the carrier frequency of each transmission is varied compared with the last transmission by that transceiver, for example by using a linearly sliding carrier frequency which varies continuously during periods of inactivity and while transmitting. The receivers scan the band at a rate sufficient to detect a preamble carrier burst preceding each data packet. The transceivers operate asynchronously with low data rate FSK signals, using carrier frequencies between 900 and 950 MHz.

Abstract: A digital communication system is disclosed which is unique in that it modulates a sinusoidal carrier with a discrete cosine segment, a zero slope level segment, and combinations thereof. The discrete cosine segments may contain different time and amplitude values. The discrete cosine segments may be combined with each other or with zero slope level segments in order to effectively modulate the sinusoidal carrier. Rather than employing the use of filters for controlling instantaneous voltage changes, the present communication system forces the bit edges of the discrete cosine segments to occur at the zero slope points of a cosine wave, where no voltage changes occur. The communication system utilizes direct digital synthesis in order to create a carrier signal which closely represents sinusoidal carrier signal. The present communication system may be used in conjunction with various conventional methods such as phase-shift keying and amplitude-shift keying.

Abstract: A device of a vehicle for data transmission to a stationary beacon 91), which has a transceiver, comprising an on-board unit (2) with an antenna (6) for receiving a continuous signal (5), broadcast by the beacon (1), and for transmitting the received signal (5) back after modulation with a data signal (i(t)), is characterized in that the signal (7) transmitted back by the on-board unit (2) is a double-sideband signal. In that case, the on-board unit (2) can be designed as extremely simply and in the simplest case comprises a diode (9) connected to the base of the antenna (6).

Abstract: A method and a transmitter system is provided for modulating binary information on a frequency shift keying carrier in a very narrow band. Phase reversal keying is initially used to create a carrier. The transmitter of the present invention generates a carrier signal by modulating a reference signal and a control signal having two frequencies representing the binary data to be transmitted. The resulting phase reversal carrier signal is processed by high order filtering such that the output of the transmitter provides a frequency shift keyed carrier at very close frequencies. The resulting carrier signal may, at the receiver, be processed by very narrow band filtering so as to create a communication system which will use only a small part of the available spectrum.

Abstract: A wireless local area network includes a radio transmitter/receiver for transmitting and receiving in accordance with the FCC rules for the ISM band. The receiver/transmitter supports spread spectrum frequency hopping in the 2.4 GHz ISM band and can be tuned to one of e.g. 82 different frequencies spaced at 1 MHz intervals. The radio transmitter/receiver is a low cost, low power, small size unit located on a printed circuit board in a PCMCIA form factor. Third order mixers are used in combination with a switched prescaler for a low cost and compact frequency control system capable of rapid switching of the radio between transmitting and receiving functions. No special shielding is needed between the frequency control circuitry and the receiver IF circuitry.

Abstract: A transmitter which can easily suppress diffusion of a spurious signal with a simple constitution, wherein the on/off operations of the transmitting circuit and the carrier signal generating circuit are controlled by the first control signal which rises at the predetermined timing and falls at the predetermined timing, and the on/off operation of the modulator is controlled by the second control signal which gently rises at the same or later timing than the rise timing of the first control signal and gently falls at the same or earlier timing than the fall timing of the first control signal, so that a phenomenon which is similar to pulse modulation of the leaked carrier signal fc becomes hard to be generated, therefore diffusion of the spurious signal can be suppressed.

Abstract: A computing device (100) including a wireless packet data communications modem (101) used in conjunction with a computer (103) to provide untethered access to data bases and other computer users. A method is provided for controlling data transmission and reception using the wireless packet data communications modem (101) in tandem with the computer (103). Two-way communications is achieved using a small, low-cost, light-weight wireless packet data communications modem contained in a housing, integral to a computing device, or a removable housing conforming to a PCMCIA industry standard.

Abstract: A digitally-controlled SAW stabilized FSK oscillator circuit having an oscillator and a single-port SAW resonator with a predetermined circuit resonant frequency and being coupled to the oscillator for establishing a first oscillator output frequency, F.sub.SAW. A bipolar transistor has at least one predetermined shunt capacitance value, C, that is placed in electrical series with the single-port SAW resonator when the transistor is in the OFF state and a closed switch that replaces the capacitance when the transistor is in the ON state to cause the first frequency, F.sub.SAW, to be generated by the oscillator when the transistor is ON and to cause a second frequency, F.sub.2, to be generated by the oscillator when the transistor is in the OFF state.

Abstract: A signal FSK-modulated with a binary data signal has first signal portions representing first logical level data contained in the binary data signal and second signal portions representing second logical level data contained in the binary data signal. Each of the first signal portions has a first frequency and lasts for a first time period and each of the second signal portions has a second frequency and lasts for a second time period. These first and second time periods are determined such that a number of cycles of the FSK-modulated signal appearing in each of the first time periods is equal to a number of cycles of the FSK-modulated signal appearing in each of the second time periods.

Abstract: A radio link system in which a fixed radio connection is established between two radio link terminals. The radio link terminals transmit alternately at the same radio frequency. Each of the radio link terminals includes (a) a baseband modulator in the transmitting branch for generating baseband modulation signals from a digital data stream; (b) a demodulator in the receiving branch for generating a baseband data stream by demodulating baseband signals to be received; (c) a common quadrature mixer and a local oscillator for forming an RF transmitting signal directly from the baseband modulation signals to be received directly from the RF signal to be received; and (d) a timer for connecting the radio link terminal alternately to a transmitting and receiving mode. The transmitting and receiving branches are separated at the baseband.

Abstract: A FSK modulator which uses the combination of a state machine and a toggle flip-flop to generate the FSK signals. The state machine has a loop having a predetermined number of states. The number of clock cycles that the state machine takes to traverse the loop depends on the state or level of the signal at the input to the modulator. The flip-flop converts the state machine output signal to a signal having a rectangular waveform.

Abstract: A system for the transmission of data, and a modem for use in such a system, utilize variable shift keying (VSK), in which a data signal is modulated to form a continuous phase signal in which successive symbols are represented by successive signal segments of constant phase angle, typically 180.degree. or one half cycle, different symbols being distinguished by the segments being of different duration, i.e. at different frequencies. The ratios of the frequencies may be chosen to facilitate signal modulation and demodulation, and to control the frequency spectrum of the transmitted signal. Each symbol may represent one or more bits of the data signal. The lengths of half cycles used to represent different symbols may be adjusted by introducing flat peaks into the half cycles whilst maintaining uniform the profile of their flanks so as to facilitate generation and reduce zero crossing detection jitter during reception.

Abstract: Continuous phase modulated (CPM) signals, such as quaternary CPFSK signals, are filtered to limit their bandwidth while simultaneously minimizing the amount of amplitude modulation and intersymbol interference introduced by this filtering process. By designing a modulation filter such as a finite impulse response (FIR) filter to add only a nominal, controlled amount of amplitude modulation, high efficiency, nonlinear power amplifiers may be employed to transmit the filtered CPFSK signals. Although the filter adds a small amount of amplitude modulation and intersymbol interference, digital signal processor-based receivers satisfactorily demodulate this type of signal using sequence estimation algorithms such as the Viterbi algorithm. Thus, the filtering of CPM signals permits narrowing of the transmitted signal spectrum while managing the intersymbol interference resulting from the controlled amount of amplitude modulation added by filtering.

Abstract: A first AFC apparatus receives and detects I and Q signals from a received first FSK signal with a local osc signal; demodulates the I and Q signals; F/V-converts I or/and Q signals into a voltage; compares it with a reference; and detects a frequency deviation direction of the local osc signal from the carrier signal according to the results of comparing and the demodulating. The local osc frequency is controlled by a given amount according to the result of the frequency deviation direction detection. A second AFC apparatus receives and detects I and Q signals using a first osc signal; FSK-modulates the I and Q signals with a second local osc signal having a lower frequency than the first local osc signal; and compares the frequency of the second FSK signal and the second local osc signal to supply a demodulation result. A frequency control for the first local osc signal is obtained by an averaging circuit averaging the modulation result.

Abstract: A method and apparatus for transmitting binary data trains of 0 and 1 data bits, or combinations of these data bits over a communications network. The data bits are converted into pulses whose polarity changes from pulse to pulse, so as to enable an optimal exploitation of the transmission channel with a low error rate. The pulses generated by an apparatus of the present invention have a signal shape that produces a minimum inter-symbol interference. Processing and evaluation of the transmitted pulses are performed by a processor, so that a minimal error rate is attainable even under unfavorable transmission conditions.

Abstract: A microcomputer includes therein an operation control part which can be operated when a clock signal is applied thereto by an oscillation circuit. If the operation control part reads out an identification code from an EEPROM, then it switches a control signal to be given to a switching element in accordance with the levels of the respective bits. When the control signal is off, the oscillation frequency of the oscillation circuit is F1. On the other hand, if the control signal is turned on, then one terminal of a capacitor is grounded to thereby switch the oscillation frequency over to F2. The clock signal is divided by a frequency dividing circuit before it is output. The frequency of the output signal after being divided becomes f1 or f2 in accordance with the above switching and the output signal is transmitted in the form of a frequency modulation signal.

Abstract: A communication system (100) encodes and decodes information utilizing at least four modulation levels for transmitting the information as symbols representing symbol bits in symbol bit positions. At least one of the symbol bit positions exhibits an error rate higher than that of another of the positions. A processor (204) encodes (702) the information into an even number of code words and transmits the code words as an interleaved data stream. The processor (204) rearranges (706, 708) the transmission order of the code word bits in a predetermined way to form a modified transmission order such that the code words are transmitted (710) with substantially equal error rates. A receiver (110) receives and demodulates (712) the interleaved data stream to derive the code word bits, and then reorders (714, 716) the code word bits to undo bit modifications resulting from the modified transmission order, thereby restoring the code words. The receiver then decodes the code words to recover the information.

Abstract: Data are transmitted using multiple carriers modulated by quadrature amplitude modulation. In general, the carriers carry different numbers of bits, to exploit the fact that the properties of a transmission path are more favorable to carriers at some frequencies than to those at others. The bit allocation process is made closer to optimum by permitting allocation of a non-integer number of bits to a carrier. Input bits are grouped for several carriers and this binary representation is converted to a number representation in which the base of each digit corresponds to the number of points in the QAM constellation for a respective carrier (or to this number divided by a power of two).

Abstract: A protocol for communication between devices connected via a bus having three handshake lines and at least one data line. A first device controls two of the three handshake lines, and a second device controls the third. The first device mixes toggling of the first and second handshake lines in a pattern which identifies a type of information packet. The second device polls the first and second handshake lines, and from the toggling pattern identifies the packet type. Once identified, the packet is transmitted according to a predefined format for the type. Typically, transmission of information is completed asynchronously using the handshake lines to carry request and acknowledge signals. In one embodiment, the protocol is implemented in a virtual reality system having a video game console as a first device and a head mounted display as the second device.

Abstract: An FSK detector circuit and method which may be utilized for the demodulation of a digital data signal from a modulated sine wave carrier signal. A simple, low parts count FSK detector is disclosed which is readily implemented as an integrated circuit for the detection of a digital data signal in wireless applications without the use of an associated phase locked loop or other frequency detection circuitry.

Abstract: A signal modulated by frequency-shift keying is input to a detector consisting of an instantaneous phase detection circuit that detects the instantaneous phase of the input signal, a differentiating circuit that differentiates the instantaneous phase to obtain the instantaneous frequency, and a baseband processing circuit that recovers clock and data signals from the instantaneous frequency. To detect the instantaneous phase, the instantaneous phase detection circuit compares the logic levels of the input signal and a clock signal, and filters the resulting bit stream with a digital low-pass filter. The detector consists entirely of digital circuits that are well suited for large-scale integration.

Abstract: A frequency shift keyed receiver (214, 220, 218) estimates a carrier frequency and demodulates (1020) a symbol value associated with the carrier frequency. During symbol intervals, the receiver (214, 220, 218) receives a radio signal including symbol values (502-518) corresponding to predetermined frequency offsets (604, 606) from a carrier frequency. The radio signal is digitized (1008) during a symbol interval, and then converted (1010) into a frequency domain signal. The frequency domain signal is stored (1012), and additional symbol intervals are converted to obtain a plurality of frequency domain signals, which are processed to generate (1016) a composite frequency domain signal (702, 704). A windowing function (706) of predetermined shape is convolved (1018) with the composite frequency domain signal (702, 704) to locate a frequency distribution therein that corresponds to the predetermined frequency offsets (604, 606).

Abstract: An FSK modulator including an amplifier for oscillation has a surface acoustic wave resonator connected in series with a switching circuit formed without a variable-capacity diode but including a semiconductor switch and one or more fixed-capacity capacitors. When an input signal is received, the switch causes a capacitor or combination of capacitors to become connected in series with the surface acoustic wave resonator, providing oscillations with two frequencies to effect FSK modulation.

Abstract: Applicant's invention includes an apparatus and associated method for transmitting information at a high rate using an undermodulated frequency shift keyed signal. The transmission rate is independent of the data content and the system requires no zero crossing detectors. The demodulator combines non-linear processing circuitry with a conventional demodulator.

Abstract: The spectral encoding-decoding system and method are for encoding a sequence of N data bits where N is a predetermined integer, into an information signal to be transmitted on a communication medium, and for decoding the information signal transmitted on the communication signal into an estimated sequence of N data bits. The system comprises an encoder and a decoder. The encoder receives the sequence of N data bits, encodes the sequence into the information signal, and emits the information on the communication medium. The decoder receives the information signal transmitted on the communication medium, decodes the information signal and transmits the estimated sequence of N data bits. The method corresponds to the operations performed by the system.

Abstract: The disclosure relates to methods and apparatus for separating radio signals arriving from different directions and for multiplexing signals intended for receivers dispersed in different directions. The methods and apparatus employ a plurality of antennas with spacing and individual feedline characteristics designed so that a modulation is imparted to each of a plurality of incident signals, for receiving antennas, and radiated signals for transmitting antennas, the modulation level of each signal being determined by the direction of propagation of the signal and by the spacing between antenna pairs. Accordingly, the orientation of lines connecting pairs of antennas as well as the spacing between antennas are set to inhibit the modulation in a particular direction, or to strip a particular modulation off a signal incident from a selected direction.

Abstract: A data transmission system includes a source of a data signal and a modulator, responsive to the data signal, producing a first modulated signal representing the data signal and a second modulated signal representing a signal 180 out-of-phase with the data signal. The first and second modulated signals are transported via a transmission channel. A first demodulator demodulates the transported first modulated signal and a second demodulator demodulates the transported second modulated signal. A subtractor, responsive to the first and second demodulators, produces a signal representative of the data signal.

Abstract: An FSK data receiving system is provided which is capable of constituting a direct-conversion receiver suitable for realizing an integrated circuit, is capable of decoding in a wide receiving band width, and is capable of realizing a small-sized and less-electric power consumption data receiving. An FSK-modulated local oscillator signal 3 is applied to a local oscillator 2, and there is provided a decode circuit 15 which obtains the decode signal 14 by judging whether the FSK-modulated frequency deviation of the carrier wave signal 1 is a positive deviation or a negative deviation on the basis of a comparison result of a voltage change in a frequency-voltage conversion circuit 16 for a base-band signal 8; i.e. the output signal of a frequency mixer 6.

Abstract: A DTMF signal generating circuit for producing output of a selection signal having a frequency corresponding to a signal entered from push buttons. A high frequency oscillation signal output from an oscillatory circuit are delivered to both a first frequency dividing circuit for dividing high frequency signals by a first dividing ratio and a second frequency dividing circuit for dividing high frequency signals by a second dividing ratio, thereby producing two kinds of divided signals each of which has its own predetermined frequency. A fractional frequency division is then accomplished by switching from an output of a first frequency dividing circuit to an output of a second frequency dividing circuit at a predetermined timing. The signals output form the switch are then counted by a ROM address counter, producing an output of an address value signal.