Abstract: Amplitude noise, phase noise, and interference can be mitigated in 5G and 6G by exploiting advantages of two different modulation schemes. A message may be modulated according to a first modulation scheme, such as multiplexed amplitude and phase modulation, and then received (including noise and interference) according to a second modulation scheme, such as QAM (quadrature amplitude modulation). In addition, a compact demodulation reference can be transmitted wherein a first resource element exhibits a particular phase along with a maximum and a minimum branch amplitude, and a second resource element is blank. The receiver calibrates the amplitude levels according to the demodulation reference, calculates the phase noise according to a ratio of the two branch amplitudes, and measures the interference according to the unpowered (blank) second resource element. The receiver can then demodulate the message according to the second modulation scheme, while correcting for phase noise, fading, and interference.

Abstract: An automotive radar system includes multiple radar antennas and a radar front end chip. The front end chip includes a plurality of phase rotators coupled to a local oscillator, wherein each phase rotator of the plurality of phase rotators is coupled to multiple digital phase modulators; a plurality of switches that couple selectable ones of the multiple digital phase modulators to respective amplifiers, each amplifier coupled to a respective antenna output; and a controller which provides digital control signals to the plurality of phase rotators, the multiple digital phase modulators, and the plurality of switches to synthesize transmit signals for each of the multiple radar antennas.

Abstract: An automotive radar system includes multiple radar antennas and a radar front end chip. The front end chip includes a plurality of phase rotators coupled to a local oscillator, wherein each phase rotator of the plurality of phase rotators is coupled to multiple digital phase modulators; a plurality of switches that couple selectable ones of the multiple digital phase modulators to respective amplifiers, each amplifier coupled to a respective antenna output; and a controller which provides digital control signals to the plurality of phase rotators, the multiple digital phase modulators, and the plurality of switches to synthesize transmit signals for each of the multiple radar antennas.

Abstract: Embodiments of the present disclosure relate to a method and device for interleaving data in a wireless communication system.

Abstract: A method of processing a received message includes: receiving a message through a receiving terminal to obtain the received message; for each bit in the received message, determining a bit state of the bit according to a bit value of the bit; selectively changing the bit state of each bit according to at least a weighting vector and a current value of a flipping threshold, wherein the bit state has a plurality of change ranges; selectively flipping the bit according to the bit state; and adjusting the current value of the flipping threshold according to a number of times the bit has been flipped within a period of time, whether when the number of times the bit has been flipped within the period of time exceeds an upper limit, the flipping threshold adjustment unit increases the current value of the flipping threshold.

Abstract: An apparatus for processing data symbols in a multi-carrier transmitter, includes a transmit pulse shaper and a transmit sub-band filter. The transmit pulse shaper is adapted to filter a plurality of data pulses with respective transmit pulse shaping filters. Each of the data pulses is associated with a respective carrier of the multi-carrier communication system. The transmit sub-band filter is adapted to perform sub-band filtering of the pulse-shaped data pulses. The sub-band filter and at least one of the transmit pulse shaping filters are correlated. This correlation may be achieved by jointly designing the sub-band filter and the pulse shaping filter(s).

Abstract: In the conventional semiconductor device, the power consumed in ternary serial data communication cannot be reduced. According to one embodiment, the semiconductor device has a the transmission processing circuit 10 that converts the binary representation of binary Transmitted data Dbin_TX to a ternary transmitted data Dter_TX represented as a ternary number and generates a transmitted signal corresponding to this ternary Transmitted data Dter_TX, wherein the transmission processing circuit 10 verifies the frequency of occurrence of the values included in the ternary transmitted data Dter_TX, assigns the signal change pattern with the highest state transition to the transmitted signal logical level corresponding to the lowest occurrence value, and generates a transmitted signal.

Abstract: A phase detector using nonlinearities to distort and compress waveforms of the reference and the unknown sources. This waveform distortion creates a region of phase in which the slew rate is greater than that of the input sinusoid, enabling a larger phase detector constant.

Abstract: An angle shift compensation system and method for controlling a sinusoidally driven motor to achieve efficient motion and reduced noise. The motor controller uses the angle shift compensation method to monitor the angle shift between a sinusoidal motor control signal configured to drive the motor and a feedback signal received from at least one position detector indicating the position of the motor rotor with respect to the motor stator. In response, the motor controller proportionally adjusts the amplitude of the motor control signal based on the monitored angle shift to maintain the angle shift substantially equal to an angle shift threshold.

Abstract: A motor calibration system and method for a motor having a rotor, a stator, and at least one phase. The system further comprises a controller and a position detector adapted to detect a position of the rotor with respect to the stator. Wherein the controller is adapted to perform a calibration sequence to calibrate to motor by driving at least one motor phase with a motor control signal at a predetermined maximum amplitude value in a first direction with substantially no load applied on the motor, receiving a feedback signal from the at least one position detector, and determining a first calibration angle shift by measuring a difference between at least the motor control signal and the feedback signal of the at least one motor phase. The controller accounts for the first calibration angle shift when driving the motor in the first direction during normal operation.

Abstract: An angle shift compensation system and method for controlling a sinusoidally driven motor to achieve efficient motion and reduced noise. The motor controller uses the angle shift compensation method to monitor the angle shift between a sinusoidal motor control signal configured to drive the motor and a feedback signal received from at least one position detector indicating the position of the motor rotor with respect to the motor stator. In response, the motor controller proportionally adjusts the amplitude of the motor control signal based on the monitored angle shift to maintain the angle shift substantially equal to an angle shift threshold.

Abstract: A semiconductor device may include a syndrome generation circuit and a failure detection circuit. The syndrome generation circuit may generate a syndrome signal corresponding to a pattern of an output data signal. The failure detection circuit may detect the syndrome signal and sequentially store the syndrome signal to generate a first syndrome signal and a second syndrome signal if an error is detected from the syndrome signal. The failure detection circuit may generate a failure detection signal which is enabled if a logic level combination of the first syndrome signal is different from a logic level combination of the second syndrome signal.

Abstract: Example communication systems and methods are described. In one implementation, a method receives a first chaotic sequence of a first temporal length, and a second chaotic sequence of a second temporal length. The method also receives a data symbol for communication to a destination. Based on the data symbol, the second chaotic sequence is temporally shifted and combined with the first chaotic sequence to generate a composite chaotic sequence. The first chaotic sequence functions as a reference chaotic sequence while the second chaotic sequence functions as a data-carrying auxiliary chaotic sequence.

Abstract: A device for locating a remote RFID transmitter in an environment providing separate paths of propagation of a wirelessly transmitted ultra-wide band signal. The receiver of the device has a module for estimating the impulse response of the plurality of paths of the first channel defined by a first antenna and a module for estimating the impulse response of the plurality of paths of the second channel defined by the second antenna, a module for calculating a plurality of argument differences between each component of the impulse response and each component of the impulse response for the plurality of paths respectively. The device further comprises a module for converting the plurality of argument differences into a plurality of arrival angles of the plurality of paths, a module for determining a location of the transmitter from the plurality of arrival angles.

Abstract: A method for transmitting data over a voice channel by transcoding a bit of the data stream into two bits, and converting each of such two bits into a value of a parameter of a curve of a sound frequency that can be carried on the voice channel. At the receiving end of the voice channel, the values of the parameters of the curve are reconverted into bits, and the pairs of bits are transcoded back into the bit of the data stream.

Abstract: A receiver may be dynamically configurable, during run-time, into a plurality of modes of operation. In a first mode of operation the receiver may demodulate received signals having relative low inter-symbol correlation using a near zero ISI filter and symbol slicing. In a second mode of operation the receiver may demodulate received signals having relatively high inter-symbol correlation using an input filter configured to achieve a desired total partial response and a sequence estimation algorithm.

Abstract: A QC-LDPC decoding system employing a trapping set look-up table is provided. The QC-LDPC decoding system includes an iterative decoder that utilizes a message-passing algorithm to decode a received codeword. If the iterative decoder fails to produce a valid codeword, additional processing is performed to decode the received codeword. The additional processing includes the steps of computing the syndrome pattern of the received codeword, searching the look-up table for a trapping set class that is responsible for the iterative decoder's failure, retrieving from the look-up table a syndrome pattern and an error pattern of a member of the responsible trapping set class, and calculating the error pattern of the received codeword based on its syndrome pattern and the information retrieved from the look-up table. The received codeword is then corrected based on its error pattern.

Abstract: A system and method for frequency-selective demodulation is presented. An input signal is received that is modulated by frequency shift keying (FSK) and encodes data at a first and second frequency. The input signal is supplied to a plurality of estimators that include a first estimator configured to detect a first signal at the first frequency, a second estimator configured to detect a second signal at the second frequency, a third estimator configured to detect a third signal at a third frequency, and a fourth estimator configured to detect a fourth signal at a fourth frequency. An output is generated indicating receipt of the data encoded at the first frequency or the second frequency based upon outputs of the first estimator, the second estimator, the third estimator, and the fourth estimator.

Abstract: In determining an angle for a phase modulation scheme, a key is generated from a prescribed set of bits contained in a symbol. The symbols have an in-phase (I) data word and a quadrature phase (Q) data word that identify coordinates of the symbols in a complex number plane. An angle is retrieved from a memory table from a storage location identified by the key. Each angle in the memory table is established in accordance with constraints under which the memory table was populated so as to be mapped to a phase angle identifying other coordinates in the complex number plane that are within a specified neighborhood about the coordinates of each of the symbols. A signal is generated to convey the symbols as phase differentials at each sample time between a reference phase and the phase angle.

Abstract: A mixer for the elimination of harmonic mixing in signal transmission is presented. The mixer incorporates a mixing unit and a modulation output unit. The mixing unit receives an input signal and a modulated signal, and outputs an output signal after signal mixing. The modulation output unit is for the generation of modulated signals, which are usually pulse-width modulated. The modulation output unit includes a delta sigma modulator and a digital domain code generator. The delta sigma modulator outputs the modulated signal responding to the received oscillation signal and digital domain code, the digital domain code generator generates the digital domain code in order to provide digital domain sine wave code for the use of the delta sigma modulator. The oscillation signal may be a signal of constant hi-frequency, or a signal that has a frequency larger or equal to that of the input signal by an integer factor.

Abstract: A non-overlapping clock generator circuit supplies clock signals to a stage of a pipelined ADC, which includes parallel switched capacitor circuitry. The non-overlapping clock generator circuit includes: a first trigger generation circuit that generates first and second trigger signals; a second trigger generation circuit that generates third and fourth trigger signals; a first clock generation branch that receives the first, second and fourth trigger signals and generates first sampling cycle and delayed sampling cycle clock signals; a second clock generation branch that receives the first, second and third trigger signals and generates second sampling cycle and delayed sampling cycle clock signals; a third clock generation branch that receives the second trigger signal and generates first gain cycle and delayed gain cycle clock signals; and a fourth clock generation branch that receives the first trigger signal and generates second gain cycle and delayed gain cycle clock signals.

Abstract: The present invention discloses a method and apparatus for wide dynamic range phase conversion. In one embodiment, inphase and quadrature signal components of a complex input signal are collapsed into a single quadrant to produce a first signal representation. A scaling operation is subsequently performed on the first signal representation to produce a second signal representation. Lastly, the second signal representation is converted into the phase domain.

Abstract: A method and device for graphically representing the I and/or Q components of digitally modulated high frequency signal are described, in which the I or Q components measured in a temporally successive manner are graphically represented side-by-side on a display device.

Abstract: Disclosed is a bits-to-symbol mapping method of 4+12+16 amplitude phase shift keying (APSK) having excellent performance against the non-linearity of a high power amplifier. According to the present invention A bits-to-symbol mapping method of 4+12+16 APSK modulation, comprising: representing 32 symbols of the 4+12+16 APSK modulation by a polar coordinate and arranging the 32 symbols by a size of ? while giving priority to a symbol having a small signal size when the size of ? of two or more symbols are same; grouping the arranged 32 symbols into 4 groups according to quadrant regions where the symbols are located; and allocating bits so that the same bits are allocated to the symbols belonging to the same region for each region with respect to each of the first to fifth bits of the symbols grouped into four regions.

Abstract: There are provided a transmission and reception device having a function for correcting a data error in a communication path. In the transmission device, a redundant bit addition unit adds a redundant bit to each data bit which has been divided by one bit by a division unit; and an interleaver performs interleave. The transmission device transmits a signal which has been subjected to FM modulation by an FM modulation unit. In the reception device, a symbol decision unit performs a symbol decision at a Nyquist point for a signal which has been FM-demodulated by an FM demodulation unit; a bit conversion unit performs bit conversion according to the result of symbol decision; and a frame recovery unit deletes the redundant bit added by the redundant bit addition unit of the transmission device, from the bit string de-interleaved by a de-interleaver. Thus, it is possible to surely perform an error correction with a simple configuration even when the communication state is not in a preferable environment.

Abstract: There are provided a transmission and reception device having a function for correcting a data error in a communication path. In the transmission device, a redundant bit addition unit adds a redundant bit to each data bit which has been divided by one bit by a division unit; and an interleaver performs interleave. The transmission device transmits a signal which has been subjected to FM modulation by an FM modulation unit. In the reception device, a symbol decision unit performs a symbol decision at a Nyquist point for a signal which has been FM-demodulated by an FM demodulation unit; a bit conversion unit performs bit conversion according to the result of symbol decision; and a frame recovery unit deletes the redundant bit added by the redundant bit addition unit of the transmission device, from the bit string de-interleaved by a de-interleaver. Thus, it is possible to surely perform an error correction with a simple configuration even when the communication state is not in a preferable environment.

Abstract: Method and mixer using the method for mixing a complex digital input vector with an oscillator reference signal based on a separation of the mixing process in mainly two processing steps, to with a first step in which a set of n real part values Vi, is derived from said complex digital input vector in which n is an integer larger than 1 and in which each real part value Vi is proportional to the real part of the digital input vector when being rotated over predetermined phase angles ?i=?0+i*??, respectively, for a constant ?0, ?? corresponding to either 2?/n or ?2?/n, with integer i varying between 0 and n?1 and a second step, in which said n real part values and Vi are each consecutively selected to be coupled to a load.

Abstract: A method and apparatus by which ATSC-receiver-compatible digital TV signals may be generated without most of the discrete and/or high-complexity components required by the ATSC specification, through the use of a precomputation of digital filter coefficients that consolidates multiple functions into a single step, and through the derivation of multiple required carrier frequencies using a single oscillator circuit. The resulting design meets all requirements of the ATSC specification, reducing significantly the cost of the necessary signal-processing functions, and in a manner compatible with the VLSI (very-large-scale-integrated) circuit technologies of the field.

Abstract: A signal receiving device is provided which can prevent the imbalance occurring between in-phase and quadrature signals. A polarity of a local oscillator output signal to be outputted from a local oscillator 13 is switched by a polarity switching unit 14 in a time division way. Each of signals outputted from the polarity switching unit 14 is frequency divided by a frequency divider 16. The frequency-divided local oscillation signal is supplied to a mixer 34. Frequency conversion of a receiving signal is performed by the mixer 34 which receives the signal and local oscillation signal to demodulate received data.

Abstract: Various embodiments are disclosed relating to techniques to transmit data rate control signals for multicarrier wireless systems. According to an example embodiment, a wireless apparatus may be adapted to transmit at least a first data rate control (DRC) value via an in-phase channel and at least a second DRC value via a Quadrature-phase channel. The first DRC value may be associated with a first forward link carrier and the second DRC value may be associated with a second forward link carrier. In this manner, DRC values may be transmitted over both the I and Q channels, for example.

Abstract: A method and apparatus for providing an asymmetrical backwards compatible communications signal that is capable of being decoded by QPSK and OQPSK receivers as well as PSK and QAM receivers is provided. The invention comprises a timing error accumulator coupled to a first bit stream. The first bit stream includes content that is common to the QPSK/OQPSK receiver and to the PSK/QAM receiver. A phase error accumulator is coupled to a second bit stream and adjusts the phase of symbols in the second bit stream. A phase and timing error compensator is coupled to the phase error accumulator and the timing error accumulator and adjusts the first and second bit streams received from the phase error accumulator and the timing error accumulator in order to reduce timing and phase errors. A higher order modulator coupled to the phase- and timing error compensator is also provided. The higher order modulator processes the first and second bit streams to provide the asymmetrical backwards compatible signal.

Abstract: A differential receiver which provides for estimation and tracking of frequency offset, together with compensation for the frequency offset. Estimation and tracking of the frequency offset is undertaken in the phase domain, which reduces computational complexity and allows frequency offset estimation and tracking to be accomplished by sharing already-existing components in the receiver. Compensation for the frequency offset can be performed either in the time domain, before differential detection, or in the phase domain, after demodulation, or can be made programmably selectable, for flexibility.

Abstract: User specific modulation-symbol scrambling is implemented for various uplink segments, e.g., uplink traffic acknowledgement channel (ULTACH), uplink state request channel (ULSRCH), and uplink dedicated control channel (ULDCCH) segments. A wireless terminal is assigned a wireless terminal scrambling identifier. A set of ordered input modulation symbols are determined for an uplink dedicated segment to which user specific scrambling is to be applied. One bit of the assigned wireless terminal scrambling identifier is associated with each of the ordered input modulation symbols of a segment in accordance with a predetermined mapping. For each input modulation symbol a scrambling operation, e.g., a phase rotation of the input modulation symbol, is performed as a function of the associated user specific scrambling identifier bit to obtain a corresponding output modulation symbol. A value of (0,1) for a scrambling ID bit is associated with a (first, second) amount of phase rotation, e.g.

Abstract: A method for performing burst mapping on transmission data by a transmitter in a mobile communication system using a 16-ary Quadrature Amplitude Modulation (16-QAM) modulation scheme is disclosed. The burst mapping method includes generating control information bits and user data bits by encoding input control information and user data; dividing the control information bits and user data bits into more than two bursts; and arranging a Training Sequence Code (TSC) in a center of each burst, placing the coded control information bits in positions adjacent to the TSC, and swapping the user data bits with bits mapped to higher-reliability positions among the control information bits.

Abstract: A method and apparatus for processing a radio frequency (RF) signal is provided. The method includes generating a periodic square wave local oscillator (LO) signal of a first phase, a periodic square wave LO signal of a second phase, and a chopping signal. The method further includes coding the periodic square wave LO signal of the first phase and the periodic square wave LO signal of the second phase synchronously with the chopping signal to generate a first set of synchronized signals (116, 118) and a second set of synchronized signals (120, 122), respectively. A phase difference between the first phase and the second phase is a predefined value. The RF signal is processed with the first set of synchronized signals (116, 118) and the second set of synchronized signals (120, 122) to obtain an in-phase intermediate frequency (IF) signal (132) and a quadrature-phase IF signal (142), respectively.

Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. A synthesizer provides 4/3 the desired frequency fRF. This frequency is divided by two to obtain in-phase and quadrature square waves at ? fRF. The in-phase signal is divided by two again to obtain in-phase and quadrature square waves at ? fRF. The signals are then logically combined using XOR operations to obtain I and Q branch signals containing spectral spurs. Since the spurs are located in non-disturbing bands, they can be filtered out resulting in the desired output signal.

Abstract: The method and system are disclosed for automatic feedback control of integrated optical quadrature modulator for generation of optical quaternary phase-shift-keyed signal in coherent optical communications. The method comprises the steps of detecting at least a part of an output optical signal from the QPSK modulator, extracting of a particular portion of the output signal in frequency domain, and processing the signal in frequency domain to optimize the transmission of an optical link. The system and method of optical communications in fiber or free space are disclosed that implement the quadrature data modulator with automatic feedback control.

Abstract: A novel and useful apparatus for and method of nonlinear adaptive phase domain equalization for multilevel phase coded demodulators. The invention improves the immunity of phase-modulated signals (PSK) to intersymbol interference (ISI) such as caused by transmitter or receiver impairments, frequency selective channel response filtering, timing offset or carrier frequency offset. The invention uses phase domain signals (r, ?) rather than the classical Cartesian quadrature components (I, Q) and employs a nonlinear adaptive equalizer on the phase domain signal. This results in significantly improved ISI performance which simplifies the design of a digital receiver.

Abstract: A receiver includes a signal input for receiving a differentially-encoded quadrature phase-shift keyed (DEQPSK) communication signal. A demodulator performs bit decisions on a received coherent symbol and bit decisions on a received differential symbol. A processor is operative with the demodulator and scales a soft decision by a factor from 0 to 1 when the results of the bit decisions on the received coherent branch and differential branch are different.

Abstract: An encoding and/or decoding communication system comprises a framer interface, an encoder, a multiplexer, an output driver, and a clock multiplier unit (CMU). The encoder includes an input latch circuitry stage; an output latch circuitry stage; an intermediate latch circuitry stage interposed between the input latch circuitry stage and the output latch circuitry stage, the intermediate latch circuitry stage coupled to the input latch circuitry stage and the output latch circuitry stage; a plurality of encoding logic circuitry stages interposed between the input latch circuitry stage and the output latch circuitry stage, a last one of the plurality of encoding logic circuitry stages placed adjacent to the output latch circuitry stage and coupled to the output latch circuitry stage; and a feedback between the output latch circuitry stage and the last one of the plurality of encoding logic circuitry stages.

Abstract: Method of estimating Doppler spread comprising the steps of estimating a de-biased value according to the relation Formula (I), is a preliminary Doppler spread squared, based on measured parameters, and K2 is a constant.

Abstract: An apparatus including a transmit circuit, a receive circuit, and a control circuit. The control circuit may be configured to present a plurality of transmit data lanes in response to (i) a plurality of transmit data sources and (ii) a plurality of first skew control signals. The receive circuit may be configured to generate a plurality of receive data lanes in response to (i) the plurality of transmit data lanes and (ii) a plurality of second skew control signals. The control circuit may be configured to generate the first skew control signals and the second skew control signals in response to an alignment of the plurality of receive data lanes. The control circuit may adjust a timing of the receive data lanes and the transmit data lanes to achieve arrival of the receive data lanes across a transmission medium within a skew parameter.

Abstract: At the transmitter side, carrier waves are modulated according to an input signal for producing relevant signal points in a signal space diagram. The input signal is divided into, two, first and second, data streams. The signal points are divided into signal point groups to which data of the first data stream are assigned. Also, data of the second data stream are assigned to the signal points of each signal point group. A difference in the transmission error rate between first and second data streams is developed by shifting the signal points to other positions in the space diagram. At the receiver side, the first and/or second data streams can be reconstructed from a received signal. In TV broadcast service, a TV signal is divided by a transmitter into, low and high, frequency band components which are designated as a first and a second data stream respectively.

Abstract: A channel structure that can efficiently transmit more data control bits, e.g., required by future wireless communication systems, yet achieve sufficient detection and false alarm performance uses tail-biting convolutional coding and Cyclical Redundancy Check (CRC). In certain implementations, symbol repetition, interleaving and/or scrambling can also be included. Also, depending on the implementation, modulation schemes such as Bi-Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK) or Quadrature Amplitude Modulation (QAM) can be used in conjunction with the other coding techniques.

Abstract: An apparatus and method for improving a symbol error rate of an M-ary phase shift keying (M-PSK) system having a quadrature error are provided. The apparatus includes: a conversion parameter detector that detects a conversion parameter and converts a symbol decision region using the quadrature error and at least one pair of first received symbols; and a converter & determiner converting a pair of second received symbols using the detected conversion parameter, and determining a transmission symbol according to a symbol of the converted pair of second received symbols. An increase in a symbol error rate due to the quadrature error can be prevented and the quadrature error can be easily estimated.

Abstract: There is provided a jitter injection apparatus that generates an output signal having an injected jitter. The jitter injection apparatus includes a first oscillator that generates a first periodic signal, a second oscillator that generates a second periodic signal having a period different from that of the first periodic signal, and a switching section that switches which of the first periodic signal and the second periodic signal is output at every predetermined timing and outputs the switched periodic signal as the output signal.

Abstract: A differential receiver which provides for estimation and tracking of frequency offset, together with compensation for the frequency offset. Estimation and tracking of the frequency offset is undertaken in the phase domain, which reduces computational complexity and allows frequency offset estimation and tracking to be accomplished by sharing already-existing components in the receiver. Compensation for the frequency offset can be performed either in the time domain, before differential detection, or in the phase domain, after demodulation, or can be made programmably selectable, for flexibility.

Abstract: According to an embodiment of the invention, a method and system is disclosed for determining log-likelihood ratios for a coded set of individual bits (40) of a quadrature amplitude modulation (QAM) codeword. In the method at most two constant values (33,35) may be determined to perform a set of predetermined functions, the output of each of function is based on the constant values and at least one received component corresponding to the codeword, to determine log-likelihood ratios (37) for each individual bit of the set of individual bits of the codeword. The QAM codeword may correspond to at least a portion of a signal of a wireless device, such as a mobile third-generation device operating according to a Wideband Code-Division Multiple Access (WCDMA) standard.

Abstract: A system for combining a plurality of signals of various phases having a wide frequency range includes a signal transmuter configured to receive a plurality of input signals of different phases. The signal transmuter is also configured to generate at least one output signal based on one or more of the input signals. The system also includes at least one switch configured to receive a control signal and operable to selectively couple at least one associated capacitor to the at least one output signal. The coupling is such that the capacitor is coupled to the at least one output signal when the switch is closed. The control signal is set to substantially reduce the saturation of the at least one output signal.

Abstract: A waveform-adaptive ultra-wideband (UWB) transmitter and noise-tracking UWB receiver for use in communications, object detection and radar applications. In one embodiment, the output of an oscillator is gated by a low-level impulse generator either directly or through an optional filter. In a special case of that embodiment wherein the oscillator is zero frequency and outputs a DC bias, a low-level impulse generator impulse-excites a bandpass filter to produce an UWB signal having an adjustable center frequency and desired bandwidth based on a characteristic of the filter. In another embodiment, the low-level impulse signal is approximated by a time-gated continuous-wave oscillator to produce an extremely wide bandwidth pulse with deterministic center frequency and bandwidth characteristics. The low-level impulse signal can be generated digitally. The UWB signal may be modulated to carry data, or may be used in object detection or ranging applications.