Abstract: A mechanism for retrieval of carrier frequency and carrier phase in a received modulated carrier waveform. Retrieval of carrier frequency and carrier phase can be implemented in an analog electrical circuit, using a field programmable gate array (FPGA), or in computer code. Independent of the implementation, the mechanism performs frequency and primary phase recovery by forcing transforms of a pilot tone in the upper and lower sidebands to the same frequency using a feedback loop. The difference-in-magnitudes of the channelized pilot are used by a phase lock loop to perform secondary phase recovery in a manner that also resolves phase sign ambiguity. Benefits of this mechanism include improved phase lock loop tracking performance and a reduction of noise in the data demodulated from the received carrier waveform.

Abstract: Described herein are systems and methods for accurately estimating and removing a carrier frequency offset. One exemplary embodiment relates to a system comprising a frequency offset detection circuit detecting a carrier frequency offset in an optical signal, and a frequency testing circuit calculating an estimated frequency offset value of the carrier frequency offset, wherein the frequency testing circuit removes a carrier phase based on the estimated frequency offset value and recovers the optical signal. Another exemplary embodiment relates to a method comprising detecting a carrier frequency offset in an optical signal, calculating an estimated frequency offset value of the carrier frequency offset, removing a carrier phase based on the estimated frequency offset value, and recovering the optical signal.

Abstract: A carrier frequency offset compensation method for a communication system is provided. The method includes: mixing, filtering and interpolating an input signal according to a mixing parameter, a first filtering parameter and a first interpolation parameter, respectively, to generate a processed result; calculating a carrier frequency offset estimation value of the input signal according to the processed result; adjusting the mixing parameter according to the carrier frequency offset estimation value; and mixing, filtering and interpolating the input signal according to the adjusted mixing parameter, a second filtering parameter and a second interpolation parameter, respectively. The first interpolation parameter is associated with a cut-off frequency corresponding to the first filtering parameter.

Abstract: A phase offset compensator for compensating a phase offset is provided. The phase offset includes a first phase sub-offset and a second phase sub-offset. The phase offset compensator includes a feedback loop comprising a first loop filter, the feedback loop being configured to compensate the first phase sub-offset of the phase offset, and a feed forward loop comprising a second loop filter, the feed forward loop being configured to compensate the second phase sub-offset of the phase offset.

Abstract: A storage device configured to communicate with a host according to a serial communication standard. The storage device includes a receiver configured to receive host data from the host; a clock data recovery circuit configured to determine a first frequency of host data transmitted by a host; a phase locked loop configured to generate a local phase corresponding to a local clock signal; a frequency offset calculator configured to generate a frequency offset corresponding to the first frequency and a second frequency of the local clock signal; an accumulator configured to generate a phase offset corresponding to a difference between the local phase and a phase of the host data; an interpolator configured to generate a compensated local clock signal using the phase offset and the local phase; and a transmitter configured to transmit device data to the host using the compensated local clock signal.

Abstract: A signal receiver is configured to receive multiple time-domain input signals. A plurality of the input signals among the multiple time-domain input signals is selected and transformed into frequency-domain signals. The frequency-domain signals are shifted in phase by a negative value of a respective reference phase, and the phase-shifted signals are combined into one signal. The combined signal is then multiplied with a stored signal to generate a signal product and transformed into a time-domain signal. Peak detection is performed on the time-domain signal.

Abstract: A transmitter 103 and a method therein for transmitting discovery signals to a receiver 107. The transmitter 103 and the receiver 107 arc comprised in a radio communications system 100. The transmitter 103 transmits two or more discovery signals over two or more directions, wherein the each discovery signal is configured to span over a fraction of a carrier bandwidth.

Abstract: Logic may comprise a single phase tracking implementation for all bandwidths of operation and the logic may adaptively change pre-defined and stored track parameters if the receiving packet is 1 MHz bandwidth. Logic may detect a packet and long training fields before performing a 1 MHz classification. Logic may auto-detect 1 MHz bandwidth transmissions by a property of the long training field sequences. Logic may auto-detect 1 MHz bandwidth transmissions by detecting a Binary Phase Shift Keying (BPSK) modulated first signal field symbol rather than the Quadrature Binary Phase Shift Keying (QBPSK) associated with the 2 MHz or greater bandwidth transmissions. Logic may perform an algorithm to determine an estimated phase correction value for a given orthogonal frequency division multiplexing symbol and several embodiments integrate this value with an intercept multiplier that may be 0.2 for 1 MHz transmissions and, e.g., 0.5 for 2 MHz or greater bandwidth communication.

Abstract: The invention relates to a method for estimating frequency bias negatively affecting a digital signal representative of a symbol frame, wherein said method comprises the steps of: generating the digital signal at a sampling period Te that is shorter than a predefined period of each of the symbols of the frame; calculating values for a plurality of pairs of samples of the digital signal, each value being representative of a phase difference between the samples of a pair; estimating the frequency bias negatively affecting the digital signal on the basis of the values calculated for Np pairs of samples selected such that a plurality of said Np pairs belong strictly to a single symbol in the frame. The present invention also relates to a module for implementing the estimation method, as well as to a telecommunication method and system.

Abstract: Methods, software, receivers and systems for communicating information over a cyclostationary channel. The method generally includes interleaving sections of a control sequence with bits of the information. The software and receivers are generally configured to implement one or more aspects of the methods disclosed herein, and the systems generally include those that embody the inventive receivers disclosed herein. The present invention is particularly useful in powerline channels, where certain parameters (such as noise) have time-dependent or periodic variations in value. By distributing the control sequence, the incidence of carrier recovery is reduced, the likelihood of successful packet or frame transmissions is increased, and data may be more reliably communicated.

Abstract: A method for estimating a carrier frequency offset over a dispersive but spectrally flat channel comprises determining an autocorrelation of a received oversampled complex baseband digital signal, and estimating the carrier frequency offset based on an angle of the determined autocorrelation.

Abstract: A receiver is an ATSC (Advanced Television Systems Committee)-receiver and comprises a phase lock loop (PLL) for performing carrier tracking of a carrier in a received signal. The PLL includes a detector (160) comprising two pseudo-Hilbert filters (205, 215). The detector uses energy from both band edges of the received ATSC signal for driving the PLL.

Abstract: The methods and apparatus disclosed herein provide an operative system for increasing the resolution of serial DRUs based on interleaved free running oversamplers. In particular, this system uses incoming data to measure and to compensate the skew between two or more free running oversamplers (e.g., SerDes), without the need for any hardware design requirement relating to the precision of the relative skew of the oversamplers.

Abstract: A method for a receiver to estimate phase of a carrier wave, including receiving a carrier wave carrying pilot symbols and data symbols extending between the pilot symbols, determining phase of the carrier wave at received pilot symbols, and interpolating the phase of the carrier wave at points between pilot symbols based, at least in part, on an estimated phase of demodulated data symbols. Apparatus for estimate phase of a carrier wave, including a unit for determining phase of the carrier wave at received pilot symbols, and a unit for interpolating the phase of the carrier wave at points between pilot symbols based, at least in part, on an estimated phase of demodulated data symbols. Related apparatus and methods are also described.

Abstract: A phase detector includes data detection logic for detecting data in a communication signal, amplitude detection logic for processing modulation chosen from any of a PAM2 and a PAM4 communication modality, in-phase edge detection logic for detecting in-phase edge information in the communication signal, quadrature edge detection logic for detecting quadrature edge information in the communication signal, and mixing logic for determining an amount of in-phase edge information and quadrature edge information to be applied based on at least one channel parameter in the communication channel.

Abstract: Apparatuses, methods and systems for mitigating carrier offset of a received signal are disclosed. One embodiment of a receiver includes a receiver chain operative to receive a communication signal from a desired transmitter, and a controller operative to determine a carrier offset correction based on prior reception of communication signals from the desired transmitter. The receiver chain is operative to generate a carrier offset corrected received signal by applying the carrier offset correction to the received communication signal, and a correlation processor operative to correlate the carrier offset corrected received communication signal with a known sequence.

Abstract: A fast blind scan method first initializes pointers to fetch a block of spectrum and then checks whether the block contains a high spectrum signal and whether the difference between a carrier frequency of the high spectrum signal and a start pointer is greater than a first threshold. When the high spectrum signal is absent or the difference is not greater than the first threshold, it checks whether there is a full band channel in the block. When the full band channel exists, a signal detection and parameter extraction operation is performed and the start pointer is set to be a frequency of a second cross point. Then, it checks whether the difference between the start pointer and an end pointer is greater than a second threshold and, if not, a carrier frequency pointer is set to enable a tuner to fetch a next block.

Abstract: Exemplary embodiments of the present invention relate to a clock and data recovery (CDR) apparatus with adaptive optimum CDR bandwidth estimation by using a Kalman gain extractor. The Kalman gain extractor includes an off chip digital processor which receives a phase update information from the CDR outputs an estimated optimum Kalman gain obtained by extracting the standard deviation of step sizes of the accumulation jitter from the power spectral density (PSD) of the phase update information, and a on chip digital loop filter consists of a cyclic accumulator which accumulates the phase detector's output, a gain multiplier and a phase interpolator (or DCO) controller. The off chip digital processor includes a storage register, a fast Fourier transform (FFT) processor and an optimum Kalman gain estimator. The storage register stores the phase update information, from which the FFT processor extracts the PSD of the absolute input jitter.

Abstract: A receiver and method for a transponder of a two-way automatic communications system (TWACS) used by an electrical utility in which analog outbound messages are sent from the utility to a consumer and inbound, reply messages are sent from the consumer to the utility. The receiver and method enable a transponder to detect the outbound messages and include A/D conversion and digital processing for demodulating a digitized signal and providing the outbound message.

Abstract: A transceiver is described. The transceiver includes a first injection-locked oscillator and a second injection-locked oscillator. The transceiver also includes a first phase-locked loop coupled with the first injection-locked oscillator. The first phase-locked loop is configured to generate a first frequency reference. Further, the transceiver includes a second phase-locked loop coupled the second injection-locked oscillator. The second phase-locked loop is configured to generate a second frequency reference. The transceiver includes a mixer configured to receive the first phase-locked loop output and configured to receive said second injection-locked oscillator output. The mixer is also configured to generate a carrier frequency signal based on the first injection-locked oscillator output and the second injection-locked oscillator output. And, the transceiver includes a modulator configured to receive said carrier frequency signal.

Abstract: A mechanism is provided for dynamically adjusting DC offset at the time of deviation from DC balance ½ (DC level) in a data pattern including long-period consecutive bits generating DC offset in a section of data. A receiver circuit unit of an LSI having a serializer/deserializer arrangement for performing high-speed serial transmission includes an offset adjusting circuit. The offset adjusting circuit calculates DC balance in an arbitrary section of data by averaging received serial data. Based on comparison between a DC level and the DC balance obtained by averaging the received data, offset is shifted toward the H side when the DC balance exists on the H side from the DC level, and shifted toward the L side when the DC balance exists on the L side.

Abstract: A clock data recovery circuit includes a ring oscillator, an oscillation control circuit unit to start or stop the ring oscillator according to existence or absence of a PWM signal, a counter circuit unit to count pulse signals to hold N bits of count value, a register circuit unit which is configured to transmit upper M bits of count value, as a reference count value, in response to a transmission signal, a comparison circuit unit to output a timing clock when the count value exceeds the reference count value, and a transmission control circuit unit to be synchronized with a rising timing of the PWM signal to generate the transmission signal and a reset signal for resetting the counter circuit unit.

Abstract: A system and method for blind equalization of a QAM signal. Equalization is achieved using an algorithm characterized by cost function that is a function the Euclidian distance, e.g. the minimum Euclidian distance, between points of the constellation associated with the QAM signal, i.e. the distance between symbols.

Abstract: Example embodiments comprise a diversity receiver, and corresponding method, for measuring a differential phase between a first local oscillator of a first antenna and a second local oscillator of a second antenna in the presence of a primary interference signal and at least one secondary interference signal. The method may comprise receiving a primary communication signal, a primary reference signal and additional reference signals, and processing these signals such that a summation signal does not substantially comprise the at least one secondary interference signal. The estimation of differential phase is achieved by a phase shift calculation between processed signal components, using that a summation of all signal components equals, or is approximately equal to, a predetermined signal.

Abstract: The present disclosure provides a method of carrier phase error removal associated with an optical communication signal. The method includes estimating and removing a first phase angle associated with an information signal using coarse phase recovery, the information symbol being associated with a digital signal, the digital signal representing the optical communication signal; estimating a carrier frequency offset between a receiver light source and a transmitter light source by using the estimated first phase angle, the carrier frequency offset being associated with the information signal; removing carrier phase error associated with the carrier frequency offset; and estimating and removing a second phase angle associated with the information signal, the estimated second phase angle being based on the estimated first phase angle and the estimated carrier frequency offset.

Abstract: Eye diagram scan circuit and associated method for a receiver circuit, including a level adjust circuit, a phase interpolator and a control module. The receiver circuit provides a first data signal and a primary phase data according to a received signal. The control module provides a phase offset data and a level offset data. The level adjust circuit adjusts a level of the received signal in respond to the level offset data; the phase interpolator triggers according to a sum of the phase offset data and the primary phase data, so a second data signal is provide in response to the level-adjusted received signal. The control module compares the first data signal and the second data signal, and accordingly provides an eye diagram scan result for the phase offset data and the level offset data.

Abstract: The present invention relates to a signal processing apparatus and method, a program, and a data recording medium configured such that the playback level of an audio signal can be easily and effectively enhanced without requiring prior analysis. An analyzer 21 generates mapping control information in the form of the root mean square of samples in a given segment of a supplied audio signal. A mapping processor 22 takes a nonlinear function determined by the mapping control information taken as a mapping function, and conducts amplitude conversion on a supplied audio signal using the mapping function. In this way, by conducting amplitude conversion of an audio signal using a nonlinear function that changes according to the characteristics in respective segments of an audio signal, the playback level of an audio signal can be easily and effectively enhanced without requiring prior analysis. The present invention may be applied to portable playback apparatus.

Abstract: There is provided a clock generating apparatus for generating a recovered clock by recovering a clock from an edge of a received signal, including a recovered clock generating section that generates the recovered clock, a multi-strobe generating section that generates a plurality of strobes with different phases, in accordance with a pulse of the recovered clock, a detecting section that detects a position of an edge of the received signal relative to the strobes, by referring to values of the received signal obtained at respective timings of the strobes, and an adjusting section that adjusts a phase of the recovered clock, in accordance with the position of the edge of the received signal.

Abstract: Apparatuses, systems, and methods are directed to maintaining optimal carrier tracking performance in view of operating conditions that prevail. Such configurations employ a phase lock loop that configured to generate an estimated phase error value, a variance module configured to calculate a phase noise variance based on the estimated phase error value, and a loop control bandwidth module that calculates a loop bandwidth value based on a detected lower phase noise variance, generates modified loop filter values in accordance with the calculated loop bandwidth value, and updates the phase lock loop with the modified loop filter values. During subsequent iterations, the modified loop filter values are incrementally adjusted along a particular direction until the phase noise variance increases at which point the modified loop filter values are incrementally adjusted in an opposite direction to converge on an optimal loop bandwidth value.

Abstract: The invention provides a method and an apparatus for estimating frequency deviation, the method comprising: after receiving a sub-frame, transforming a downlink synchronized code of the sub-frame to a frequency domain, and performing a correlation operation between the transformed downlink synchronized code and a local frequency domain synchronized code to obtain a conjugate downlink synchronized code sequence; judging a location of a maximum value in the conjugate downlink synchronized code sequence, and calculating a frequency deviation value according to the location of the maximum value. The estimating method provided in the invention can realize a stable work with no need of a precise sampling value location, an accurate timing synchronization, or even obtaining the information for the multi-path distribution and locations.

Abstract: Systems, methods, and devices to enable monitoring of wireless networks are described herein. In some aspects, a low power receiver or a receiver operating in a low power mode scans for signals with a moderate or low duty cycle. If a signal identifying a device or user of the receiver, or a signal indicating that there will be a subsequent data communication, is received, a high power receiver or a receiver operating in a high power mode is activated to receive data communications.

Abstract: A mechanism for retrieval of carrier frequency and carrier phase in a received modulated carrier waveform. Retrieval of carrier frequency and carrier phase can be implemented in an analog electrical circuit, using a field programmable gate array (FPGA), or in computer code. Independent of the implementation, the mechanism performs frequency and primary phase recovery by forcing transforms of a pilot tone in the upper and lower sidebands to the same frequency using a feedback loop. The difference-in-magnitudes of the channelized pilot are used by a phase lock loop to perform secondary phase recovery in a manner that also resolves phase sign ambiguity. Benefits of this mechanism include improved phase lock loop tracking performance and a reduction of noise in the data demodulated from the received carrier waveform.

Abstract: The carrier phase of a carrier wave modulated with information symbols is recovered with a multi-stage, feed-forward carrier phase recovery method. A series of digital signals corresponding to the information signals is received. For each digital signal, a coarse phase recovery is performed to determine a first phase angle which provides a first best estimate of the information symbol corresponding to the digital signal. Using the first best estimate as input, a second stage of estimation is then performed to determine a second phase angle which provides an improved (second) best estimate of the information symbol. Additional stages of estimation can be performed. The multi-stage, feed-forward carrier phase recovery method retains the same linewidth tolerance as a single-stage full blind phase search method; however, the required computational power is substantially reduced. The multi-stage, feed-forward carrier phase recovery method is highly efficient for M-QAM optical signals.

Abstract: An adaptive filtering arrangement for providing bit-synchronous, time-dependent filtering of a time-varying analog input signal taking the form of a time-dependent low pass filter including at least one adaptive resistive element that exhibits a varying resistance value as a function of a time. The time-dependent low pass filter uses as a “control” input a modifying element responsive to a clock signal associated with the received signal for creating a time-varying control signal applied as an input to the adaptive resistive element. The time-varying control signal is created to be synchronous with a baud interval of a created output signal such that the instantaneous bandwidth of the time-dependent low pass filter is synchronous with the baud interval, exhibiting a relatively small bandwidth during a central portion of the baud interval and exhibiting a relatively large bandwidth during a transition from one baud interval to the next.

Abstract: A satellite communication system comprised of a hub and plurality of remote terminals, wherein the system is configured for frequency reuse, a method and apparatus for signal cancellation are disclosed. The disclosed method and apparatus enable the hub to extract return link signals overlaying a transmitted forward link signal, wherein the forward link signal is transmitted at a power level higher than that of the overlaying return link signals.

Abstract: A method for carrier frequency tracking of a received signal having a burst structure includes dividing each burst into a number of segments. The carrier frequency offset of a first segment within a burst is measured to obtain a first segment carrier frequency offset measurement value. The carrier frequency offset of a second segment within the burst is corrected by a second segment carrier frequency offset correction value based on the first segment carrier frequency offset measurement value.

Abstract: Embodiments of user equipment and methods for determining IQ imbalance parameters are described. In some embodiments, a method for determining in-phase (I) and Quadrature (Q) imbalance (IQ imbalance) parameters based on a known signal in a dual-carrier receiver using at least one controllable frequency offset includes receiving a known signal modulated onto a first radio frequency (RF) carrier frequency and a second RF carrier frequency different than the first RF carrier frequency. The known signal is downconverted to a baseband signal for the carriers by conversion from the respective RF carrier frequencies to an intermediate frequency (IF) using a common RF local oscillator (LO) and by further conversion from IF to baseband using carrier specific IF LOs, where a controllable frequency offset is used. Any controllable frequency offset is removed from the baseband signal for the first and second carriers to produce representations of the received signals.

Abstract: A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.

Abstract: A method of accelerated carrier signal acquisition for a digital communication receiver, the method comprising receiving a carrier signal by a receiver comprising a carrier recovery loop (CRL), setting the CRL to an open loop setting using a processor, setting a numerically controlled oscillator (NCO) within the CRL at a center frequency of the NCO, determining, by the processor, one or more initial parameters of the CRL, calculating an estimate and polarity for a sign frequency detection frequency using a sign frequency detector while simultaneously estimating a Fast Fourier Transform (FFT) frequency by running an FFT using the processor, comparing polarities of the estimates of the sign frequency detection frequency and FFT frequency and determining a frequency offset using the processor, and adjusting one or more parameters of the CRL based on the frequency offset using the processor.

Abstract: Exemplary embodiments provide a computer-implemented method for generating a modulated acoustic carrier signal for wireless transmission from a speaker of a transmit device to a microphone of a receive device. Aspects of the exemplary embodiments include converting a message to binary data; modulating one or more selected frequencies for one or more acoustic carrier signals based on the binary data to generate one or more modulated acoustic carrier signals; filtering the one or more modulated acoustic carrier signals to remove any unintended audible harmonics created during modulation, including; equalizing the modulated acoustic carrier signal to pre-compensate for known degradations that will occur further along a signal path; setting a level of the modulated acoustic carrier signal for the intended application; and storing the modulated acoustic carrier signal in a buffer for subsequent output and transmission by the speaker.

Abstract: A signal processing system and method includes a transducer for receiving an analog signal having a random component and possibly an information component. The analog signal is converted into a digital signal having sample points. A nearest-neighbor calculation component calculates the expected average nearest neighbor distance between the sample points, the actual average distance and an error value. These values are corrected for edge effects. A first randomness assessment compares the actual average distance against the expected average distance with the standard error value. A second randomness assessment compares actual repeated values in the digital signal against expected repeated values. An information processing system continues processing the signal if the assessments indicate the possibility of an information component.

Abstract: A method for calculating a reconstructed phase that includes: Calculating a current phase signal and current amplitude signal that represent a phase and amplitude of a current input symbol, respectively. Generating, in response to the current phase signal and an estimate of a phase of a last input symbol that preceded the current input symbol, multiple partial references, some of which are responsive to (i) phase signals representative of phases of a plurality of input symbols that preceded the current input symbol, and (ii) estimates of the phase of the plurality of input symbols. Calculating unwrapped partial references. Estimating a constant carrier frequency offset (CFO) phase rotation in response to the unwrapped partial references. Calculating a reconstructed phase of the current input symbol in response to, at least, the estimate of the constant CFO phase rotation and to the unwrapped partial references.

Abstract: A leading edge associated with a received signal is detected to provide, for example, time of arrival information for a ranging algorithm. In some aspects, a method of leading edge detection involves sampling a received signal, generating a drift compensated signal based on the samples, reconstructing the received signal based on the drift compensated signal, and identifying a leading edge associated with the received signal based on the reconstructed signal.

Abstract: A method of rapid non-data aided carrier signal acquisition for a low symbol rate carrier signal, comprising receiving and converting an analog intermediate frequency carrier to a digital carrier signal, down-converting the signal to substantially baseband, reducing a sampling rate of the digital carrier signal using a decimation filter, determining a highest Fast Fourier Transform (FFT) based on a result of one or more FFT's generated by an FFT module using a peak finder, selecting an input source for the FFT module using a multiplexer, generating a frequency estimate of the digital carrier signal using a walking coarse detector, tuning a carrier recovery loop (CRL) based on the frequency estimate generated by the walking coarse detector, determining a final carrier frequency offset estimate using a result of the FFT module, modulation removal, and the peak finder, and programming an oscillator within the CRL to the final carrier frequency offset estimate.

Abstract: A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.

Abstract: A clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A first loop supplies a first clock signal to a second loop. The second loop modifies the first clock signal to produce the recovered clock signal and uses the recover clock signal to produce the recovered data signal. The first loop changes the frequency of the first clock signal based on frequency comparison and data transition density metrics.

Abstract: The present invention includes a method of determining a phase estimate for an input signal having pilot symbols. The method includes receiving a plurality of pilot symbols, and then multiplying two or more pilot symbol slots by corresponding correlator coefficients to correct a phase estimate of the input signal.

Abstract: A method of feedforward phase recovery on a data stream is described. Phase estimation base points are calculated, at a phase detector, for each block of the received data stream. A current phase, at a phase interpolator, between two phase estimation base points. Data stream delays within the phase detector are matched with delays within the phase interpolator.

Abstract: An approach for automatically generating system asset inventory discrepancies and matches and for identifying system asset accuracy information based on comparison of asset data in subsystems thereof, and for providing a list of actual assets based on comparison of trouble ticket information and a cumulative matching data set.

Abstract: Logic may comprise a single phase tracking implementation for all bandwidths of operation and the logic may adaptively change pre-defined and stored track parameters if the receiving packet is 1 MHz bandwidth. Logic may detect a packet and long training fields before performing a 1 MHz classification. Logic may auto-detect 1 MHz bandwidth transmissions by a property of the long training field sequences. Logic may auto-detect 1 MHz bandwidth transmissions by detecting a Binary Phase Shift Keying (BPSK) modulated first signal field symbol rather than the Quadrature Binary Phase Shift Keying (QBPSK) associated with the 2 MHz or greater bandwidth transmissions. Logic may perform an algorithm to determine an estimated phase correction value for a given orthogonal frequency division multiplexing symbol and several embodiments integrate this value with an intercept multiplier that may be 0.2 for 1 MHz transmissions and, e.g., 0.5 for 2 MHz or greater bandwidth communication.