Abstract: Embodiments of user equipment and methods for determining IQ imbalance parameters are described.

Abstract: A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.

Abstract: An object of the present invention is to sufficiently exhibit carrier reproduction performance in a radio device having a transmitter and a receiver and performing radio communication. A phase noise correction circuit provided in the transmitter in the radio device includes: a phase error information acquisition unit that acquires phase error information detected by a receiver of the radio device; and a phase noise correction unit that performs correction of phase noise generated by a local oscillator shared between the receiver and transmitter for a baseband signal upon radio transmission by using the phase error information acquired by the phase error information acquisition unit.

Abstract: A change-point detection circuit 16 extracts a clock signal from serial data, input data. A variable delay circuit provides a delay in accordance with a delay control signal to a reference signal having a predetermined frequency, so that the phase of the reference signal is shifted on the basis of an initial delay. An input latch circuit latches internal serial data by using an output signal of the variable delay circuit as a strobe signal. A phase comparator matches the frequencies of the clock signal and the strobe signal with each other, and generates phase difference data in accordance with a phase difference between the two signals. A loop filter integrates the phase difference data generated by the phase comparator and outputs it as the delay control signal. The phase shift amount acquisition unit acquires a phase shift amount based on the delay control signal, the phase shift amount being based on the initial delay provided to the reference signal by the variable delay circuit.

Abstract: A synchronization and detection method in a wireless device may include performing coarse detection and synchronization with respect to a received signal. The synchronization and detection method may also include performing fine detection and synchronization for acquisition of the received signal. Results of the coarse detection and synchronization may be used for the fine detection and synchronization. The synchronization and detection method may also include performing tracking mode processing when the acquisition of the received signal has been achieved.

Abstract: A method of compensating for carrier frequency and phase errors of a received multi-carrier modulated signal. The received multi-carrier signal including modulated carriers for transmitting known data and unmodulated carriers for error correction, comprising, time domain down converting the received multi-carrier signal to base-band to provide a down-converted signal, the down-converted signal including a plurality of modulated carriers for transmitting known data and unmodulated carriers for error correction. Sampling an unmodulated carrier of the down-converted signal to provide received data samples. Providing a reference signal derived from the unmodulated carrier of the down-converted signal. And, estimating phase errors from a phase difference between the ummodulated carrier and the reference signal derived from the unmodulated carrier of the down-converted signal to provide a plurality of received sample phase error estimates for each modulated carrier.

Abstract: An apparatus includes Radio Frequency (RF) circuitry and baseband circuitry. The RF circuitry is configured to receive strobe messages that are based on a system clock over a digital interface, and to communicate synchronously with the system clock based on the received strobe messages in accordance with a Radio Access Technology (RAT) that is selected from among multiple different RATs. The baseband circuitry is configured to generate the strobe messages, to delay the strobe messages by a delay that depends on the selected RAT, and to send the delayed strobe messages to the RF circuitry over the digital interface.

Abstract: The disclosure aims to implement an automatic frequency offset compensation of the frequency between emitter and receiver equipments, in radio frequency modules, with a frequency offset that can be larger than that the receiver can allow, without time loss and extra consumption. To solve this problem, the disclosure provides an automatic frequency offset compensation device comprising a reception front end, at least a filter, an I/Q demodulator for obtaining the I (In Phase) and Q (Quadrature) parameter, an automatic frequency control AFC unit for comparison of a received frequency with the real frequency of the equipment, and a microcontroller and a frequency synthesizer. In this device, the frequency offset is calculated by the AFC unit from the information given by the I/Q demodulator.

Abstract: A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digitally controlled analog sub-system responsive to the analysis.

Abstract: A signal processing circuit is provided. The signal processing circuit, adjusting a received radio frequency (RF) signal according to a gain, and generating a digital signal accordingly, the signal processing circuit including a signal analysis circuit, for analyzing the digital signal to generate the gain, determining whether the received RF signal is a target signal, and generating a reference value according to the digital signal, and a baseband circuit, for performing a carrier frequency offset (CFO) compensation to the digital signal according to the reference value, wherein, the reference value is generated while the signal analysis circuit is determining whether the received RF signal is the target signal.

Abstract: A diversity receiver configured to receive digital signals, including a first modulator configured to receive a first signal and modulate the first signal to first data, a second modulator configured to receive a second signal and modulate the second signal to second data, a path aligner configured to detect starting points of the first data and the second data and generate a control signal for synchronizing the first data and the second data, and an equalizer/decoder configured to synchronize the first and second data and to generate a signal to noise ratio and an equalizer output by a recursive equalization operation for the diversity signals thus synchronized.

Abstract: An example wireless device includes a radio receiver to measure a signal quality of a data signal independent of a direct frequency measurement, the signal quality correlated to an offset between a transmitter reference frequency and a receiver reference frequency but not indicative of a direction of the offset. The example wireless device further includes a reference frequency generator to determine from the measured signal quality that a previous adjustment to the receiver reference frequency in a first direction has worsened the signal quality, and responsive to that determination adjust the receiver reference frequency in a second direction that is opposite to the first direction.

Abstract: This invention relates to a Multi-Input Multi-Output Orthogonal Frequency Divisional Multiplexing (MIMO-OFDM) is a transmission technology for many current and next generation wireless communication systems. Carrier Frequency Offset (CFO) Estimation and Correction is one of the most important requirement of the proper reception of MIMO-OFDM Signals. The invention provides a null subcarrier based scheme to accomplish this task. The CFO is estimated by employing the covariance matrix of the signals on all receiving antennas with a cost function which minimizes the energy falling on the null subcarrier locations due to frequency offset. The proposed approach results in very low computational complexity as it uses a two step procedure, making it very attractive for real time applications. Also a new null subcarrier allocation scheme based on Fibonacci series is proposed which ensures a frequency offset estimation range equal to the maximum possible range equal to the OFDM bandwidth.

Abstract: A method and circuitry for detecting a frequency offset (?) between data at a transmission symbol rate (fTx) transmitted from a transmitter and a reception sampling frequency (fRx) operating in a receiver on the basis of hard decision based on a binary number in the receiver. The receiver uses a converter to make binary hard decisions performs n times oversampling, then obtains a symbol decision value, calculates a timing correlation value for each plurality of partition phases, and calculates a cumulative timing correlation value for a specific period or number of additions. The receiver determines whether its sampling frequency is higher or lower than a correct symbol rate, appropriately shifts a sampling position, and makes reception while maintaining the correct sampling position thereby enables data deviation caused by a frequency offset to be compensated on the fly.

Abstract: Disclosed herein is a receiving apparatus including a preamble analyzer configured to receive a frame of DVB-T2 made up of an OFDM signal and analyze a preamble contained in the received frame; an offset detector configured to detect a fine offset and a coarse offset on the basis of the analyzed preamble; a carrier frequency corrector configured to execute carrier frequency correction on an OFDM time domain signal obtained by quadrature demodulation on the basis of the detected fine offset and the detected coarse offset; a determiner configured to determine whether the detection of the coarse offset has been completed; and a control signal outputter configured, if the detection of the coarse offset is determined to be completed, to output a control signal for feeding back the fine offset detected on the basis of an OFDM frequency domain signal obtained by FFT computation to the carrier frequency corrector.

Abstract: The present invention includes a method of determining a phase estimate for an input signal having pilot symbols. The method includes receiving a plurality of pilot symbols, and then multiplying two or more pilot symbol slots by corresponding correlator coefficients to correct a phase estimate of the input signal.

Abstract: A transmitter includes an encoding module, an adaptive hierarchical signal mapping module and a transceiver module. The encoding module receives an input signal and encodes the input signal. The input signal includes data to be transmitted. The adaptive hierarchical signal mapping module modulates the encoded signal according to one or more hierarchical level distance ratios to obtain modulated symbols. The hierarchical level distance ratio defines distances between the modulated symbols. The transceiver module generates a radio frequency signal according to the modulated symbols and transmits the radio frequency signal to an air interface.

Abstract: In described embodiments, a receiver includes a clock and data recovery (CDR) module with a voltage control oscillator (VCO) and a Sigma-Delta modulator in an integral loop control of the VCO. Providing finer resolution by the Sigma-Delta modulator reduces quantization noise in the integral control loop when compared to a loop without a Sigma-Delta modulator in the integral loop. Sigma-Delta modulation within the integral loop control of a VCO-based CDR reduces effective quantization of the VCO integral word control, allowing the proportional loop control compensation to i) reduce effective quantization of the VCO integral word control and, ii) enhance receiver jitter tolerance in presence of periodic-jitter, serial data whose frequency is offset from the nominal rate and serial data whose nominal frequency is modulated by a spread spectrum clock.

Abstract: A data recovery apparatus and method by using over-sampling are provided. The data recovery apparatus by using over-sampling includes an over-sampling module, a data regeneration unit, a phase alignment unit, a phase decision module, and an output data correction unit. The over-sampling module samples serial data according to a clock signal, so as to output M-bit data, in which each bit in the serial data is sampled N times. The phase alignment unit selects specific M-bit data from a P-bit signal output by the data regeneration unit, and distinguishes the specific M-bit data to X groups of N-bit signals. The phase decision module determines a direction of phase adjustment according to the specific M-bit data. The output data correction unit selects and outputs first or second recovery data constituted by first or second specific bits of each group of N-bit signal according to the direction of phase adjustment.

Abstract: A serializer-deserializer (SERDES) includes a clock-data recovery block, a control block, and a low-pass filter. The control block contains a state machine that includes a fast convergence mode utilizing an unstable operating point and a slow tracking mode utilizing a stable operating point. The control block is configured to start in the fast convergence mode to allow quickly locking the recovered clock to the incoming data stream by replicating movement commands resulting in multiple phase adjustments for each transition. To facilitate proper operation of the SERDES, the fast convergence mode is exited after N-bits and a slow tracking mode is entered to provide stable operation. The control block accepts filtered transition-data and data-transition phase state signals and converges to a phase aligned state in less than 2N-bits where N represents the number of phases in one data bit.

Abstract: A receiver front end receives a local frequency reference signal and a Frequency Shift Keying modulated signal comprising a synchronisation sequence, and downconverts the Frequency Shift Keying modulated signal to provide baseband in-phase and quadrature signals. A pulse generator receives the in-phase and quadrature signals, generates an in-phase pulse signal ILEAD comprising pulses aligned with edges of the baseband in-phase and quadrature signals when the baseband in-phase signal leads the baseband quadrature signal, and generates a quadrature pulse signal QLEAD comprising pulses aligned with edges of the baseband quadrature and in-phase signals when the baseband quadrature signal leads the baseband in-phase signal. A frequency corrector receives the in-phase and quadrature pulse signals during receipt of the synchronisation sequence, compares the pulse signals to a target, and generates a control signal for controlling the local signal generator in dependence upon the result of the comparison.

Abstract: The carrier phase of a carrier wave modulated with information symbols is recovered with a multi-stage, feed-forward carrier phase recovery method. A series of digital signals corresponding to the information signals is received. For each digital signal, a coarse phase recovery is performed to determine a first phase angle which provides a first best estimate of the information symbol corresponding to the digital signal. Using the first best estimate as input, a second stage of estimation is then performed to determine a second phase angle which provides an improved (second) best estimate of the information symbol. Additional stages of estimation can be performed. The multi-stage, feed-forward carrier phase recovery method retains the same linewidth tolerance as a single-stage full blind phase search method; however, the required computational power is substantially reduced. The multi-stage, feed-forward carrier phase recovery method is highly efficient for M-QAM optical signals.

Abstract: A communications subsystem for a wireless device for correcting errors in a reference frequency signal. The communications subsystem comprises a frequency generator for generating the reference frequency signal and a closed loop reference frequency correction module that generates a reference frequency adjustment signal for correcting the reference frequency signal when the communications subsystem operates in closed loop mode. The subsystem further includes an open loop frequency correction means that that samples values of the reference frequency adjustment signal during the closed loop mode and generates a frequency correction signal for correcting the reference frequency signal when the communications subsystem operates in a mode other than closed loop mode.

Abstract: A power recovery system includes a transmission line that is coupled to transfer an RF signal received via an antenna. The RF signal generates a partial standing wave in the transmission line and the transmission line has at least one standing wave anti-node. A power recovery circuit converts an anti-node signal from the at least one standing wave anti-node to a power signal.

Abstract: A radio apparatus includes: first and second reception units to receive first and second signals from first and second radio apparatus controllers, respectively; first and second synchronous clock generation units to generate first and second recovery clocks from clock components included in the first and second signals received by the reception units, respectively; a clock synchronization detection unit to detect whether or not the second recovery clock is synchronous with the first recovery clock; a code selection unit to select a code indicating the synchronous state according to a detection result of the synchronization detection unit; a signal processing unit of generate a third signal to which the code selected by the code selection unit is added and which is synchronous with the first recovery clock; and a transmission unit to transmit the third signal generated by the signal processing unit to the second radio apparatus controller.

Abstract: One embodiment relates to an integrated circuit which includes a transmitter buffer circuit, a duty cycle distortion (DCD) detector, correction logic, and a duty cycle adjuster. The DCD detector is configured to selectively couple to the serial output of the transmitter buffer circuit. The correction logic is configured to generate control signals based on the output of the DCD detector. The duty cycle adjuster is configured to adjust a duty cycle of the serial input signal based on the control signals. Another embodiment relates to a method of correcting duty cycle distortion in a transmitter. Other embodiments and features are also disclosed.

Abstract: A method and a system for compensating for a permutation of L pairs of cable such that the compensation is localized in a trellis decoder of a receiver. The L pairs of cable correspond to L dimensions of a trellis code associated with the trellis decoder. The trellis code includes a plurality of code-subsets. The permutation of the L pairs of cable is determined. A plurality of sets of swap indicators based on the permutation of the L pairs of cable is generated. Each of the sets of swap indicators corresponds to one of the code-subsets. The code-subsets are remapped based on the corresponding sets of swap indicators.

Abstract: A timing recovery circuit recovers the symbol timing of a modulation signal. A carrier recovery circuit corrects the frequency shifts of output signals of the timing recovery circuit. An FIR equalizer having a plurality of taps, and corrects the distortions of output signals of the carrier recovery circuit. A control circuit dynamically controls the number of taps used in the FIR equalizer.

Abstract: A method for receiving a broadcasting signal and a broadcasting signal receiver are disclosed. Even when a cell is changed while an emergency alert is output, the emergency alert can be continuously output using emergency alert table information included in the broadcasting signal and channel information of the cell. The emergency alert table information may include a cell identifier and the channel information of the cell may include virtual channel information of the cell.

Abstract: A method of improving sensitivity in the demodulation of a received signal by a receiver over an arbitrary measurement time epoch, said method comprising the steps of correlating said received signal with a local replica of pseudo noise code in a coherent fashion creating a correlation signal and utilizing a Viterbi phase state keying trellis demodulation with a variable resolution of phase states over 0 to 360° to demodulate the radio frequency phase trajectory of said correlation signal throughout the measurement time epoch for improving sensitivity in the demodulation of a received signal.

Abstract: A carrier recovering apparatus, in which degradation of the demodulation performance caused when a pilot signal cannot be normally received is suppressed, includes a rotation calculator for multiplying a baseband signal and an oscillation signal and outputting a multiplied signal; a pilot signal extractor for extracting a pilot signal from the signal output from the rotation calculator; an error detection controller for outputting a phase error between the pilot signal and a reference signal as a value restricted within a given range; a loop filter for smoothing the phase error output from the error detection controller and outputting the smoothed phase error; and a variable frequency oscillator for generating a signal in accordance with the output of the loop filter and outputting the generated signal as the oscillation signal.

Abstract: A binary signal detection based on low resolution ADC includes: a variable-gain amplifier for amplifying an input signal with a gain factor controlled by a gain setting to generate an amplified signal; an ADC for converting the amplified signal into a converter output in accordance with a timing provided by a recovered clock, wherein the converter output has N levels; a timing detection circuit for generating a timing error signal based on the converter output; a filter for filtering the timing error signal to generate a control signal; a controllable oscillator for generating the recovered clock under a control of the control voltage; an automatic gain control for processing the converter data to set the gain setting to control the gain factor; and a data recovery circuit for generate a recovered data based on the converter output.

Abstract: A waveform equalization circuit includes: a decision feedback equalization unit that feeds back and equalizes an input signal; a clock phase adjustment unit that adjusts a clock phase of a signal equalized by the decision feedback equalization unit based on a signal determined with a prescribed potential as a threshold; and a duo-binary decoder that encodes, into a duo-binary signal, the signal determined with the prescribed potential as a threshold based on a clock adjusted by the clock phase adjustment unit from the signal equalized by the decision feedback equalization unit; wherein the equalized signal is generated by adding the duo-binary signal encoded by the duo-binary decoder to the input signal. A first post-tap of the input signal is equalized by the clock phase adjustment unit without feedback equalization by the decision feedback equalization unit. Second and subsequent post-taps of the input signal are fed back and equalized by the decision feedback equalization unit.

Abstract: A mechanism for jointly correcting carrier phase and carrier frequency errors in a demodulated signal. A computer system may receive samples of a baseband input signal (resulting from QAM demodulation). The computer system may compute values of a cost function J over a grid in a 2D angle-frequency space. A cost function value J(?,?) is computed for each point (?,?) in the grid by (a) applying a phase adjustment of angle ? and a frequency adjustment of frequency ? to the input signal; (b) performing one or more iterations of the K-means algorithm on the samples of the adjusted signal; (c) generated a sum on each K-means cluster; and (d) adding the sums. The point (?e,?e) in the 2D angle-frequency space that minimizes the cost function J serves an estimate for the carrier phase error and carrier frequency error. The estimated errors may be used to correct the input signal.

Abstract: A method and apparatus for reducing the amplification of the duty cycle distortion of high frequency clock signals when is provided. A data signal is sent to a receiver via a first channel. A clock signal is sent to the receiver via a second channel. The clock signal is filtered to substantially remove therefrom low frequency components before the clock signal is used by the receiver to recover data from the data signal.

Abstract: A local carrier wave output from a synthesizer to quadrature demodulators is multiplied by an offset that makes a frequency shift by an integer number of subcarriers in units of sub-carrier bands. The offset is set to a value obtained by multiplying the number sequentially counted up from 0 to the number of unused sub-carriers included in guard tones in a signal band by the bandwidth of a sub-carrier. By shifting the frequency of the local carrier wave at the time of quadrature demodulation with the offset, the SNR of a baseband signal is prevented from being constantly degraded by a frequency characteristic possessed by the circuit of a receiver in a particular sub-carrier signal. Especially, by preventing a pilot signal from being constantly degraded, the signal can be received with higher accuracy.

Abstract: A method and system of fine timing synchronization for an OFDM signal. The OFDM signal is coarse timing synchronized, generating a synchronization sequence and a CFR (Channel Frequency Response). The synchronization sequence is removed. A correlation coefficient of the correlation between the CFR applied to a number of carriers and the number of carriers with different window shifts is calculated. The largest window shift corresponding to a downsampling factor is indicated by the lowest correlation coefficient greater than a threshold. The CFR is downsampled by the downsampling factor, and an inverse FFT is performed on the downsampled CFR with a reduced number of calculations reduced by the downsampling factor, transforming the CFR into a CIR. A fine timing synchronization position is determined from the CIR and is utilized by an FFT unit within an OFDM receiver to accurately receive OFDM symbols of the OFDM signal.

Abstract: A demodulator is provided for demodulating a phase-modulated data signal. The demodulator includes a phase frequency detector to output a voltage representing a phase difference between a received phase-modulated data signal and a reference clock signal. The voltage is input to first and second phase change detectors, which are provided to measure the phase difference of the phase-modulated data signal during first and second time periods, respectively.

Abstract: According to an embodiment, a receiver, system and method for channel estimation in a communications system utilizing multiple transmit antennas are provided. The receiver comprises an antenna node operable to receive a signal that includes a superposition of at least a first signal corresponding to a first sequence and a second signal corresponding to a second sequence; and a channel estimator, coupled to the antenna node, operable to correlate the received signal with at least one of the first and second sequences, to determine at least one boundary between at least two waveforms resulting from the correlation, and to calculate using the boundary and the at least two waveforms a first channel response corresponding to the first signal and a second channel response corresponding the second signal. Channel estimates are determined based on determined boundaries and may be smoothed by a Savitzky-Golay filter in the frequency domain. The variance of additive white Gaussian noise (AWGN) may also be estimated.

Abstract: A clock and data recovery device recovers data from a sequential stream of data that includes bursts of data separated by gaps. Each burst of data arrives with its own phase and with its own deviation from a nominal frequency. The bursts of data begin with a preamble that is utilized to determine the timing of the burst. The clock and data recovery device determines the timing of a burst of data using signals from one or more demultiplexers or samplers. At the start of each burst of data, sampled input signals are analyzed by an edge detector to determine a sample phase for the burst. A selector utilizes the sample phase determined by the edge detector to choose which of the sampled input signals to use to produce output data signals from the clock and data recovery device.

Abstract: A method, apparatus and system are described for adjusting the frequency of one or more clock signals used by a device. The one or more clock signals are adjusted by a determined amount when a channel quality metric of an RF channel in use by the device indicates a degradation in the reception quality.

Abstract: A radio frequency (RF) apparatus has a receiver. The receiver includes a mixer, a clock generator, and a common mode controller. The clock generator couples to the mixer. The common mode controller couples to the outputs of mixer. The mixer, the clock generator and the common mode controller are operated collectively to program linearity and a gain of the receiver.

Abstract: A method and device for acquiring a channel with a frequency offset less than half symbol rate is applied but not limited to a DVB-S system. A target channel is selected to obtain a carrier frequency and a symbol rate for programming a tuner to obtain a digital baseband signal. A down-sampling factor is calculated based on the symbol rate for performing a down-sampling operation to obtain a down-sampling signal that passes through a digital matched filter to generate a filtered spectrum. A moving average and spectrum inversion is applied to detect location of the target channel and find two cross points thereby estimating a coarse carrier frequency offset for compensating the tuner and a coarse symbol rate. A fine carrier frequency offset and a symbol rate estimate are estimated for compensating and acquiring the target channel when the target channel is successfully detected.

Abstract: A receiver is an ATSC (Advanced Television Systems Committee)-receiver and comprises a controller and an equalizer, which comprises a feed-forward filter and a feed-back filter. The feed-forward filter comprising at least one tap associated with at least one tap coefficient value. The controller determines a location of at least one tap of the equalizer; and if that location is close to a tap boundary (or edge) of the equalizer, the at least one tap of the equalizer is shifted forward or backward by at least one sample position.

Abstract: A receiver is optimized by adapting parameters of components within the receiver. Various component parameters are adapted by using either a least means squared algorithm or a steepest descent algorithm. The taps of a decision feedback equalizer can be adapted by using either a least means squared algorithm or a steepest descent algorithm. The gain value of a linear equalizer and the input of a digital to analog converter coupled to the linear equalizer are also adapted through the least means squared algorithm or a steepest descent algorithm. A variable gain amplifier is also capable of being adapted through the use of the least means squared algorithm. Clock offsets are also configured by use of a steepest descent algorithm.

Abstract: An output clock recovery circuit (10) for recovering an output clock (14) from a source clock (12) and time stamp information (18A, 18B) includes a time stamp translator (22) and a phase-locked loop circuit (17) including a fraction processor (34). The time stamp translator (22) receives the time stamp information (18A, 18B) and uses an algorithm that translates the time stamp information (18A, 18B) into a time stamp decimal component (48) and a time stamp integer component (50). The time stamp decimal component (48) is less than one and is processed by the fraction processor (34). The time stamp integer component (50) is maintained within a predetermined range of integers that are greater than zero. The output of the fraction processor (34) and the time stamp integer component (50) can be input into a feedback divider (36) of a feedback loop of the phase-locked loop circuit (17) to recover the output clock (14).

Abstract: Various techniques are provided to detect a state of a communication signal. In one example, a method of detecting a state of a signal includes receiving a differential communication signal comprising a positive portion and a complementary negative portion. The method also includes filtering the positive portion of the communication signal through a first low pass filter to provide a filtered positive portion of the communication signal. The method also includes filtering the negative portion of the communication signal through a second low pass filter to provide a filtered negative portion of the communication signal. The method also includes comparing the filtered positive portion of the communication signal with an internal reference voltage. The method also includes comparing the filtered negative portion of the communication signal with the internal reference voltage.

Abstract: Frequency of an oscillating signal is temporarily adjusted to adjust frequency and/or phase of an output signal. For example, the frequency of the oscillating signal may be adjusted for a very short period of time to adjust the phase of the output signal. In addition, the frequency of the oscillating signal may be temporarily adjusted in a repeated manner to adjust the effective frequency of the output signal. In some aspects the frequency of the oscillating signal is adjusted by reconfiguration of reactive circuits associated with an oscillator circuit.

Abstract: A system for processing a received signal having at least one code applied thereto, the received signal having a frequency, the system comprising: first correlator circuitry arranged to correlate the received signal with a first code to provide an output; second correlator circuitry arranged to correlate the received signal with a second code to provide an output, wherein the first code and the second code are different; and processor for processing together the outputs of the first and second correlator circuitry to cancel the frequency.

Abstract: The present invention relates to an apparatus and method for estimating a frequency offset in a wireless telecommunication system. The present invention does not estimate an initial frequency offset using a preamble which is the initial symbol of a frame upon estimation of the frequency offset in the wireless telecommunication system, but estimates a frequency offset using correlation of a cyclic prefix (CP) existing in each symbol, thereby eliminating a need to reproduce information about separate preamble signals and preamble signals, and easily estimating a frequency offset using only input signals.