Separate Mark And Space Channels Patents (Class 375/337)
  • Patent number: 11736129
    Abstract: Methods and wireless devices for selecting a local oscillator frequency to use for conducting orthogonal frequency division multiplexing (OFDM) communications. For each of a plurality of local oscillator frequencies, a wireless device determines a respective interference power resultant from the local oscillator frequency for each of a plurality of subcarriers, and determines a cost function by performing a summation over the interference powers associated with each of the plurality of subcarriers. The wireless device selects a first local oscillator frequency with the smallest cost function to use for wireless communications. The wireless device performs wireless communications through the plurality of subcarriers using the first local oscillator frequency.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: August 22, 2023
    Assignee: National Instruments Corporation
    Inventor: Karl F. Nieman
  • Patent number: 8625639
    Abstract: An information processing apparatus is provided which includes a signal multiplexing unit for multiplexing a plurality of transmission signals, each in a different frequency band and not containing a DC component, and a power signal supplied from a DC power supply and generating a multiplexed signal, a single signal cable through which the multiplexed signal generated by the signal multiplexing unit is transmitted, and a signal separating unit for separating the multiplexed signal transmitted through the signal cable into signals, each in a frequency band of one of the plurality of transmission signals, and a signal in a frequency band of the power signal.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: January 7, 2014
    Assignee: Sony Corporation
    Inventor: Kunio Fukuda
  • Patent number: 8340208
    Abstract: An information processing device is provided that includes a signal receiving portion, an absolute value conversion portion, and an input data decoding portion. The signal receiving portion receives a signal that is encoded such that mutually distinct first and second bit values are respectively expressed by pluralities of mutually distinct first amplitude values and second amplitude values, the first and second bit values also being encoded such that the same amplitude value does not occur twice in succession and such that the polarities of the amplitude values are inverted with each cycle. The absolute value conversion portion converts into absolute values the amplitude values of the signal that has been received by the signal receiving portion. The input data decoding portion decodes the first and second bit values based on the amplitude values in the signal that have been converted into absolute values by the absolute value conversion portion.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Kunio Fukuda, Takehiro Sugita
  • Patent number: 8265199
    Abstract: A receiving circuit includes a positive-side level judgment circuit, a negative-side level judgment circuit, and a gate circuit, and is configured to receive input of an AMI-coded signal, convert the signal to a binary output signal, and output the same. The positive-side level judgment circuit judges whether the voltage of an input signal is greater or less than a threshold on the positive side. The threshold on the positive side is provided with a hysteresis characteristic by a positive feedback. The negative-side level judgment circuit judges whether the voltage of an input signal is greater or less than a threshold on the negative side. The threshold on the negative side is provided with a hysteresis characteristic by a positive feedback loop. The gate circuit logically combines the outputs of the positive-side and negative-side level judgment circuits so as to generate the output signal.
    Type: Grant
    Filed: May 28, 2007
    Date of Patent: September 11, 2012
    Assignee: Daikin Industries, Ltd.
    Inventor: Takashi Okano
  • Patent number: 8238482
    Abstract: A technique for performing channel tracking and/or channel estimation in a wireless communication device includes receiving a reference signal and one or more non-error propagation physical channel signals. In general, the one or more non-error propagation physical channel signals must be correctly decoded before a data channel can be decoded. Channel tracking and/or channel estimation are/is then performed based on the reference signal and at least one of the one or more non-error propagation physical channel signals.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: August 7, 2012
    Assignee: Apple Inc.
    Inventors: Ning Chen, Ahsan U. Aziz, Leo G. Dehner, Taeyoon Kim
  • Patent number: 8060051
    Abstract: In a radio communication apparatus, a frequency offset calculator of the radio communication apparatus calculates a frequency offset of the received radio signal from the reception frequency of the radio communication apparatus. An averaging unit averages the frequency offset calculated by the frequency offset calculator. A moving speed calculator calculates the moving speed of an associated radio communication apparatus with which the radio communication apparatus is communicating, based on the frequency offset calculated by the frequency offset calculator. An averaging time changer changes an averaging time for which the frequency offset is averaged by the averaging unit, in accordance with the moving speed of the associated radio communication apparatus calculated by the moving speed calculator.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 15, 2011
    Assignee: Fujitsu Limited
    Inventor: Takato Ezaki
  • Patent number: 8050343
    Abstract: A wireless communication system receiver receives and processes a signal comprising at least two component carriers carrying data scheduled to the receiver and having center frequencies spaced apart by at least one component carrier frequency difference. Each component carrier comprises a number of subcarriers spaced apart by a system subcarrier frequency spacing. A common divisor is obtained for the at least one component carrier frequency difference and the system subcarrier frequency spacing. A symbol is received on the subcarriers of the component carriers and downconverted to baseband to produce a baseband symbol. A block of padding values is inserted in the baseband symbol to produce a padded symbol. The length of the block of padding values is such that intermediate subcarriers are inserted to yield a subcarrier frequency spacing for the padded symbol equal to the common divisor. Finally the padded symbol is Fast Fourier Transform, FFT, processed.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: November 1, 2011
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Fredrik Nordström, Niklas Andgart, Bengt Lindoff
  • Patent number: 7974373
    Abstract: A method and architecture for pulse shaping are provided. The architecture includes a pulse shaping filter having a plurality of memory elements and a plurality of taps connected to the plurality of memory elements wherein a total number of the plurality of taps is independent of a sampling rate. The pulse shaping filter further includes a selector configured to select outputs from the plurality of taps to define a pulse shaped output.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: July 5, 2011
    Assignee: Pine Valley Investments, Inc.
    Inventor: Ajit Kumar Reddy
  • Patent number: 7688799
    Abstract: In a case of being judged that a compressed mode is applied in a mobile terminal, if it is judged that reception quality during data communication is favorable, gap intervals are not created by passing through a processing of gap interval creation. Further, if the data communication over the HS-DSCH is performed, the data communication over the HS-DSCH is continued. This prevents degradation of data transmission rate over a channel for high speed data transmission service, in the presence of a mobile terminal in a favorable reception quality area.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: March 30, 2010
    Assignee: Sony Ericsson Mobile Communications Japan, Inc.
    Inventor: Katsuya Yamamoto
  • Patent number: 7221711
    Abstract: The multilevel data encoding and modulation technique uses a pair of complementary logic sets. In its most basic form, the sets are binary sets each containing a line level for a logical one and a line level for a logical zero for a total of four logic levels. The encoding technique requires a polar change in the line level after every bit. An optional fifth level may be used in order to skew the frequency or to enable automatic gain control circuitry to ensure consistent level discrimination. The encoding technique may be used in a bipolar device, or a bias level may be applied to the signal for unipolar transmission. The encoding technique involves inverting the polarity of alternating bits, filtering out all odd harmonics, transmitting and receiving the waveform, and decoding the demodulated waveform by comparing the absolute value of the half-cycle peak-to-peak voltage gain to a predetermined table.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: May 22, 2007
    Inventor: John R. Woodworth
  • Patent number: 7158588
    Abstract: The present invention relates generally to communication systems, both wired and wireless, employing a continuous phase modulation (“CPM”) waveform with a minimum shift keying (“MSK”) preamble. The present inventive system and method uses information from contiguous Fourier Transforms taken on contiguous data blocks to determine baud rate, phase, frequency offset, and bit timing of the CPM waveform or can be used to determine the frequency of continuous wave waveform. More particularly, the inventive system and method is applicable to the military satellite communications UHF frequency band for deciding whether a signal of interest is.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: January 2, 2007
    Assignee: Harris Corporation
    Inventors: James A. Norris, Clifford Hessel
  • Patent number: 6782353
    Abstract: The present invention provides a measuring device which extracts, from an inputted data signal, a clock signal in which there is little internal occurrence of absence or phase fluctuations, and correctly carries out measurement of an error ratio or jitter or wander accompanying transmission of the data signal by using the clock signal. A band-pass filter extracts, from the inputted data signal, a signal component having a same frequency as that of a clock signal to be regenerated. A binarizing circuit binarizes the extracted signal component at a predetermined threshold value, and outputs it as a regenerated clock signal. At this time, the binarizing circuit is configured such that, when there is a same code continuing period in the data signal, the binarizing circuit binarizes the signal outputted during the period by relaxation vibration at an interior of the band-pass filter, so as to compensate for absence of the clock signal during the period.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: August 24, 2004
    Assignee: Anritsu Corporation
    Inventor: Seiya Suzuki
  • Patent number: 6707858
    Abstract: A low IF receiver frequency translates an input signal in quadrature related mixers, filters in respective low pass channel filters, and derotates to produce a wanted signal and its image. At switch-on, the receiver is operated as a zero IF receiver in order to determine which of the adjacent channels to the wanted channel has the smaller interferer, and the local oscillator frequency supplied to the mixers is then adjusted to bring that interferer into the channel bandwidth of the low pass channel filters.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: March 16, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Alan J. Davie
  • Patent number: 6430218
    Abstract: In a communication control apparatus in which the master station transmits a batch transmission frame to a plurality of slave stations and individual response frames are transmitted from the respective slave stations to the master station, the master station previously transmits the batch transmission frame containing the transmission order designation of the slave stations. When each of these slave stations responds to the slave station, the slave stations successively and continuously transmit the response frames to the master station based upon the transmission order designation transmitted from the master station every time the response frame transmission by the slave station prior to the own slave station is accomplished.
    Type: Grant
    Filed: November 28, 1997
    Date of Patent: August 6, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Junichi Mito
  • Patent number: 5719747
    Abstract: An interface unit having a digital hierarchy interface function for a communication device has parts disposed on a printed-wiring board in a Layout to maintain desired interface unit characteristics. The interface unit includes a plurality of parallel B/U converter blocks for converting bipolar signals in a plurality of channels into a plurality of unipolar signals, respectively, a plurality of parallel U/B converter blocks for converting unipolar signals in a plurality of channels into a plurality of bipolar signals, respectively, a connector disposed near the B/U converter blocks for connecting the B/U converter blocks to an external device, a shared processor LSI circuit connected to the B/U converter blocks and the U/B converter blocks and disposed near the U/B converter blocks, for interfacing the signals in the channels at a low speed, and a printed-wiring board supporting the B/U converter blocks, the U/B converter blocks, the connector, and the shared processor LSI circuit.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: February 17, 1998
    Assignee: Fujitsu Limited
    Inventors: Kazuaki Kashiwada, Kenji Joukou, Akihiko Oka