Abstract: A method of detecting interference in a received sample vector using hidden Markov modelling by first estimating noise variance, where estimating noise variance comprises the steps of receiving a sample vector of noise and interference, sorting the sample vector in the frequency domain by order of increasing magnitude to produce an ordered vector, finding a sub-vector of the ordered vector that minimizes the distance from a noise measure, and estimating the noise variance.

Abstract: A method and apparatus for performing demapping in a wireless communication system utilizing a modulo operation are disclosed. The demapping method of a receiver in a wireless communication system includes receiving an input signal and first information indicating whether a first modulo operation is performed on the input signal from a transmitter; if the first information indicates execution of the first modulo operation, performing a second modulo operation of the input signal, and acquiring a reception signal; generating a maximum function value having a highest probability that the reception signal corresponds to a candidate constellation point of an extended constellation; and generating a log-likelihood ratio (LLR) using the generated maximum function value.

Abstract: A multistage difference cyclic permutation unit (106) for performing multistage cyclic permutation, an address administration unit (104) for administering addresses of the cumulative LLR memory (101), a received value arrangement unit (103) for generating records during writing of received values to the cumulative LLR memory (101), and a control unit (110) for generating parameters to control each unit from information of a parity check matrix and the current cyclic permutation size are prepared. The address administration unit (104) controls reading/writing addresses of the cumulative LLR memory (101) based on a reading start address from the cumulative LLR memory (101) corresponding to the column block. After the start of reading of a column block, the control unit (110) generates a reading start address in the next decoding of the column block and stores it into the address administration unit (104).

Abstract: Various embodiments of the present invention provide apparatuses, systems and methods for data detection in a detector with a pruning control system. For example, a data detector is disclosed that includes a first set of counters operable to distinguish prunable data from non-prunable data in the data detector, a second set of counters operable to generate initial values for the first set of counters, and a prune control signal generator operable to generate a prune control signal based on the first set of counters. The second set of counters is operable to generate the initial values at least in part before a syncmark is detected in a data sector. The initial values are used to initialize the first set of counters when the syncmark is detected in the data sector. The prune control signal controls whether the data detector is allowed to prune a trellis.

Abstract: A Viterbi decoder which is based on a special instruction set implemented in the processor, enabling it to handle the Viterbi processing with a much lower CPU loading without significantly increasing the hardware complexity. By careful application of appropriate design constraints specific to the SV navigation and analysis of the Viterbi algorithm an optimised architecture can be realized for embedding Viterbi acceleration logic efficiently into a GNSS chipset.

Abstract: Systems and methods are provided for decision feedback equalization (DFE) in multiple-input multiple-output (MIMO) systems with hybrid automatic repeat request (HARQ). Using a pre-equalization approach, the receiver combines received vectors by vector concatenation before equalization using DFE. Using a post-equalization approach, the receiver equalizes received vectors using DFE before combining the vectors. Cholesky factorization and QR decomposition may be used for DFE.

Abstract: A receiver may be operable to receive an inter-symbol correlated (ISC) signal, and generate a plurality of soft decisions as to information carried in the ISC signal. The soft decisions may be generated using a reduced-state sequence estimation (RSSE) process. The RSSE process may be such that the number of symbol survivors retained after each iteration of the RSSE process is less than the maximum likelihood state space. The plurality of soft decisions may comprise a plurality of log likelihood ratios (LLRs). Each of the plurality of LLRs may correspond to a respective one of a plurality of subwords of a forward error correction (FEC) codeword.

Abstract: Circuitry for use in a receiver may comprise: a front-end circuit operable to receive an orthogonal frequency division multiplexing (OFDM) symbol on a first number of physical subcarriers. The circuitry may comprise a decoding circuit operable to decode the OFDM symbol using an inter-carrier interference (ICI) model, the decoding resulting in a determination of a sequence of symbols, comprising a second number of symbols, that most-likely correspond to the received OFDM symbol, where the second number is greater than the first number. The sequence of symbols may comprise N-QAM symbols, N being an integer. The ISCI model may be based, at least in part, on non-linearity experienced by the OFDM symbol during transmission by a transmitter, propagation over a channel, and/or reception by the receiver. The ISCI model may be based, at least in part, on phase-noise introduced to the OFDM symbol during transmission by a transmitter, propagation over a channel, and/or reception by the receiver.

Abstract: A receiver apparatus includes a first receiver having an input for receiving a first version of a signal received by a first receive antenna. The receiver apparatus further includes a second receiver having an input for receiving a second version of the same signal received by a second receive antenna. The first receiver includes a first constellation demapper for demapping constellation symbols generated in the first receiver into a first soft decision bitstream and the second receiver includes a second constellation demapper for demapping constellation symbols generated in the second receiver into a second soft decision bitstream. A combiner is configured to combine the first soft decision bitstream and the second soft decision bitstream to provide a combined soft decision bitstream.

Abstract: An error correction data processing apparatus includes a noise predictive calibration circuit operable to calibrate a first set of filter coefficients based on a first data set and a second set of filter coefficients based on a second data set, and includes a first noise predictive detector operable to receive the first set of filter coefficients. The apparatus further includes a decoder operable to perform a first global iteration with the first noise predictive detector and determine a violation check count value, and a second noise predictive detector operable to receive the second set of filter coefficients if the violation check count value is less than a predetermined value or receive the first set of filter coefficients if the violation check count value is greater than the predetermined value.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a pattern detection circuit is discussed that includes a distance calculation circuit and a comparator circuit. The distance calculation circuit is operable to calculate a noise whitened distance between a reference signal and a received input to yield a comparison value. The comparator circuit is operable to compare the comparison value with a threshold value.

Abstract: A method and device for detecting a symbol transmitted over a communication channel in a multiple input-multiple output communication system are disclosed. In one aspect, the method includes receiving a symbol transmitted over a communication channel of a multiple input-multiple output communication system. The method may also include searching a subset of possible transmitted symbols, the subset having a predetermined size dependent on properties of the communication channel. The method may also include deciding to which symbol of the subset the received symbol corresponds.

Abstract: A system for handling transmitted electronic information includes a transmitter with an encoder that performs a parity encoding procedure. The encoder creates parity blocks for embedding in transmission packets. The parity blocks may be based upon data segments from one or more of the transmission packets. The system also includes a receiver with a decoder that utilizes the parity blocks for performing a packet validation procedure to identify corrupted packets from among the transmission packets. The decoder also performs a packet reconstruction procedure with selected ones of the data segments and the parity blocks to produce reconstructed data segments for the corrupted packets.

Abstract: Systems and methods are provided for decoding a signal vector in a transmit diversity scheme for varying channels. Information obtained in more than one symbol period are treated as a single received vector, and each of the received signal vectors may be processed to reduce the effects of varying channel characteristics. The received signal vectors may be combined by addition and decoded using a maximum-likelihood decoder. In some embodiments, the received signal vectors are processed separately and then combined. In other embodiments, the received signal vectors are combined and then processed. In some embodiments, zero-forced linear equalization techniques are used to processed the received signals. In some embodiments the signal vectors and varying channel response matrices are broken down to equivalent forms in order to simplify the processing.

Abstract: Systems and methods for processing and decoding TCM/BCM-coded signal vectors. A multi-dimensional signal vector is received by, for example, a TCM or BCM decoder. The TCM/BCM decoder identifies the closest signal points in the signal constellation set, or “nearest neighbors,” for each dimension of the received signal vector. The TCM/BCM decoder then forms a test set that includes a plurality of multi-dimensional test vectors, where each dimension of each test vector is based on an identified nearest neighbor. In particular, each test point in the test set is based on a different combination of the nearest neighbors. The TCM/BCM decoder can compute branch metrics based on only the test points in the test set, and can make detection decisions using the computed branch metrics.

Abstract: Methods and apparatus for efficient demapping of constellations are described. In an embodiment, these methods may be implemented within a digital communications receiver, such as a Digital Terrestrial Television receiver. The method reduces the number of distance metric calculations which are required to calculate soft information in the demapper by locating the closest constellation point to the received symbol. This closest constellation point is identified based on a comparison of distance metrics which are calculated parallel to either the I- or Q-axis. The number of distance metric calculations may be reduced still further by identifying a local minimum constellation point for each bit in the received symbol and these constellation points are identified using a similar method to the closest constellation point. Where the system uses rotated constellations, the received symbol may be unrotated before any constellation points are identified.

Abstract: A method uses a set of reference symbols. The method includes receiving a first symbol, comparing the first symbol to the set of reference symbols, and selecting a reference symbol from the set of possible reference symbols. The set of reference symbols are adjusted by a set of respective error factors for each of the reference symbols. The reference symbol is selected when it matches the first symbol. The method also includes adjusting the respective error factor for the reference symbol in accordance with a difference between the first symbol and a remodulated reference symbol in one embodiment.

Abstract: A method and system for a sequence estimation in a receiver, such as for use when receiving a sample of a received inter-symbol correlated (ISC) signal corresponding to a transmitted vector of L symbols, with L being a integer greater than 1, and with symbol L being a most-recent symbol and symbol 1 being least recent symbol of the vector. A plurality of candidate vectors may be generated, wherein element L-m of each candidate vector holding one of a plurality of possible values of the symbol L-m, with m is an integer greater than or equal to 1, and elements L-m+1 through L of each candidate vectors holding determined filler values. A plurality of metrics may be generated based on the plurality of candidate vectors, and based on the generated plurality of metrics, a best one of the possible values of the symbol L-m may be selected.

Abstract: Teachings presented herein offer improved symbol block detection by including a decoder unit in a demodulation system. Utilizing a decoder unit in a demodulation system can significantly enhance symbol block detection because the decoder can produce bit likelihood values (soft bit values), and these bit likelihood values can be used to construct a set of candidate symbol values. Advantageously, this set of candidate symbol values is more likely to contain the actually transmitted symbol(s) than if the decoder unit was not used in the demodulation system.

Abstract: The present technology provides noise reduction of an acoustic signal using a configurable classification threshold which provides a sophisticated level of control to balance the tradeoff between positional robustness and noise reduction robustness. The configurable classification threshold corresponds to a configurable spatial region, such that signals arising from sources within the configurable spatial region are preserved, and signals arising from sources outside it are rejected. In embodiments, the configurable classification threshold can be automatically and dynamically adjusted in real-time based on evaluated environmental conditions surrounding an audio device implementing the noise reduction techniques described herein.

Abstract: Methods and apparatus for demodulating data symbols received over a communication channel. One method includes receiving a data symbol y over a communication channel h, where the received data symbol y corresponds to a transmitted data symbol x. The method further includes determining an estimate of the communication channel h. The method further includes determining a measure of a channel estimation error corresponding to the estimate of the communication channel h. The method further includes determining a likelihood value for a bit in the transmitted data symbol y based at least in part on the measure of the channel estimation error.

Abstract: The present invention is related to systems and methods for data processing system characterization.

Abstract: Embodiments of the present invention relate to the detection of synchronization marks in data storage and retrieval. According to one embodiment, synchronization marks are detected from the output of a matched filter, upstream of the Viterbi detector. This approach avoids the delay associated with the latency of the Viterbi output, thereby allowing time to align parity framing and to properly start the time-varying trellis. Certain embodiments disclose 34- and 20-bit primary synchronization marks located at the beginning of a data region. Other embodiments disclose 16-, 20-, and 24-bit embedded synchronization marks located within a data region.

Abstract: This invention relates to a method and a circuit for estimating the bit error rate in a data transmission system. Symbols are detected (u) by a maximum likelihood detector (1), which provides path metrics of the decoded path and the best competitor at predetermined symbol positions. Absolute path metric differences (2) are calculated between the decoded path and the best competitor at said predetermined symbol positions. Events (5) are counted when an absolute path metric difference (2) is equal to one of a set of difference values. The bit error rate is estimated based on the number of counted (4) events (5). The invention further comprises a method and a circuit in which a function is applied onto said absolute path metric difference. The function maps quantized logarithms of probabilities to probabilities.

Abstract: A communication system utilizing a hierarchically modulated signal and method thereof are provided, wherein a receiver system is configured to receive a hierarchically modulated signal. The receiver system includes a receiver device configured to receive the hierarchically modulated signal, which is a function of a time domain, and including a high priority data stream that has a single carrier type modulation, and a low priority data stream having data bits that are spread over a plurality of data symbols of a high priority data modulation. The receiver system further includes a low priority processor device, which includes an OFDM decoder configured to convert the low priority data stream of the hierarchically modulated signal that is a function of the time domain to be a function of a frequency domain by utilizing a FFT, such that an output is emitted that is representative of the low priority data stream.

Abstract: The present invention is directed to reduction of operation amount of likelihood calculation (LLR calculation) in a communication apparatus for performing communications using an extended mapping in which a plurality of bit sequences are assigned to a single symbol point. A receiving unit receives a signal which is transmitted from a transmitting unit by using the extended mapping. A repetition process unit decodes the received signal from the receiving unit by calculating an LLR of the received signal and performing a repetition process. In this case, the LLR is calculated for every bit using a MAX?LOG approximation and a thus-derived approximation formula is multiplied by weighting factors corresponding to proportions of “0” and “1” in each bit assigned to a symbol point closest to the received signal.

Abstract: A circuit includes a first Viterbi detector configured to generate a first estimate signal based on an equalized signal. The first estimate signal includes preliminary non-return-to-zero data estimates. A first filter is configured to generate a first filtered signal based on a preliminary decision signal. The preliminary decision signal is generated based on the first estimate signal. A second Viterbi detector is in communication with the first Viterbi detector. The second Viterbi detector is configured to generate a final decision signal based on a sum of (i) a delayed version of the equalized signal, and (ii) the first filtered signal, wherein the final decision signal comprises final non-return-to-zero estimates.

Abstract: A method and apparatus for measuring channel quality over which has been transmitted a sequence of symbols produced by encoding and constellation mapping a source data element sequence. A sequence of received symbols is received over the channel. The sequence of received symbols is de-mapped based on a first channel quality indicator previously transmitted to a transmitter of the sequence of symbols. The de-mapped symbols are decoded to produce a decoded output sequence. In some embodiments, the decoding may be based on the first channel quality indicator. The decoded output sequence is re-encoded to produce a re-encoded output sequence. The de-mapped symbols are correlated with the re-encoded output sequence to produce a second channel quality indicator. The second channel quality indicator is transmitted to the transmitter to adaptively select a type of mapping based on the second channel quality indicator.

Abstract: A MAP decoder may be implemented in parallel. In one implementation, a device may receive an input array that represents received encoded data and calculate, in parallel, a series of transition matrices from the input array. The device may further calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector. The device may further calculate, in parallel and based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array.

Abstract: A method, implementable on a multiple-input, multiple-output symbol receiver, includes selecting a hypothesis for a second symbol value U2 from among the set of fixed constellation points, calculating a hypothesis for a first symbol value U1 from the resultant selected U2 value, and generating a first half of counter-hypotheses from interim results of calculating the hypotheses values.

Abstract: A reception apparatus including: a receiver configured to receive a symbol including a plurality of bits and to calculate each of likelihoods for each of the plurality of bits, and a processor configured to quantize each of the likelihoods based on each of numbers of quantization bits for each of the plurality of bits, wherein all of the numbers of quantization bits are not same.

Abstract: There is provided a communication apparatus, including a transmission pattern generation unit that generates a transmission pattern according to a modulation method, a metric calculation unit that calculates an inter-signal distance between a received signal vector of received signals and an estimation vector, which is a product of channel information and the transmission pattern, a maximum likelihood pattern determination unit that determines a maximum likelihood signal pattern from the inter-signal distance calculated by the metric calculation unit, and an error estimation unit that estimates a phase error component and an amplitude error component contained in the received signal vector. The metric calculation unit calculates the inter-signal distance between the received signal vector and the estimation vector by using the phase error component and/or the amplitude error component estimated by the error estimation unit.

Abstract: Aspects of a method and system for decoding single antenna interference cancellation (SAIC) and redundancy processing adaptation using burst process are provided. A wireless receiver may decode bit sequences based on a first decoding algorithm that may utilize redundancy in the data and that may impose physical constraints. The receiver may also decode a received bit sequence based on a second decoding algorithm that utilizes SAIC. Received data may be processed in a burst process portion in either decoding algorithm. Burst processed data from one of the decoding algorithms may be selected based on signal-to-noise ratio and/or received signal level measurements. The selected burst processed data may be communicated to a frame processing portion of the corresponding decoding algorithm.

Abstract: The various embodiments provide circuitry and methods for packing Log Likelihood Ratio (“LLR”) values into a buffer memory in a compressed format which reduces the amount of buffer memory required. Various embodiments use a type of quantization which reduces the bit width of the LLR values that are stored, with the particular level of quantization depending upon the code rate of the data. The degree, pattern, and periodicity of bit width compression employed may depend upon the code rate of the received transmission. Bit width patterns use for LLR value quantization may be generated by a shift register circuit which provides an efficient mechanism for controlling an LLR packer circuit based upon the code rate of the received signal.

Abstract: Wireless receiver and method of operating a wireless receiver in a wireless communication network for: receiving a signal, the received signal comprising data containing at least one symbol from a symbol alphabet, the symbol alphabet consisting of complex values that define a direction in the complex plane, the received signal further comprising interference; measuring the variance of a first component of the received signal that is perpendicular to the defined direction in the complex plane; estimating the interference power of the received signal using the measured variance of the first component of the received signal; estimating a total power of the received signal; estimating the power of the at least one symbol of the received signal by subtracting the estimated interference power from the estimated total power of the received signal; and based on the estimated interference power and the estimated power of the at least one symbol of the received signal, performing at least one of the steps of: processin

Abstract: The present invention provides a method for identifying a specific number of communicating points having relatively smallest accumulated path values from a plurality of transmitting points for a receiving point in a communication system. The method includes steps of: (a) defining a first coordination of each of the plurality of transmitting points and the receiving point on a complex plane; (b) transferring the first coordination of the receiving point to a second coordination thereof, in which the second coordination of the receiving point is near an origin of the complex plane; and (c) identifying the specific number of transmitting points having relatively smallest accumulated path values based on the second coordination of the receiving point.

Abstract: Decoder and communications devices including such decoders can obtain a convolutional coded bit stream including a plurality of coded data bits. According to some implementations, if a signal quality associated with the convolutional coded bit stream is above a predetermined threshold, a decoded value for each information bit may be calculated at least from a modulo 2 sum of a coded data bit added to at least one other coded data bit, at least one previously calculated information bit, or a combination of at least one other coded data bit and at least one previously calculated information bit. Also, according to some implementations, if the signal quality associated with the convolutional coded bit stream is not above the predetermined threshold, the convolutional coded bit stream may be decoded with a conventional convolutional decoding scheme. Other aspects, embodiments, and features are also claimed and described.

Abstract: Decoders and communications devices including such decoders can obtain a convolutional coded bit stream including a plurality of coded data bits. The convolutional coded bit stream may be coded according to one or more generator polynomials such that each information bit is related to two or more coded data bits in a manner to be determinable from a mathematical combination of the two or more coded data bits of the convolutional coded bit stream. A priori information associated with each information bit can be calculated based at least in part on the mathematical combination of the two or more coded data bits. Employing the a priori information, a binary value for each information bit can be calculated. Other aspects, embodiments, and features are also claimed and described.

Abstract: The accumulating decoding architecture described herein is applicable to LDPC codes operating on a parity check matrix, H, consisting of CSI (Cyclic Shifted Identity) sub-matrices (or matrix sub-blocks) or permuted identity sub-matrices (or matrix sub-blocks). In such a structure, the entire LDPC matrix is broken into square sub-matrices such that each sub-matrix consists of either a CSI sub-matrix or a permuted identity sub-matrix, or a null matrix. The iterative decoding process operates by updating of APP (a posteriori probability) or gamma (?) values and check edge message (?) values, and this by updating one or more individual rows within a number of sub-matrix rows (or all sub-matrix or sub-block rows) are processed in parallel. The amount of parallelism is specified by the designer and is typically an integer divisor of the sub-matrix (or sub-block) size.

Abstract: A receiver for discrete Fourier transform-spread-orthogonal frequency division multiplexing (DFT-S-OFDM) based systems, including a prefilter for received signal codeword(s); and a log-likelihood ratio LLR module responsive to the prefilter; wherein the prefilter includes a pairing and whitening module that based on channel estimates and data rate enables the LLR module to perform either a Serial-In-Serial-Out (SISO) based log likelihood ratio processing of an output from the paring and whitening module or a two-symbol max-log soft output demodulator (MLSD) based log likelihood ratio processing of an output from the pairing and whitening module.

Abstract: A sequence estimator is described. In one embodiment, the sequence estimator includes a plurality of maximum a posteriori probability (MAP) decoding engines each arranged to process a series of windows of a transmitted signal where state metrics produced for an end of one window by one decoding engine are re-used for the initialization of a state metric calculation process performed by another decoding engine on another window of the signal.

Abstract: The computation of code-specific channel matrices for an Assisted Maximum Likelihood Detection (AMLD) receiver comprises separately computing high rate matrices that change each symbol period, and a low rate matrix that is substantially constant over a plurality of symbol periods. The high and low rate matrices are combined to generate a code-specific channel matrix for each receiver stage. The high rate matrices include scrambling and spreading code information, and the low rate matrices include information on the net channel response and combining weights. The low rate matrices are efficiently computed by a linear convolution in the frequency domain of the net channel response and combining weights (with zero padding to avoid circular convolution), then transforming the convolution to the time domain and extracting matrix elements. Where the combining weights are constant across stages, a common code-specific channel matrix may be computed and used in multiple AMLD receiver stages.

Abstract: A method for soft remodulation in a receiver of transmissions over a wireless telecommunication system, the method including obtaining from a FEC decoder a-posteriori LLR values, converting the a-posteriori LLR values into bit probabilities and computing improved soft symbols estimates as expected values using the bit probabilities in a recursive algorithm. Preferably, the step of converting is implemented using a pre-computed Look Up Table (LUT). Preferably, the step of computing is implemented in a Multiplier-Accumulator having a SIMD structure.

Abstract: A joint soft output ML receiver that is able to reduce interference based on partial transmission information (i.e., without knowing the existence of other layers or other users and their modulation schemes) is described. In one implementation, the partial information based joint ML receiver can achieve performance that is similar to full information based joint ML receivers even when full information regarding the interfering UE is not available at the desired UE due to transparent Multi-user Multiple Input and Multiple Output (MU-MIMO) transmission (such as with TM 8 and TM 9 transmissions in EUTRA LTE).

Abstract: A set of one or more receiver parameters is adjusted. It is determined whether to adjust the set of receiver parameters. In the event it is determined to adjust the set of receiver parameters, a new set of values is generated for the set of receiver parameters using a cost function (where the cost function does not assume a noise signal in a receive signal to have a particular statistical distribution) and the set of receiver parameters is changed to have the new set of values.

Abstract: A de-interleaver generates a plurality of De-interleaved Reorder Physical (DRP) addresses to simultaneously write a corresponding plurality of LLR values into a multi-banked memory such that not more than one LLR value is written into each bank of the multi-banked memory at a time. A sequence of such parallel writes results in the LLR values of a transmission of a sub-packet being stored in the memory. Address translation performed during generation of the DRP addresses causes the LLR values to be stored within the banks such that a decoder can read LLR values out of the memory in a de-interleaved sequence. Each memory location of a bank is a word-location for storing multiple related LLR values, where one LLR value is stored along with its parity values. The ability to simultaneously write to multiple LLR values is used to clear locations in a fast and efficient manner.

Abstract: A Software Defined Radio (SDR) subsystem capable of supporting a multiple communication standards and platforms for modulation, demodulation and trans-modulation of an input signal is provided. The SDR subsystem includes a Signal Conditioning Cluster (SCC) unit that includes a signal conditioning CPU adapted for sample based signal processing, a Signal Processing Cluster (SPC) unit that includes a signal processing CPU adapted for block based signal processing, and a Channel Codec Cluster (CCC) unit that performs a channel encoding or a channel decoding operation.

Abstract: In one aspect, the present invention improves Turbo equalization and/or soft interference cancellation processing in communication receivers by providing an efficient and accurate technique to compute the second moment of a received symbol, e.g., an interfering symbol, as a function of the expected bit values of only those bits in the symbol that are magnitude-controlling bits according to a defined modulation constellation. Advantageously, the expected bit values in at least one embodiment are computed using a LUT that maps bit LLRs to corresponding hyperbolic tangent function values. Further, the expected symbol value is computed as a linear function of terms comprising the expected bit values and the soft symbol variance is efficiently computed from the second moment and the expected symbol value squared. This simplified processing reduces receiver complexity, particularly in the context of modulation constellations having non-constant magnitudes, and thus saves power and/or improves design economics.

Abstract: A receiver of a wireless communication system and method thereof include antennas configured to receive data, wherein the data comprises a preamble, a header, and a payload. The receiver also includes a synchronizer configured to perform time synchronization of the data received through corresponding paths of each antenna using corresponding preambles of the data. The receiver includes a header detector configured to detect a header from the data of each of the paths. A surviving path selector in the receiver is configured to select a signal of a surviving path from among the paths based on the header or the preamble. The receiver also includes combiner configured to combine the signal existing in the surviving path to demodulate the payload.

Abstract: A method of estimating coarse frequency offset of received symbols based on a received frequency domain sample at a kth sub-carrier of a 53rd Orthogonal Frequency Division Multiplexing (OFDM) data symbol in a jth time slot (TS) of a receiver in a China Multimedia Mobile Broadcasting (CMMB) mobile television communication network includes dividing a received sample, Ykj, into two sets of noise only tones and data plus noise tones Dkj, obtaining a received sample only if there is a coarse frequency offset mismatch between a transmitter and the receiver, dividing a summation of a power of the data plus noise tones by a summation of a power of the noise only tones to obtain ?kj, and estimating an integer coarse frequency offset estimate, ?{circumflex over (f)}Ij, of the received symbols when the ?kj is a maximum.