Abstract: A receiver comprising at least one micro-electromechanical system (MEMS) antenna-select switch, a MEMS filter bank communicatively coupled to the antenna-select switch and a plurality of intermediate frequency modules communicatively coupled to the MEMS filter bank and the non-MEMS filter array, wherein each independent channel supported by the receiver has at least one associated intermediate frequency module.

Abstract: A telecommunications transmitting device, including: an encoder configured to generate an initial signal formed by at least one reference sequence including an initial integer number of pulses dispatched over a same integer number of time windows; a transmitter configured to transmit the initial signal to a receiver; a demodulation device configured to determine that no acknowledgement from the receiver in response to the initial signal is received; and a processing unit configured to tune a second integer number of pulses constituting a second reference sequence, the second integer number being larger than the initial integer number, wherein the transmitter is configured to transmit a second signal formed by the second reference sequence including the second integer number of pulses dispatched over a same integer number of time windows.

Abstract: A method of performing cell search includes receiving a primary synchronization signal (PSS) comprising a primary synchronization code (PSC), and receiving a secondary synchronization signal (SSS) comprising a first secondary synchronization code (SSC) and a second SSC. The first SSC and the second SSC are respectively scrambled by using a first scrambling code and a second scrambling code, and the first scrambling code and the second scrambling code are associated with the PSC. Detection performance on synchronization signals can be improved, and cell search can be performed more reliably.

Abstract: A method is disclosed, including identifying a preamble in a frame, where the preamble has a preamble length 1. M data items received in succession are stored. The m data items once divided into n portions, where the data items in each portion have respectively been received at successive times and where m and n are natural numbers and the following applies to m and n: m>n, m>1, n>1. The n portions are respectively correlated to the expected values to form component correlation results. Delaying the component correlation results, with at least two component correlation results being delayed by different lengths. The method also includes combining the delayed component correlation results to form a total correlation value. The total correlation value is used to determine whether the m received data items contain the preamble of a frame.

Abstract: A method of performing cell search includes receiving a primary synchronization signal (PSS) comprising a primary synchronization code (PSC), acquiring an unique identity from the PSS, receiving a secondary synchronization signal (SSS) which is associated with a cell identity group, the SSS comprising two secondary synchronization codes (SSCs) and acquiring a cell identity which is defined by the unique identity within the cell identity group, wherein the two SSCs are respectively scrambled by using two different scrambling codes. Detection performance on synchronization signals can be improved, and cell search can be performed more reliably.

Abstract: A signal reception time period detector is disclosed. The signal reception time period detector includes a signal separation portion configured to decompose into signal components a received signal composed of plural signals which are overlapped at least partially in a period during which the received signal is transmitted, and a reception time period detection portion configured to detect a time period during which the signal components are received based on the signal components.

Abstract: A detected signal 111 contains a preamble portion which includes symbol alternations, followed by a unique word portion, and a data portion. Each time a symbol alternation is detected, a correction value calculation section 102 averages the phase shift in the detected signal 111 for a predetermined length, thereby calculating a correction value 115. The correction value determination section 103 stores a plurality of correction values 115 in a chronological order. When the unique word portion is detected, the correction value determination section 103 retains, as an effective correction value 118, a correction value which is arrived at by going back a predetermined number of correction values among the stored correction values. A phase rotation section 104 corrects the phase of the detected signal 111 by using an effective correction value 118 calculated by the correction value determination section 103.

Abstract: A base point of a communication frame is detected by only using a reception signal, and an offset amount from the base point and the like are estimated. A device includes: an extraction unit for extracting self correlation processing signals from a digital communication signal having a signal frame for synchronization by using a pair of correlation processing windows of a variable size; a correlation unit for performing self correlation processing to the self correlation processing signals extracted; a matching unit for performing pattern matching processing between the correlation-processed signal, obtained through the self correlation processing, and a reference signal; and a computation unit for estimating the base point of the signal frame and an offset of the digital communication signal with respect to the base point, based on distance information of the pattern matching processing.

Abstract: A method and an apparatus are provided, the apparatus includes a correlator configured to correlate samples of a frame format signal with a reference signal; an adder block configured to sum the correlation results over a given time period; a comparator configured to compare the sum with a given reference value; a controller configured, if the sum exceeds the reference value, to make the decision that a frequency correction channel has been detected, store the position of the frequency correction channel in the frame format signal and cease the correlation process; and otherwise configured to control the correlation and comparison to continue until the time reserved for the correlation process ends, to retain the value in the adder block; and to control the apparatus to resume the above process when a new time reserved for the correlation process is due.

Abstract: A symbol clock recovery subsystem uses a tap delay line having a set of delays, uses a clock bank of samplers providing time-staggered sampled noncoherently received signals, and uses a set of mean magnitude generators, in channelized form, for providing a set of mean magnitudes to a maximum selector for selecting a maximum one of the time-staggered sampled received signals having the greatest signal to noise ratio so as to provide a signal effectively occurring at symbol epoch time for demodulating a symbol stream in a digital communication system receiver.

Abstract: The invention relates to N subcarriers of an OFDM communication system or OFDM based multi-carrier communication system M subcarriers used as cancellation subcarriers to achieve side lobe suppression of the OFDM transmission signal, where M<N. The M cancellation subcarriers are scaled with a generally complex weighting factor. Determining the weighting factor is performed in accordance with a suitable optimization criterion. Application in OFDM-based wireless and wired communication systems.

Abstract: A method for determining transfer rate comprising selecting a first transfer rate of a plurality of transfer rates, transmitting a message at the first transfer rate over a Consumer Electronics Control (CEC) line of a High Definition Multimedia Interface (HDMI) network, determining whether an acknowledgment to the message having been transmitted at the first transfer rate is received, storing, in the event the acknowledgment to the message having been transmitted at the first transfer rate is received, the first transfer rate and storing, in the event no acknowledgment is received, a default transfer rate of the plurality of transfer rates.

Abstract: A guard section length detection method is disclosed. In the method, a guard section length detection method is used in an OFDM system. The OFDM symbol includes a data interval having a first length, and a guard section having a guard section length. The method detects a first symbol boundary and a second symbol boundary, and determines the guard section length based on a length between the first symbol boundary and the second symbol boundary.

Abstract: A digital modulator in a radio transmitter includes circuitry for switching between Gaussian Minimum Shift Keying (GMSK) and Phase-Shift Keying (PSK) while maintaining spectral mask requirements. The digital modulator of the present invention includes both GMSK and PSK symbol mappers that produce PSK in-phase and quadrature symbols and GMSK symbols, respectively, to a pulse shaping block. Based on opposite phases of a modulation control signal, the symbol mappers produce either modulated data or a steam of logic zeros to the pulse shaping block. The pulse shaping block filters the received data and multiplexes the data so that each modulated data stream receives non-zero data during a guard time to avoid abrupt changes in the modulated signal that would violate the spectral mask requirements.

Abstract: Generating frequency coherence between a received reference positioning signal carrier component transmitted by at least one reference transmitter and a unique positioning signal carrier component generated by a positioning-unit device. The positioning-unit device receives a reference positioning signal and measures a frequency offset of the reference positioning signal carrier component relative to a common oscillator. Once a frequency offset is measured, the positioning-unit device adjusts a frequency steerable clock by an amount derived from the measured frequency offset. The positioning-unit device then generates a unique positioning signal carrier component at an aligned carrier frequency with the reference positioning signal carrier component. Furthermore, the positioning-unit device continuously adjusts the unique positioning signal carrier component by applying the measured frequency offset to the frequency steerable clock, which is reference to the common oscillator.

Abstract: A first serial transceiver has a reference clock, a first transmitter, and a first receiver. The first receiver includes (i) a phase detector, and (ii) a phase rotator. The phase rotator is driven by the reference clock. A first multiplexer is coupled to the first receiver. The first multiplexer receives the phase detector output and a control signal. When the first serial transceiver is in a test configuration, the first multiplexer passes the control signal to the phase rotator, thereby varying the frequency of the phase rotator output. A second multiplexer is coupled to the first transmitter. The second multiplexer receives a reference clock signal and the phase rotator output. When the first serial transceiver is in a test configuration, the second multiplexer passes the phase rotator output to the first transmitter. The first transmitter thereby transmits a serial data stream that varies in frequency from said reference clock.

Abstract: Methods and systems for determining operating bandwidth in a multi-bandwidth communication system are provided. Determining operating bandwidth in a multi-bandwidth communication system includes receiving a signal having a first signal portion at a first, predetermined bandwidth. The signal contains an indication of an operating bandwidth selected from a plurality of bandwidths used for a further signal portion. The indication is recovered from the first signal portion at the predetermined bandwidth. The information is recovered from the further signal portion at the operating bandwidth indicated by the indication.

Abstract: A parametric form of G-Rake and chip equalization for closed-loop transmit diversity is provided, that accounts for impairment correlation between transmit antennas. In a closed-loop transmit diversity system, the base station transmits a signal from two or more antennas, using one of a predetermined set of relative phase offsets at one of the antennas. The parametric estimation of the impairment or data covariance is performed by summing terms, including a term for each possible phase offset. The terms are weighted by fitting parameters. The fitting parameters are jointly solved by fitting the impairment or data covariance estimate to a measured impairment or data covariance. In another aspect, a measured impairment covariance is formed by exploiting a special relationship between the pilot channels of the different transmit antennas.

Abstract: A method and apparatus for receiving data in a communication system is disclosed. Receiving a first signal from a transmitter, a first canceller cancels from the received first signal a second signal desired to be received from the transmitter. A second canceller detects and cancels an interference signal from the second signal-canceled first signal. A calculator calculates a Log Likelihood Ratio (LLR) of the interference signal-canceled first signal.

Abstract: Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.

Abstract: A simplified architecture is disclosed for use in wireless receiver applications, particularly for ADC conversion of received in-phase I and quadrature Q signals. Circuit area is substantially reduced by sharing a single ADC to convert both signals, switching the ADC input alternately between the i and q signals. In an embodiment, the ADC is clocked at an increased sample rate, and the digital output signals are aligned to compensate for the phase difference resulting from the implementation of a single ADC.

Abstract: A receiver including a channel estimation function in which an initial channel estimate is filtered to increase receiver operation, particularly when the receiver may only have a limited number of channel estimation symbols with which to form the channel estimate. In some embodiments the filtering is performed by transforming the initial channel estimate to the time domain, zeroing some of the samples to filter the time domain channel estimate, and transforming the filtered time domain channel estimate to the frequency domain for use in channel compensation.

Abstract: An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.

Abstract: Disclosed are a channel estimation method and a channel estimation apparatus, and a receiver using the same. The channel estimation apparatus provided in the receiver detects pilot signals from radio signals and estimates channels of the detected pilot signals. The channel estimation apparatus estimates channels corresponding to data by conducting linear interpolation, which allows for simultaneous interpolation in time and frequency axes, by use of information on the estimated pilot channels. Thus, the memory capacity required for the receiver can be reduced using channel estimation in which the simultaneous interpolation is conducted. Also, the performance of the receiver can be further improved in a wireless environment where the receiver moves at high speed.

Abstract: According to one embodiment, a run length limiting apparatus comprises an input section configured to input, a digital data string including a predetermined number of symbols which have the same number of bits, a search section configured to search for a specific symbol having a pattern that does not match any of the symbols included in the input digital data string, a calculation section configured to perform an exclusive OR operation between the specific symbol searched for and each of the symbols included in the input digital data string, and an output section configured to output the calculated digital data string together with the specific symbol.

Abstract: Methods and Systems for tracking symbol timing of an OFDM signal are disclosed. In one embodiment, a wireless receiver includes signal tracking and timing logic to facilitate the timing of a demodulation operation such that the demodulation operation occurs on the proper symbol boundary, particularly when the OFDM signal has multipath components and the second component has greater power than the first.

Abstract: Provided is a channel estimation apparatus and method. In the channel estimation apparatus, a channel estimator performs channel estimation onto a received symbol and output a channel estimation result. The channel estimation result is stored in an estimation buffer along with a channel estimation result compensated in a preamble phase compensator. The preamble phase compensator receives a channel estimation result for pilot subcarriers of a data symbol and a preamble channel estimation result from the estimation buffer, acquires a phase rotation value between them, and compensates the preamble channel estimation result with the phase rotation value. When FCH and DL-MAP are demodulated, pilot subcarriers in the Nth PUSC symbol have been used to estimate the channel of the Nth PUSC symbol.

Abstract: The present invention provides a method and apparatus for detecting and decoding data. The method comprises: receiving a set of data signals from an external data source; detecting a size of said received set of data signals; decoding said received set of data signals; extracting a destination address from said set of data signals; comparing said destination address extracted from said data signals to a known data value; determining whether said received data signals should be received by a host circuitry based upon said comparison of said destination address extracted from said data signals to a known data value; generating at least one status signal alerting said host circuitry of said determination that said received data signals should be received by said host circuitry; and waking up said host circuitry upon a determination that said received set of data is addressed to said host circuitry.

Abstract: A communication system for determining a target calibration parameter for calibrating impairments in a transmission signal is disclosed. The communication system includes a carrier signal generator, a transmitting module, a testing signal generator, a power detection unit, and a calibration apparatus. The testing signal generator generates a first testing signal to the first transmitting path of the transmitting module or a second testing signal to the second transmitting path of the transmitting module according to a single tone signal having a specific frequency or according to combinations of a DC value and the single tone signal. The power detection unit detects power of components associated with the specific frequency in the transmission signal to generate a power indicating signal. The calibration apparatus applies a first candidate calibration parameter to reference a first power indicating signal corresponding to the first candidate calibration parameter to determine the target calibration parameter.

Abstract: For a given channel and a filter having at least one filter tap, a set of at least one weight value is determined for the at least one filter tap according to which at least one weight value substantially minimizes a gradient of a frequency response for the given channel and substantially maximizes energy of the frequency response for the given channel within a predetermined bandwidth.

Abstract: A peak detector provides repeatable and accurate measurements of the signal amplitude for variable frequencies of input signals. The peak detector includes a pulse edge generator circuit that generates a pulse edge signal in response to the signal peaks of an input signal and a sampler circuit that is triggered to sample the input signal by the pulse edge signal. The pulse edge generator circuit compares the input signal with a delayed version of the input signal to produce a differential signal and generates the pulse edge signal using the differential signal. An analog or digital sampler is triggered by the pulsed edge signal to measure the information, e.g., peak value, of the input signal. One or more delay circuits may be used to align the edges of the pulsed edge signal with the peaks of the input signal.

Abstract: A low emission signal manipulating circuit for reducing emission of a given signal. This is accomplished by manupulating the signal and recovering the original signal. The inventive device includes a transmitter which modifies a given signal, a divider that resides in transmitter which divides the incoming signal, a pulse shaping circuit which generates two pulses one at the leading edge and one at the trailing edge of the incoming signal, a receiver which recovers the original signal from the modified signal, a register which generates a signal based on incoming pulses, a phase locked loop circuit that generates a signal at the output. Transmitter has a divider circuit that divides the incoming signal. It also has pulse circuits where two pulses are generated. Divider has five flip flops that divides the incoming signal's frequency by a predetermined amount. Pulse shaping circuit has two integrators and logic gates. Receiver has a register circuit and phase locked loop. Register has a flip flop.

Abstract: A method and system for improving reception in wired and wireless systems through redundancy and iterative processing are provided. A multilayer decoding process may comprise a burst process and a frame process. Results from a first burst process may be utilized to generate a decoded bit sequence in the frame process. The frame process may utilize redundancy information and physical constraints to improve the performance of a decoding algorithm. Results from the frame process may be fed back for a second iteration of the burst process and of the frame process, to further improve the decoding operation. In some instances, the second iteration of the burst process may be based on a gradient search approach.

Abstract: Method for the estimation of channel parameters in a wireless communication system. In accordance with the method several levels of the wireless channel parameters estimation take place to address the specific requirements of the channel. Based on the level of estimation required an appropriate estimation algorithm is selected to achieve the desired results. The evaluation of the channel state and thereafter determining the appropriate parameter estimation requirements provide for a superior overall performance of the wireless system.

Abstract: A method of determining at least one channel for channel response in a wireless communication system is disclosed. More specifically, the method comprises receiving a plurality of signals from a transmitting end, wherein the signals comprise a plurality of pilot symbols and a plurality of data symbols, determining weight value of each pilot symbol, assigning the determined each weight value to each pilot symbol, and demodulating each data symbol by using respective information of the weight value corresponding to each pilot symbol.

Abstract: A data processing apparatus able to start decoding at a timing earlier than the conventional timing and able to reduce the storage capacity required for a storing means for storing the encoded data until a decoding side decodes the input encoded data in comparison with the conventional storage capacity, which apparatus selects frame data from frame data f(5) having the last decoding order to frame data f(0) having the first decoding order for processing for calculating a delay time min_delay and calculates the delay time min_delay. It calculates the delay time min_delay indicating the delay time from when the decoding side starts to receive input of the frame data to when the data is decoded based on the specified size and the bit rate of the input of the frame data to the decoding side for each of the frame data for processing.

Abstract: A communications apparatus which ensures a predetermined communication quality even when an external environment changes dynamically, and enhances a throughput for overall system, thereby achieving favorable transmission efficiency. A communications apparatus having a receiver and a transmitter and carries out sending/receiving by use of a pulse train is provided with a communication environment measuring section to measure a communication status based on an output from the receiver. The transmitter is configured such that it transmits a transmission signal, in which the transmission rate of data to be transmitted and the pulse energy have been controlled in association with each other, according to a result of the measurement.

Abstract: A telecommunication system including a receiver to receive a signal including a sequence of Np pulses, each pulse included in a separate time window, and each pulse enclosed within a time chip whose position within the corresponding time window is defined by a chip number that is included in a known signature; and a detector configured to detect Np pulses in each of the separate time windows by using Np detection windows, a location of the detection windows defined by the known signature, the detection windows being shorter than the separate time windows, and longer than the time chip duration of the time chips, to search an expected pulse sequence.

Abstract: A wired signal receiving apparatus including a signal receiver, a signal peak detector, and a signal comparator is disclosed. The signal receiver includes an operation current detecting circuit for detecting an operation current. The signal receiver further receives a transmission signal. The signal peak detector receives the operation current, detects a peak thereof, and generates a peak current. The signal comparator compares a reference signal and the peak current to generate an output current for regulating the operation current.

Abstract: Time is transferred from an ultra wideband (UWB) transmitter to UWB receiver by transmitting a signal structure having an associated timing reference point together with a time value for the timing reference point. The UWB receiver receives the timing signal structure by synchronizing a receiver time base to the signal structure, demodulating the time value information, and using the demodulated time value information to set a receiver clock value. Propagation delay information is used to adjust the receiver clock value by advancing the receiver clock value to account for the propagation delay. In one embodiment, propagation delay is determined from a known distance between the transmitter and receiver. In another embodiment, the transmitter and receiver are part of a two-way link wherein propagation delay is measured by round trip timing measurements.

Abstract: The present invention relates to receiver equipment with AC-coupled receiver circuits and AC coupling filters. A switch connected between a first stage and a second stage among the receiver circuits is adapted to switch from a high coupling corner frequency, for rapid settling of a signal during preparation of data reception, to a low corner frequency, for low signal distortion during data reception. The receiver circuits are adapted to use known properties in the signal to perform the switch at a time when the short term DC-components of the signal are as low as possible.

Abstract: In a high-precision signal detection apparatus and method for a high-speed receiver, signal detection occurs asynchronously of the incoming data. A comparison clock is generated by an oscillator whose effective capacitance is varied by a second, lower speed oscillator connected to the capacitance. This prevents the asynchronous sampling that occurs in a zero-crossing position in the incoming data from remaining in that position in subsequent sampling cycles, so that a valid signal is not missed by the detector.

Abstract: A pulse modulator has a subtraction stage that produces a control error signal from the difference between a complex input signal and a feedback signal. A signal conversion stage converts the control error signal to a control signal. The control signal is multiplied by a complex mixing signal at the frequency ?0 in a first multiplication stage. At least one of the real and imaginary parts of the up-mixed control signal is then quantized by a quantization stage to produce a real pulsed signal. The pulsed signal is then employed to produce the feedback signal for the subtraction stage in a feedback unit. The pulse modulator according to the invention allows the range of reduced quantization noise to be shifted toward a desired operating frequency ?0.

Abstract: A wireless transceiver (100) that produces soft decisions for received, block error correction encoded codewords and a confidence indicator signifying a likelihood of errors in the detected data. The wireless transceiver (100) processes block encrypted signals, such as feedback channel messages in a WiMax uplink. Upon receiving a signal, a soft decision is determined for received block encoded codewords. A difference is calculated between a soft decision metric for a most likely detected codeword and a soft decision metric for a next most likely detected codeword. This difference is normalized based upon the total decoder input power received over the received signal (201). The normalized difference is then scaled by a channel dependent factor and is time filtered. The normalized and time filtered confidence indicator output (212) is able to be provided to a wireless network controller to assess the usability of the received data.

Abstract: Aspects of a method and system for detection of long pulse bin 5 RADARs in the presence of Greenfield packets are presented. In one aspect of the system, a processor in a wireless communication device may receive a plurality of pulses via a received signal. The processor may select at least a portion of the received plurality of pulses. The processor may compute a time duration value and a pulse count value based on the selected at least a portion of the received plurality of pulses. The processor may determine whether the received signal comprises a RADAR transmission signal based on the computed time duration value and the computed pulse count value when the time duration value is greater than or equal to a threshold time duration value and the pulse count value is greater than or equal to a minimum pulse count threshold value.

Abstract: A received signal is sampled at a sampling period of T+m*(T/n) during a sampling phase determination process. T is a symbol or chip period of the received signal, n is a number of phases of the sampled signal, T/n is a phase resolution period, and m is a fixed non-zero integer value where ?n<m<n (e.g. m=1 or ?1). By sampling the received signal at the sampling period of T+m*(T/n), a sample set for each one of n phases of the sampled signal is produced. For each sample set, a correlation process is performed between the sample set and a predetermined correlation signal to produce a correlation result. Once an optimal correlation result is identified from the correlation process, the received signal is sampled at a sampling period of T at a phase associated with the optimal correlation result. Advantageously, oversampling at a sampling rate of n/T is not required during the sampling phase determination process, which reduces cost and power consumption.

Abstract: A correlator comprises a plurality of phase rotators, a plurality of combining modules, a plurality of computation modules, and a selection module. The plurality of phase rotators selectively modifies phase for each chip of a first subset of chips by one of M phase offsets, where an incoming symbol comprises the first subset and a second subset of chips, and where M is an integer greater than one. The plurality of combining modules each combine a chip of the first subset with a respective chip of the second subset to generate an output. The plurality of computation modules includes inputs that communicate with the outputs of the plurality of combining modules and produces a plurality of correlator output signals. The selection module chooses one of the plurality of correlator output signals based upon a metric.

Abstract: A method and system of improving sensitivity in the demodulation of a received signal over an arbitrary measurement time epoch, the method comprising the steps of: correlating the received signal in a coherent fashion (80); and utilizing a Viterbi phase state keying trellis demodulation with a variable resolution of phase states over 360° to demodulate the radio frequency phase trajectory of the signal throughout the measurement time epoch (70); and the system comprising a receiver for receiving a direct sequence spread spectrum signal, the receiver comprising: an antenna (10) for receiving the direct sequence spread spectrum signal; a downconverter (40) for downconverting the received signal, producing a downconverted signal; an analog to digital converter (60) to convert the downconverted signal to a digital signal; a despreader (80) for despreading and coherently correlating the digital signal to a known signal, creating a despread signal; and a processor (70) for applying a Viterbi algorithm to the despre

Abstract: Disclosed is an apparatus for coherent combining type demodulation and method thereof, in which a multi-path reception signal is demodulated by a coherent combining method in case that a transmitted signal, which was spread and modulated by such an orthogonal code as Walsh code, is received via multi-paths in the course of transmission and by which loss is more reduced than that of modulation of a non-coherent combining method. The modulation according to the coherent combining method needs a pilot signal. Yet, there exists no pilot signal on a reverse link of IS-95A. Hence, the present invention basically generates a phase reference signal or a decision directed pilot signal instead of the pilot signal to perform coherent combining using the phase reference signal or the decision directed phase signal.

Abstract: A method and apparatus is provided to recover clock information embedded in a digital signal such as a data signal. A set of strobe pulses can be generated by routing an edge generator to a delay elements with incrementally increasing delay values. A set of latches triggered by incrementally delayed signals from the edge generator can capture samples of the data signal. An encoder can convert the samples to a word representing edge time and polarity of the sampled signal. The word representing edge time can be stored in memory. An accumulator can collect the average edge time over N samples. The average edge time can be adjusted with a fixed de-skew value to form the extracted clock information. The extracted clock information can be used as a pointer to the words stored in memory.