Miscellaneous Patents (Class 375/377)
  • Patent number: 10031882
    Abstract: Described is an I3C Repeater. The I3C Repeater may have a first circuitry with an I3C interface, a second circuitry with an I2C interface, and a datapath circuitry coupled to the first circuitry and the second circuitry. The second circuitry may be operable to convert a transaction received on the I2C interface into a transaction for the I3C interface, and to convert a transaction received on the I3C interface into a transaction for the I2C interface. The I3C Repeater may also have additional circuitries operable to convert transactions received on one of an SPI interface, a UART interface, and a Debug bus interface into transactions for the I3C interface, and vice-versa.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: July 24, 2018
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • Patent number: 9996593
    Abstract: Data can be processed in parallel across a cluster of nodes using a parallel processing framework. Using Web services calls between components allows the number of nodes to be scaled as necessary, and allows developers to build applications on the framework using a Web services interface. A job scheduler works together with a queuing service to distribute jobs to nodes as the nodes have capacity, such that jobs can be performed in parallel as quickly as the nodes are able to process the jobs. Data can be loaded efficiently across the cluster, and levels of nodes can be determined dynamically to process queries and other requests on the system.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: June 12, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Govindaswamy Bacthavachalu, Peter Grant Gavares, Ahmed A. Badran, James E. Scharf, Jr.
  • Patent number: 9847867
    Abstract: The object of the present invention is a method for selecting a terminal of an HD-FDD duplexing model. The invention enables the complexity of a switch of a terminal operating in an HD-FDD duplexing mode, at a level equivalent to that of a terminal operating in a TDD or FDD duplexing mode, to be reduced. To do this, thanks to the invention, it is provided that the terminal operating in an HD-FDD duplexing mode receives notifications or information via a network that programs the HD-FDD terminals through different uplink and downlink transmission models illustrated in FIG. 1. It may also be provided that the terminal operating in an HD-FDD duplexing mode has knowledge of the HD-FDD model to use for its communication. In this event, the complexity of its communication is reduced to the same level as that of a terminal operating in TDD mode.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: December 19, 2017
    Assignee: AIRBUS DS SAS
    Inventors: Christophe Gruet, Eric Georgeaux
  • Patent number: 9485044
    Abstract: An electronic service guide (ESG) is provided by transmitting announcements describing multimedia sessions, such as video streams. Sessions are organized into a session directory (28) which is split into two parts: a full session directory (291) and an updated session directory (292). A first kind of announcement describes all sessions in the full session directory. A second kind of announcement describes sessions in the updated session directory. Once a client has received a description of the full session directory, it need only listen to announcements of the second type so as to learn of any updates to sessions.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: November 1, 2016
    Assignee: NOKIA TECHNOLOGIES OY
    Inventors: Juha-Pekka Luoma, Dominique Muller, Toni Paila
  • Patent number: 9355690
    Abstract: A method for asynchronous time multiplexing of information with synchronous interfacing includes, responsive to a first edge of a clock signal, asynchronously loading first data, including first multiple sets of data for multiple operations, into a first asynchronous shift register. The first data is asynchronously unloaded from the first asynchronous shift register to a function block for processing to provide second data, including second multiple sets of data as results of the multiple operations. The second data is asynchronously loaded into a second asynchronous shift register. Responsive to a second edge of the clock signal, the second data is asynchronously unloaded from the second asynchronous shift register as the results of the multiple operations. The first edge and the second edge of the clock signal are associated with a same period of the clock signal.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: May 31, 2016
    Assignee: XILINX, INC.
    Inventor: Tim Tuan
  • Patent number: 9155140
    Abstract: An optical high speed Arbitrary Waveform Generator (AWG) comprising a trigger module configured to receive binary signals and generate a trigger output in response, a digital waveform shaper (DWS) module configured to be programmed by a digital waveform and convert it to analog waveform, an amplifier module configured to amplify the analog waveform, a load adapter module configured to match the electrical impedance of the amplifier module to the electrical impedance of a light source, a TEC controller and a voltage supply module adapted to supply voltage to the trigger module, the digital waveform shaper module, the amplifier module, and the load adapter and the TEC controller.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: October 6, 2015
    Inventor: Gabriel Yavor
  • Patent number: 9143195
    Abstract: A communication system has a trunk extending from a network facility, such as a central office, with a plurality of distribution points positioned along the trunk. Each leg of the trunk defines a shared channel that permits peak data rates much greater than what would be achievable without channel sharing. As an example, the connections of each respective trunk leg may be bonded. Further, the same modulation format and crosstalk vectoring are used for each leg of the trunk. The crosstalk vectoring cancels both far-end crosstalk (FEXT) that couples between connections of a given trunk leg and crossover crosstalk that couples between one trunk leg and another. In addition, logic determines an amount of excess capacity available for each leg of the trunk and controls error correction based on the determined excess capacity.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: September 22, 2015
    Assignee: ADTRAN, Inc.
    Inventors: Fred Chu, Kenneth D. Ko, Richard Goodson, Kevin W. Schneider
  • Patent number: 9025695
    Abstract: A network interface apparatus for wireless Ethernet is provided. The network interface apparatus includes: a Network Interface Card (NIC) control unit for converting a gigabit wired Ethernet signal into a Peripheral Component Interconnect express (PCIe) signal; a wireless network processing unit for converting the PCIe signal received from the NIC control unit into an analog signal; and an RF transmitting/receiving unit for converting the analog signal inputted from the wireless network processing unit into an RF signal of a 60 GHz frequency band to transmit the converted RF signal into a wireless terminal device.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: May 5, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Ho Jin Roh
  • Patent number: 9025712
    Abstract: A clock frequency adjusting system is disclosed. The clock frequency adjusting system includes a sensing clock generating unit, a frequency-dividing unit and a controller. The frequency-dividing unit makes frequency of the sensing clock signal be divided by a frequency-dividing modulus and then outputs a clock calibration signal. The controller includes a period counter and a frequency adjusting unit. The period counter samples the clock calibration signal through the external clock signal so as to acquire a second count value. The frequency adjusting unit calculates a frequency difference data between the clock calibration signal and the predetermined clock signal according to the first count value and the second count value, and determines a number of adjustment according to the frequency difference data and a step adjusting frequency so as to output a clock adjusting signal to the sensing clock unit to adjust frequency of the sensing clock signal.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: May 5, 2015
    Assignee: Pixart Imaging Inc.
    Inventor: Kevin Len-Li Lim
  • Patent number: 8995598
    Abstract: A clock recovery circuit includes a first phase detector for measuring the phase difference between a first clock signal from a voltage controlled oscillator (VCO) and a data signal. A phase shifter responsive to a control signal based on this phase difference adjusts the phase of an incoming clock signal to yield a second clock signal. The phase difference between the first clock signal and the second clock signal is measured and the resulting signal is low-pass filtered to derive a control signal for controlling the VCO. The phase locked loop including the VCO filters out jitter.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: March 31, 2015
    Assignee: Rambus Inc.
    Inventor: Carl William Werner
  • Patent number: 8971421
    Abstract: A millimeter wave wireless (M2W2) interconnect is used for transmitting and receiving signals at millimeter-wave frequencies for short-range wireless communication with high data rate capability. The transmitter and receiver antennae may comprise an on-chip differential dipole antenna or a bond-wire differential dipole antenna. The bond wire differential dipole antenna is comprised of a pair of bond wires connecting between a pair of pads on an integrated circuit (IC) die and a pair of floating pads on a printed circuit board (PCB).
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: March 3, 2015
    Assignee: The Regents of the University of California
    Inventors: Sai-Wang Tam, Mau-Chung F. Chang
  • Patent number: 8917797
    Abstract: A method and apparatus are disclosed for controlling a buffer in a digital audio broadcasting (DAB) communication system. An audio encoder marks a frame as “dropped” whenever a buffer overflow might occur. Only a small number of bits are utilized to process a lost frame, thereby preventing the buffer from overflowing and allowing the encoder buffer-level to quickly recover from the potential overflow condition. The audio encoder optionally sets a flag that provides an indication to the receivers that a frame has been lost. If a “frame lost” condition is detected by a receiver, the receiver can optionally employ mitigation techniques to reduce the impact of the lost frame(s).
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: December 23, 2014
    Assignee: LSI Corporation
    Inventor: Christof Faller
  • Patent number: 8913691
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: December 16, 2014
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
  • Patent number: 8907821
    Abstract: A computer-implemented method and apparatus are disclosed for decoding an encoded data signal. In one embodiment, the method includes accessing, in a memory, a set of signal elements. The encoded data signal is received at a computing device. The signal includes signal fragments each having a projection value and an index value. The projection value has been calculated as a function of at least one signal element of the set of signal elements and at least a portion of the data signal. The index value associates its respective signal fragment with the at least one signal element used to calculate the projection value. The computing device determines amplitude values based on the projection values in the signal fragments. The decoded signal is determined using the amplitude values and the signal elements associated with the at least some of the signal fragments.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: December 9, 2014
    Assignee: Google Inc.
    Inventor: Pascal Massimino
  • Patent number: 8903031
    Abstract: A clock recovery circuit includes a first phase detector for measuring the phase difference between a first clock signal from a voltage controlled oscillator (VCO) and a data signal. A phase shifter responsive to a control signal based on this phase difference adjusts the phase of an incoming clock signal to yield a second clock signal. The phase difference between the first clock signal and the second clock signal is measured and the resulting signal is low-pass filtered to derive a control signal for controlling the VCO. The phase locked loop including the VCO filters out jitter.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: December 2, 2014
    Assignee: Rambus Inc.
    Inventor: Carl W. Werner
  • Patent number: 8891663
    Abstract: A method and apparatus for transmitting digital data in a cellular environment. Adjacent cells of the cellular system are prevented from simultaneously transmitting data. Because the noise from transmissions of adjacent cells is a primary source of interference, the transmission rate of power limited base stations can be dramatically increased when the noise from adjacent cells is eliminated. The transmissions to each subscriber station are made at a fixed transmission power level. However, the data rate of transmitted signals differs from one subscriber station to another depending the path loss differences. In a first exemplary embodiment, the data rate of transmissions to a subscriber station is determined by selecting an encoding rate for the transmitted signal while holding the symbol rate constant.
    Type: Grant
    Filed: September 14, 2004
    Date of Patent: November 18, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Ephraim Zehavi
  • Patent number: 8891718
    Abstract: A system for simultaneous transmission (1) of Morse signaling over a radio communication using digital technology, comprising a signal generator (2) with at least one digital modulation which includes at least one amplitude modulation component; a Morse code generator (3) that generates Morse tones in analog form; and a first attenuator module (4), controlled by the Morse code generator (4). In this way, a signal with digital modulation generated by the signal generator (2) is attenuated in amplitude by the first attenuator module (4), the amplitude attenuation being the function of the amplitude of the waveform generated by the Morse code generator (3). In this way the transmission of information by digital modulation is simultaneous with the transmission of the Morse code by analog amplitude modulation (AM), using one single radiofrequency (RF) carrier signal and without service interruption or information loss.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: November 18, 2014
    Assignee: Teltronic, S.A.
    Inventors: Javier Cordova Val, Ignacio Cano Lazaro, Roman Abadias Pelacho
  • Patent number: 8848834
    Abstract: A method for detecting a format of a frame in a communication system is presented. An embodiment of the method includes receiving the frame comprising a plurality of orthogonal frequency division multiplexing (OFDM) symbols. The plurality of OFDM symbols may include at least one signal field symbol. The method further includes determining a modulation associated with the at least one signal field symbol. The modulation may be a first modulation or a second modulation. Also, the method includes estimating a position of the at least one signal field symbol among the plurality of symbols, and extracting a coding rate of the received frame. The method then includes detecting the format of the received frame based on the determined modulation and the estimated position of the at least one signal field symbol, and the extracted coding rate of the received frame.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: September 30, 2014
    Assignee: Uurmi Systems Pvt. Ltd
    Inventor: Nanda Kishore Chavali
  • Patent number: 8842779
    Abstract: Embodiments of user equipment and methods for determining IQ imbalance parameters are described. In some embodiments, a method for determining in-phase (I) and Quadrature (Q) imbalance (IQ imbalance) parameters based on a known signal in a dual-carrier receiver using at least one controllable frequency offset includes receiving a known signal modulated onto a first radio frequency (RF) carrier frequency and a second RF carrier frequency different than the first RF carrier frequency. The known signal is downconverted to a baseband signal for the carriers by conversion from the respective RF carrier frequencies to an intermediate frequency (IF) using a common RF local oscillator (LO) and by further conversion from IF to baseband using carrier specific IF LOs, where a controllable frequency offset is used. Any controllable frequency offset is removed from the baseband signal for the first and second carriers to produce representations of the received signals.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: September 23, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Chester Park, Jim Svensson
  • Patent number: 8831160
    Abstract: An apparatus includes a first clock source, a second clock source and circuitry configured to supply a clock signal to a circuit. The circuitry operates to change the clock signal from one frequency to another different frequency. This change is made in a manner whereby no clock signal is supplied during a period of time when the change from the one frequency to the another different clock frequency is being made.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: September 9, 2014
    Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SAS
    Inventors: Andrew Ferris, Ignazio Antonino Urzi
  • Patent number: 8831077
    Abstract: Systems and methods are disclosed for communicating on a pilot wire between Electric Vehicle Service Equipment (EVSE) and an Electric Vehicle (EV). The EVSE and EV exchange a Pulse Width Modulation (PWM) signal on the pilot wire to control charging operations of the EV. Data communications may also be transmitted on the pilot wire, such as between transmit and receive modems. The modems transmit communication signals either continuously, without regard to the state of the PWM signal, or only when the PWM is in an off-state. If transmitting while PWM is on, the modem needs a large coupling impedance and/or a large signal injection. To transmit only when the PWM is off, the modem may use a blocking diode in the coupling circuit or may synchronize to the pulses in the PWM signal.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: September 9, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Badri Varadarajan, Il Han Kim, Anand Dabak, Edward Mullins
  • Patent number: 8824597
    Abstract: Several circuits and methods for field-based communication are provided. In an embodiment, a field-based communication circuit includes a receiver circuit, a detection circuit and a control circuit. The receiver circuit is configured to receive a field input signal from a field source. The detection circuit includes a voltage detection circuit and a current detection circuit configured to detect a voltage signal and a current signal, respectively associated with the field input signal. The control circuit is configured to trigger a selection of one of the voltage detection circuit and the current detection circuit based on a detection of a signal magnitude of one of the voltage signal and the current signal relative to at least a first predetermined threshold level, wherein the selection of one of the voltage detection circuit and the current detection circuit facilitates a demodulation of one of the voltage signal and the current signal.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: September 2, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Yogesh Darwhekar, Vikas Singh, Ronen Issac, Matan Ben-Shachar
  • Patent number: 8824564
    Abstract: Aspects of a method and system for redundancy-based decoding of video content are provided. A bit sequence comprising video content may be decoded in a multilayer process based on a decoding algorithm and at least one physical constraint. The decoding algorithm may be based on the Viterbi algorithm. Whether the bit sequence comprises video content may be determined based on information provided by a portion of a packet header or by packet priority information necessary for enabling quality of service applications. The physical constraint may be based on border, DC component, and/or low frequency continuity between neighboring discrete cosine transform (DCT) blocks. The physical constraint may also be based on the consistency of video data coded by a variable length coding (VLC) operation. At least one physical constraint test may be performed on selected estimated video bit sequences to select a decoded output video bit sequence.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 2, 2014
    Assignee: Broadcom Corporation
    Inventors: Arie Heiman, Jeyhan Karaoguz
  • Patent number: 8817892
    Abstract: A data communications system having a plurality of communication devices including a host having a first receiver and a second receiver; and one or more clients, each client including a transmitter coupled between a signal node and a transmitter node, the transmitter selectively transmitting a multistate signal from the signal node to the transmitter node; and a single conductor daisy-chain loop redundantly communicating each multistate signal from each the transmitter to both receivers, the single conductor daisy-chain loop electrically communicating each transmitter node to the receivers. A data communications method including a) transmitting selectively a multistate signal from each of one or more clients; b) communicating electrically each multistate signal to a first location on a host using a single conductor coupled to each the client; and c) communicating electrically each multistate signal to a second location on the host using the single conductor.
    Type: Grant
    Filed: August 12, 2012
    Date of Patent: August 26, 2014
    Assignee: Tesla Motors, Inc.
    Inventors: Nathaniel Brian Martin, Ian Casimir Dimen, Samuel Douglas Crowder
  • Patent number: 8817891
    Abstract: A millimeter wave wireless (M2W2) interconnect is used for transmitting and receiving signals at millimeter-wave frequencies for short-range wireless communication with high data rate capability. The transmitter and receiver antennae may comprise an on-chip differential dipole antenna or a bond wire differential dipole antenna. The bond wire differential dipole antenna is comprised of a pair of bond wires connecting between a pair of pads on an integrated circuit (IC) die and a pair of floating pads on a printed circuit board (PCB).
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: August 26, 2014
    Assignee: The Regents of the University of California
    Inventors: Sai-Wang Tam, Mau-Chung Frank Chang
  • Patent number: 8811528
    Abstract: Transmitter-based techniques are provided for compensation of intersymbol interference and/or simultaneous switching outputs, using selective pulse width modulation. One or more signals are transmitted by detecting whether one or more of said signals satisfy one or more predefined signal corruption conditions, wherein said predefined signal corruption conditions indicate that one or more of said signals are anticipated to exhibit one or more of intersymbol interference and simultaneous switching outputs; and selecting a delay for one or more of the signals based on the one or more predefined signal corruptions conditions.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: August 19, 2014
    Assignee: LSI Corporation
    Inventors: Thomas Hughes, Victor K. Suen
  • Patent number: 8804855
    Abstract: A network infrastructure for mobile machines which are usable in explosive areas, having inherently safe participants and not inherently safe network participants the latter being arranged in pressure-resistant housings. The machine has at least one controller for actuating at least one not inherently safe participant. In order to provide a network infrastructure which avoids the drawbacks of the prior art, the machine has, outside the pressure-resistant housing for the first controller, at least one second, inherently safe controller for actuating at least one inherently safe participant, wherein the first controller forms a data distributor for a plurality of not inherently safe participants and the second controller forms a data distributor for a plurality of inherently safe participants, and wherein the first data distributor and the second data distributor are linked via an electrically decoupled data communication link.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: August 12, 2014
    Assignee: Caterpillar Global Mining Europe GmbH
    Inventors: Markus Lenzing, Henner Ruschkamp, Karsten Schwinne, Johannes Wesselmann
  • Patent number: 8804891
    Abstract: A frequency detector includes a multi-phase clock generation unit, a sampling unit connected to the multi-phase clock generation unit and a digital logic unit connected to the sampling unit. An inputted single-phase clock is received by the multi-phase clock generation unit and transformed into a multi-phase clock. Inputted random data are received by the sampling unit and sampled by the multi-phase clock. Each data bit of the random data is divided into several sampling intervals according to a phase number of the multi-phase clock. The digital logic unit analyzes sampling values logically, judges the corresponding sampling interval of each sampling value and outputs signals for indicating that a frequency of the random data is higher or lower than the frequency of the single-phase clock based on differences in the corresponding sampling intervals of the sampling values at two adjacent times. A method for detecting frequencies is further provided.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: August 12, 2014
    Assignee: IPGoal Microelectronics (SiChuan) Co., Ltd.
    Inventors: Yong Quan, Guosheng Wu
  • Patent number: 8793562
    Abstract: An apparatus and method for reducing power consumption of a receiver by performing a Hybrid Automatic Repeat reQuest (HARQ) according to a detected decoding error are provided. The apparatus includes a decoding reliability metric generator for setting a decoding result as a decoding reliability metric, which is a reference value for determining a code block having a decoding error, based on a decoding result, a decoding reliability metric buffer for storing the decoding reliability metric set by the decoding reliability metric generator and a code block controller for, when the decoding error occurs, identifying code blocks having the decoding error by checking the decoding reliability metric and for controlling to decode the identified code blocks.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: July 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Se-Hyoung Kim, Han-Ju Kim
  • Patent number: 8792596
    Abstract: According to an embodiment of the invention, an apparatus includes a decoder configured to decode transmission parameter signaling data from a signal, the signal including the transmission parameter signaling data on a lower level than a level on which service information is included; and a determiner configured to determine from decoded transmission parameter signaling data if the signal carries time-sliced elementary streams and configured to determine from the decoded transmission parameter signaling data whether the signal has a forward error correction framing structure, wherein the apparatus is a receiver and is configured to operate in a network. The apparatus further includes a controller configured to disregard a signal in response to determining that the signal does not carry time-sliced elementary streams.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: July 29, 2014
    Assignee: Nokia Corporation
    Inventors: Jani Vare, Jarno Kallio, Matti Puputti, Pekka Talmola
  • Patent number: 8774305
    Abstract: Circuitry for use in aligning bytes in a serial data signal (e.g., with deserializer circuitry that operates in part in response to a byte rate clock signal) includes a multistage shift register for shifting the serial data signal through a number of stages at least equal to (and in many cases, preferably more than) the number of bits in a byte. The output signal of any shift register stage can be selected as the output of this “bit slipping” circuitry so that any number of bits over a fairly wide range can be “slipped” to produce or help produce appropriately aligned bytes. The disclosed bit slipping circuitry is alternatively or additionally usable in helping to align (“deskew”) two or more serial data signals that are received via separate communication channels.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: July 8, 2014
    Assignee: Altera Corporation
    Inventor: Richard Yen-Hsiang Chang
  • Patent number: 8767879
    Abstract: A transceiver includes a channel estimator configured to generate, based on a packet received over a channel, an initial channel estimate for the channel. A compensator is configured to compensate a phase of the initial channel estimate to adjust for a carrier frequency offset associated with the channel, and ii) selectively compensate the initial channel estimate for sampling phase jitter. The selectively compensating the initial channel estimate for sampling phase jitter includes compensating the initial channel estimate for sampling phase jitter responsive to the packet having been received at a data rate greater than a first predetermined data rate, and not compensating the initial channel estimate for sampling phase jitter responsive to the packet having been received at a data rate less than or equal to the first predetermined data rate.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: July 1, 2014
    Assignee: Marvell International Ltd.
    Inventor: Ravi Narasimhan
  • Patent number: 8768278
    Abstract: Adjusting a phase locked loop (PLL) clock source to reduce wireless communication (e.g., radio frequency (RF)) interference within a device. The PLL may be included in a high speed serial interface, e.g., coupled to a display, and may be initially driven by a first clock. Later, when a second clock is available and aligned with the first clock, the PLL may be driven by the second clock. The second clock may be configured to change its frequency over time such that the PLL does not lose lock and also does not interfere (or reduces interference) with wireless communication of the device. For example, the second clock may be programmable or may dynamically vary its operating frequency, thereby reducing its interference with the wireless communication of the device.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: July 1, 2014
    Assignee: Apple Inc.
    Inventor: Michael Frank
  • Patent number: 8767878
    Abstract: A weighted open loop power control transmitter for controlling transmission power levels using a spread spectrum time division duplex (TDD) technique having frames with timeslots for communication includes a demodulator configured to receive a transmitted signal from the receiver, a channel estimation device, a data estimation device, and a weighted open loop power controller. The weighted open loop power controller includes a power measurement device, a pathloss estimation device configured to receive an interpreted power level from the data estimation device and estimate the pathloss and update a long term average of the pathloss, a quality measurement device, and a transmit power calculation device for determining the transmitter's power level and to control the receiver's amplifier.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: July 1, 2014
    Assignee: Intel Corporation
    Inventors: Ariela Zeira, Sung-Hyuk Shin
  • Patent number: 8750354
    Abstract: An open architecture design for a digital nearfield test system for nearfield testing of a phased array antenna allows the ability to use the components of an individual phased array antenna to be tested in conjunction with a nearfield scanner probe system allowing an efficient and cost-saving “radar testing the radar” scenario.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: June 10, 2014
    Assignee: Lockheed Martin Corporation
    Inventors: William M. Heruska, Michael Uscinowicz, Gregory A. Arlow, Fred Tanjutco
  • Patent number: 8750430
    Abstract: A data receiver circuit for converting received serial data into parallel data in accordance with a data rate signal and for outputting the converted parallel data, the data receiver circuit includes a clock generator for generating a reference clock based on an input clock, a data latch for latching the received serial data and outputting first latched serial data in accordance with the reference clock, a first data output section for converting the first latched serial data into first parallel data with a first reference clock, in case that the data rate signal indicates a first data rate same as a data rate of the reference clock, and a second data output section for converting the first latched serial data into second parallel data with a second reference clock, in case that the data rate signal indicates a second data rate slower than the data rate of the reference clock.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: June 10, 2014
    Assignee: Fujitsu Limited
    Inventor: Yoichi Koyanagi
  • Patent number: 8744029
    Abstract: A data stream monitor includes an analog front end (AFE) and a digital state machine. The AFE receives recovered clock and data signals at a first rate. The AFE uses the recovered clock and a phase interpolator to generate a phase-adjusted clock signal at a second rate slower than the first rate. The AFE uses a detector operating with the phase-adjusted clock signal to generate a representation of the data signal generated from comparisons of the data signal with two reference voltages. A logical combination of the results from the comparisons generates a signal that identifies when the data signal voltage is near the common-mode voltage. The digital state machine generates a strobe signal at a third rate slower than the second rate. The strobe signal is used by the AFE to sample the signal. The sample is forwarded to the digital state machine where it is stored.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: June 3, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Georgios Asmanis, Faouzi Chaahoub, Ajay Kumar Yadav, Sriramkumar Sundararaman
  • Patent number: 8745432
    Abstract: A delay controller includes an acquiring section that acquires synchronization timings indicating timings when a plurality of controllers, which control via a line a plurality of transmitters that transmit data, synchronously control the transmitters, a determining section that determines a reference synchronization timing serving as a reference for synchronization between the controllers, on the basis of the synchronization timings acquired by the acquiring section, and a synchronization information transmitting section that transmits synchronization information to the controllers, the synchronization information being used when the controllers receive data from each of the transmitters at the reference synchronization timing determined by the determining section.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Hideki Iwami, Eisaburo Itakura, Satoshi Tsubaki, Hiroaki Takahashi, Kei Kakitani, Tamotsu Munakata, Hideaki Murayama
  • Patent number: 8738981
    Abstract: Systems and methodologies are described herein that facilitate Hybrid Automatic Repeat Request (H-ARQ) scheduling and coordination in a wireless communication system. As described herein, a network node capable of cooperation with other nodes for communication to respective users can coordinate a cooperation strategy across nodes based on a H-ARQ protocol to be utilized for a given user. In the case of a synchronous H-ARQ protocol, communication can be scheduled as described herein such that initial transmissions to a user are conducted cooperatively and re-transmissions are conducted without inter-node cooperation. In the case of a H-ARQ protocol utilizing persistent assignments, transmission intervals can be calculated and utilized based on application latency requirements, backhaul link latency, or other factors.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: May 27, 2014
    Assignee: Qualcomm Incorporated
    Inventors: Alexei Y. Gorokhov, Jilei Hou
  • Patent number: 8737556
    Abstract: A method and apparatus is provided for providing a phase glitch error filter for a delay lock loop. The device comprises a delay lock loop to provide an output signal based upon a phase difference between a reference signal and a feedback signal. The delay lock loop comprises a filter unit to provide filtering of noise on a phase control signal to substantially reduce a false delay lock loop state.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: May 27, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Long B. Guan
  • Patent number: 8738982
    Abstract: A data processing method and a data re-transmission method in a broadband wireless access system are disclosed. A transmitting side generates a coded block set including coded blocks of a predetermined number and the coded blocks are transmitted to first and second base stations. The transmitting side sets a timer after transmitting a last coded block of the coded blocks. The coded blocks received by the second base station are transmitted to the first base station, and the transmitting side receives a control signal indicating whether there is a transmission error from the first base station.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: May 27, 2014
    Assignee: LG Electronics Inc.
    Inventors: Tae Gon Kong, Yong Ho Kim
  • Patent number: 8731111
    Abstract: An apparatus and method for tunable wideband solar radio noise measurement is provided. Accordingly, it is possible to directly measure the absolute flux of solar radio waves in a desired frequency band using a tunable receiver, and accordingly, to protect radio communication broadcasting systems located on the earth from its damage caused due to radio burst, noise and the like.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: May 20, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Woo Park, Cheol Oh Jeong, Jae Hoon Kim, Jung Hoon Kim
  • Patent number: 8718150
    Abstract: A disclosed code-division-multiple-access (CDMA) system has a base station (BS) and remote stations (RSs). A BS-spread-spectrum transmitter broadcasts a common-synchronization channel having a chip-sequence signal common to the remote stations served by the BS, and a frame-timing signal. A RS-spread-spectrum receiver receives the broadcast common-synchronization channel, and determines frame timing from the frame-timing signal. A first RS-spread-spectrum transmitter transmits an access-burst signal, which has a plurality of segments. Each access burst signal segment has a plurality of power levels. A BS-spread-spectrum receiver receives the access-burst signal at a detected-power level. In response to receiving the access-burst signal, a BS-spread-spectrum transmitter transmits an acknowledgment signal to the RS-spread-spectrum receiver.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: May 6, 2014
    Assignee: Golden Bridge Technology, Inc.
    Inventors: Emmanuel Kanterakis, Kourosh Parsa
  • Patent number: 8711972
    Abstract: A radio communication system, including: a transmission apparatus; and a reception apparatus, wherein the transmission apparatus and reception apparatus performs a radio communication, the transmission apparatus includes: one or more processor configured to enlarge a sequence length of a transmission data by repeating a sequence of the transmission data, and to perform a first subcarrier arrangement to arrange each of components included in the enlarged transmission data to each of subcarrier according to positions of the each of components in the enlarged transmission data, and to puncture the component of the arranged transmission data, when the subcarrier is not used for transmission; and a transmitter which transmits the transmission data arranged on the subcarrier to the reception apparatus, and the reception apparatus includes a receiver which receives the transmission data.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: April 29, 2014
    Assignee: Fujitsu Limited
    Inventors: Takashi Dateki, Takashi Seyama
  • Patent number: 8693523
    Abstract: Filtering and modulating a first rate data signal into a Quadrature Amplitude Modulated (QAM) Code Division Multiple Access (CDMA) and a second rate data signal into a Time Division Multiple Access (TDMA) modulated signal and selecting between the transmission of the CDMA and TDMA modulated signals. A method for nonlinearly and linearly amplifying TDMA and CDMA signals. A diversity receiver and demodulator method for receiving and demodulating transmitted modulated signals. Processing, transmit baseband filtering and modulating signals for providing cross-correlated in-phase and quadrature-phase Gaussian filtered Gaussian Minimum Shift Keying (GMSK) and other cross-correlated modulated signals and spread spectrum Quadrature Phase Shift Keying (QPSK) modulated signals.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: April 8, 2014
    Inventor: Kamilo Feher
  • Patent number: 8683013
    Abstract: A method is provided in one embodiment and includes establishing a video session involving an endpoint and a server; evaluating network criteria associated with characteristics that can affect a bit rate for the video session; and communicating bit rate hint data, which is based on the network criteria, to the endpoint for consideration in a bit rate request. The bit rate request involves streaming data in the video session. The method also includes receiving the bit rate request from the endpoint.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: March 25, 2014
    Assignee: Cisco Technology, Inc.
    Inventors: Robert D. Major, David R. Oran, Ashok Narayanan, Francois L. Le Faucheur
  • Patent number: 8681837
    Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer as logic level sequences are transmitted at different frequencies.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: March 25, 2014
    Assignee: Massachusetts Institute of Technology
    Inventor: William J. Dally
  • Patent number: 8675772
    Abstract: This invention relates to a closed loop duplex communications system having at least two antennae at the forward link transmitter. A feedback channel from the forward link receiver to the forward link transmitter carries feedback information about the phase and magnitude relationships of the forward link channels from different transmitter antennae. The feedback information is used to compute beamforming weights for the forward link. The signals received on the at least two antennae of the reverse link are used to compute code correlation parameters for application on the forward link.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: March 18, 2014
    Assignee: Alcatel Lucent
    Inventor: Sridhar Gollamudi
  • Patent number: 8666014
    Abstract: A reproduction apparatus includes a setter configured to set at least one language, a separator configured to separate and output a video signal and an audio signal, a video signal processor configured to decode and encode the video signal, a first decoder configured to output a first center channel signal and a multi-channel signal generated by extraction of the first center channel signal, a second decoder configured to output a second center channel signal, and a selector configured to receive the first and second center channel signals and assign, according to a setting in the setter, the first and second center channel signals respectively to different outputs.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: March 4, 2014
    Assignee: Panasonic Corporation
    Inventor: Hiroaki Suzuki
  • Patent number: 8660212
    Abstract: Interference classification with minimal or incomplete information. Receivers in access points and in other network devices on a wireless digital network may be switched to a spectrum monitor mode in which they provide amplitude-versus-frequency information for a chosen part of the spectrum. This may be performed by performing a FFT or similar transform on the signals from the receiver. Receivers are calibrated with known interference sources in controlled environments to determine peaks, pulse frequency, bandwidth, and other identifying parameters of the interference source in best and worst case conditions. These calibrated values are used for matching interference signatures. Calibration is also performed using partial signatures collected over a short period in the order of microseconds. These partial signals may be used to detect interferers while scanning. Another aspect of the invention is to record the variation of noise floor in the presence of interference sources.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: February 25, 2014
    Assignee: Aruba Networks, Inc.
    Inventor: Subburajan Ponnuswamy