Abstract: Sheet handling apparatus is provided which includes structure for feeding a sheet in a predetermined path of travel, for sensing the sheet in the path of travel and providing at least one sensing signal indicative thereof, for printing postage indicia on the sheet, and for controlling the printing structure. The sensing structure is coupled to the controlling structure, which includes a microcomputer adapted to be energized from a local source of supply of power. The microcomputer is responsive to the at least one sensing signal for providing a time delay before commencement of operation of the printing structure to cause the postage indicia to be printed on the sheet a predetermined marginal distance from a reference edge of the sheet. The controlling structure includes a keyboard coupled to the microcomputer. The keyboard includes at least one key selectively operable for generating at least one key signal representative of a desired change in the marginal distance.

Abstract: A means to set spark timing in accordance with engine speed includes a counter to count clock pulses between engine speed reference pulses. A read-only memory has successive memory locations each storing an addend quantity and a repeats number. An adder unit, including an accumulator, operates to access the memory locations, and to add the addend quantities to the contents of the accumulator repeatedly a number of times equal to the respective repeats numbers. A comparator produces an ignition firing pulse when the contents of the accumulator corresponds with the reference period number provided by the counter.

Abstract: The odometer in particular for a cycle comprises a case 1 containing a micro-processor connected to a movement sensor associated with a wheel of the cycle, a display for the items of information and at least one control key relating to the display of the items of information processed by the micro-processor. The control key is constituted by at least one part of the upper side of the cover 3 of the case 1, which cover is pivotally mounted on the bottom 2 of the case and it includes devices for emitting sound signals respectively corresponding to the nature of the magnitudes appearing in the display devices and seen through a window 12 of the case.

Abstract: A microprocessor transfers into a first so-called "fixed" zone of the memory the intermediate total distance travelled since the vehicle was put on the road and, in a second so called "journey" zone of the memory the successive partial distances travelled between each power supply cut off, the successive partial distances being transferred into the cells of the journey zone of the memory each time the power is switched off.

Abstract: A rate calculator for calculating, displaying and continuously updating the rate of occurrence of events. Manually entered signals indicative of the occurrence of an observed event trigger a resettable counter for counting the number of events. A clock is activated by the first entry signal for measuring the time duration from the first entry and a processor responds to the counter and the clock for cumulatively calculating the rate of occurrence of each event from the second event on. A display of the calculated rate is provided for visual perception.

Abstract: The invention is concerned with a digital ratemeter comprising a count difference circuit for adding input pulse signals and subtracting the frequency of the divider pulse, an integrator for integrating positive or negative count values from the count difference circuit, a feedback unit for receiving an integral count value from the integrator as input, thus generating a divider pulse frequency, and performing exponential transformation of the divider pulse frequency, whereby the integral count value is a count rate output and a fixed measurement accuracy in the overall range is attained.

Abstract: A method and a device for the generation of numerical values which are proportional to the frequency of the measured pulses of a measured-pulse train are proposed which make available the numerical values covering a wide measuring range with high precision and in a shortest possible time. To this end, in invariably predetermined reference time intervals, the number of the periods of the measured pulses is in each case measured as an approximate value for the frequency, and a correction value is added to the approximate value. The correction values are contained in at least one table as table values under respective addresses, the table values being derived from the difference between the time durations measured in successive reference time intervals up to the respective last measured pulse in the reference time interval.

Abstract: D.C. reconstruction of sampled CCD output signals is achieved by subtracting the output current pulses of two CCDs (or subtracting parallel outputs of the same CCD) with a differencing circuit containing two biasing current mirrors, a current sink device and an output capacitor. The two current mirrors are used with each biasing the output of a complementary CCD to positive and acting to mirror the CCD output current. A third current mirror converts the output of one of the CCDs into a current sink. An output capacitor performs subtracting by converting all outputs to voltage and combining the positive biased output of one CCD with the current said output of the second CCD.

Abstract: Apparatus for monitoring the level of liquid in a tank or reservoir comprises a probe formed by a resistive metal element having a high temperature coefficient, and a supply means for the probe. The apparatus further comprises a voltage-frequency converter which is connected in parallel with the probe, two counters which are connected in parallel to the output of the converter, and a subtracting means connected to the outputs of the counters. A time base controls operation of the supply means during a complete cycle to effect a counting operation of the first counter for a given period of time at the beginning of a cycle, a counting operation of the second counter for the same period of time but at the end of the cycle, and operation of the subtracting means at the end of the cycle.

Abstract: Apparatus is disclosed wherein the average period of a synthesized signal is a non-integral multiple of the period of a given signal. The apparatus is arranged so that a counter alternates its count between N and N+1, wherein N is a predetermined integer, in a predetermined pattern so that the average count approximates a rational non-integral value between N and N+1.

Abstract: A function generator for extracting the square root or other function of a pulse width modulated input signal is disclosed. The function generator utilizes a ROM table (12) which contains values of the inverse of the desired function. Two eight-bit counters (26, 28) are clocked in proportion to the duty cycle of the input signal and the duty cycle of a flip-flop (22), which is related to the output of the ROM (12). The counters (26, 28) keep a running average of the comparison of the foregoing duty cycles and, in turn, cause a four-bit up/down counter (30) and the ROM (12) to cycle in time between the value in the ROM (12) above and below the exact input value. In this manner, the output of a four-bit up/down counter (30) is an accurate interpolated representation of the square root of the input signal.

Abstract: A digital speed measurement circuit for an engine includes a magnetic pick-up positioned adjacent an engine-driven gear having a substantial number of teeth so that the pick-up produces a number of speed pulses per revolution of the gear. These pulses are shaped into square waves by a signal conditioning circuit and connected through a synchronizing circuit which responds to the trailing edge of each square wave to produce a triggering pulse, with each triggering pulse supplied to a tooth counter. A high speed clock is connected to a second counter which is reset with each triggering pulse. Sampling pulses are produced in an associated control system which is not coordinated with the speed pulse but which are longer in duration than any of the speed pulses and which control the flow of tooth counts to the tooth counter.

Abstract: A control apparatus for an internal combustion engine includes pulse converter blocks each comprising a register, a detection circuit for determining if the information content of the register has met a predetermined condition and an increment/decrement circuit for incrementing or decrementing the information content of the register. A block is provided for each of the output signals from a CPU, and the pulse converter blocks are driven by a common clock pulse so that the counting operations and the condition detecting operations of the blocks are effected in synchronism with the common clock pulse.

Abstract: In a multiple stage data transfer circuit, suitable for transferring a plurality of bits to or from a bit processor or 1-bit arithmetic logic unit, each bit stage includes a shift register portion and a latch portion. Each shift register(S/R) portion is constructed of a series circuit consisting of a static (input) inverter, a switching element, and a dynamic (output) inverter. Each latch portion is constructed of a closed loop consisting of a static inverter, a switching element, and a dynamic inverter. Each bit stage also includes a data transfer switch element, which may be activated through an externally connected control line. The data transfer switch is coupled beween the data output terminal of the S/R switch and the data output terminal of the latch switch. The S/R and latch portion switches are activated by two different clocks, with a phase deviation therebetween of one-half cycle. When the S/R switch and data transfer switch are both "ON", data may flow from the S/R's input inverter to the latch.