Parallel Coding Architecture Patents (Class 382/234)
  • Patent number: 8478060
    Abstract: The invention is related to a method for compressing images. The proposed method comprises associating perceptual importance parameters with pixels of the image, applying a transform on the image, partitioning the transformed image into code blocks and encoding coefficient bits of a given code block together from a most significant bit plane towards a least significant bit plane, wherein encoding of at least one coefficient is truncated at a truncation bit plane depending on the perceptual importance parameter associated with the pixel to which said code block coefficient corresponds. Truncating encoding of coefficients in dependency on the perceptual importance of the pixel associated with the coefficient allows for truncating coefficients corresponding to perceptually less important pixels at more significant bit planes. So, the overall perceptual quality of the compressed image is enhanced.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: July 2, 2013
    Assignee: Thomson Licensing
    Inventors: Libo Yang, Zhi Bo Chen, Xiao Ming Huang
  • Patent number: 8467444
    Abstract: An information processing system for performing processing of dividing a moving image into tiles and packetizing and outputting information corresponding to each tile includes a process time measuring packet generation unit adapted to generate and transmit a process time measuring packet in which a packet sending time is set to measure a packet process time, a packet process time measuring unit adapted to measure, based on the packet sending time set in the process time measuring packet and the reception time of the process time measuring packet, the packet process time necessary for processing a packet, a determination unit adapted to determine, based on the packet process time, the timestamp of the moving image divided into the tiles, and a packetization unit adapted to execute processing of packetizing and outputting the timestamp and the information of the moving image divided into the tiles.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: June 18, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masayuki Odagawa, Wataru Ochiai, Akihiro Takamura
  • Patent number: 8462841
    Abstract: A video processing device (150) includes a bitstream accelerator module (106) and a video processing engine (108). The bitstream accelerator module (106) has an input for receiving a stream of encoded video data, and an output adapted to be coupled to a memory (112) for storing partially decoded video data. The bitstream accelerator module (106) partially decodes the stream of encoded video data according to a selected one of a plurality of video formats to provide the partially decoded video data. The video processing engine (108) has input adapted to be coupled to the memory (112) for reading the partially decoded video data, and an output for providing decoded video data.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: June 11, 2013
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Erik Schlanger, Brendan Donahe, Eric Devolder, Rens Ross, Sandip Ladhani, Eric Swartzendruber
  • Patent number: 8442333
    Abstract: The present invention provides an image encoding device which does not necessitate reference of a quantization parameter between consecutive macroblocks across a parallel processing area boundary without forming slices. The image encoding device encodes a macroblock of an encoding target image by parallel processing sequentially from the top of a parallel processing area, and possesses an encoding element for every parallel processing area. When all the quantized orthogonally-transformed coefficients of a top macroblock of the parallel processing area are zero, the encoding element adds a non-zero coefficient to a part of the coefficients, making the coefficients non-zero. Accordingly, generation of a skip macroblock in the top macroblock of each parallel processing area is suppressed. Since slice formation is not necessary, the prediction over a parallel processing area boundary is applied, and encoding efficiency improves.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: May 14, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Keisuke Matsumoto, Seiji Mochizuki, Kenichi Iwata, Fumitaka Izuhara, Motoki Kimura
  • Patent number: 8437396
    Abstract: A motion compensation module, that can be used in a video encoder for encoding a video input signal, includes a motion search module that generates a motion search motion vector for each macroblock of a plurality of macroblocks by contemporaneously evaluating a top frame macroblock and bottom frame macroblock from a frame of the video input signal and a top field macroblock and a bottom field macroblock from corresponding fields of the video input signal. A motion refinement module, when enabled, generates a refined motion vector for each macroblock of the plurality of macroblocks, based on the motion search motion vector.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: May 7, 2013
    Assignee: ViXS Systems, Inc.
    Inventors: Gang Qiu, Xu Gang (Wilf) Zhao, Xinghai Li
  • Patent number: 8416286
    Abstract: An image signal processing device improving quality of three-dimensional image is provided. The device includes a determination section; deinterlace sections and a synchronous control section. The determination section determines whether first and/or second input image signals, having horizontal parallax there between, are interlaced signals derived from video signal or from pull down-converted film signal. The deinterlace sections perform deinterlace on each of the first and second input image signals, through interpolation for a video signal or pull down reverse conversion for a film signal, and generate first and second output image signals as progressive signals, having horizontal parallax there between. The synchronous control section synchronously controls the deinterlace, based on result of the determination section, such that deinterlace process onto the first and second input image signals, synchronized with each other for each of fields, are of same type.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: April 9, 2013
    Assignee: Sony Corporation
    Inventor: Tetsuro Tanaka
  • Patent number: 8401071
    Abstract: An apparatus and method of performing YUV (or YCrCb) video compression prior to storage within a memory and decompression upon retrieval of the blocks from memory. Compression is performed utilizing a quantizer to compress video data to a desired overall compression ratio R, even though the luma and chroma contributions to compression can differ for each subblock, each preferably selected in response to texture estimation. Selections are made for each subblock to perform either linear or non-linear quantization during compression. Compression is performed without utilizing data from blocks outside of the block being compressed, wherein video blocks can be retrieved and decompressed in any desired order. In one implementation, an encoder non-sequentially selects blocks from memory which are then decompressed and encoded. The compression may be beneficially utilized in a number of different video transmission and storage applications without departing from the invention.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: March 19, 2013
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Jeongnam Youn, Yuji Wada
  • Patent number: 8395634
    Abstract: An information processing apparatus for encoding image data, includes a filter unit for performing a filtering operation on the image data in a layer fashion to generate a plurality of subbands including coefficient data segmented on a per frequency band basis, an intermediate data storage unit for storing intermediate data generated in the middle of the filtering operation of the filter unit, a coefficient storage unit for storing the coefficient data generated in the filtering operation of the filter unit, and a coefficient rearranging unit for performing a rearranging operation to rearrange the coefficient data stored on the coefficient storage unit so that the coefficient data is output in a predetermined order. The intermediate data storage unit writes and reads data thereon at a speed higher than the coefficient storage unit and being smaller in storage capacity than the coefficient storage unit.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventors: Katsutoshi Ando, Takahiro Fukuhara
  • Patent number: 8386675
    Abstract: There is disclosed a data transmitting apparatus for transmitting data including a plurality of data elements, each of which is a bit sequence of a plurality of bits. At least one bit in the bit sequence of a first one of the kinds of data elements that most frequently occurs has the same value as a bit at a corresponding place in the bit sequence of a second one of the kinds of data elements that second most frequently occurs. The data-block generating portion generates a data block, by rearranging the bit sequences of the data elements of the raw data such that bits at the same place in the respective bit sequences as each of the at least one bit are arranged in a series in the data block. The data compressing portion creates a compressed file. The transmitting portion transmits the compressed file.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: February 26, 2013
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Hiroshi Murashima
  • Patent number: 8385424
    Abstract: Techniques are described to reduce rounding errors during computation of discrete cosine transform using fixed-point calculations. According to these techniques, an inverse discrete cosine transform a vector of coefficients is calculated using a series of butterfly structure operations on fixed-point numbers. Next, a midpoint bias value and a supplemental bias value are added to a DC coefficient of the matrix of scaled coefficients. Next, an inverse discrete cosine transform is applied to the resulting matrix of scaled coefficients. Values in the resulting matrix are then right-shifted in order to derive a matrix of pixel component values. As described herein, the addition of the supplemental bias value to the DC coefficient reduces rounding errors attributable to this right-shifting. As a result, a final version of a digital media file decompressed using these techniques may more closely resemble an original version of a digital media file.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: February 26, 2013
    Assignee: QUALCOMM Incorporated
    Inventor: Yuriy Reznik
  • Patent number: 8384952
    Abstract: A compression process and apparatus includes: generating a background layer by extracting a text region from an input image and removing at least the text region from the input image; extracting a background region corresponding to a color characteristic from a background layer; recording coordinate values of the background region extracted; and storing the background region in a form in accordance with the color characteristic of the background region extracted. Further, a data storage section stores a local background and a page background as information including the background color estimated and the coordinate values of the background region including the background color, each of which local background and page background are included in the background layer. This configuration makes it possible to improve a compression efficiency and image quality.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: February 26, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Makoto Hayasaki
  • Patent number: 8373711
    Abstract: An image processing apparatus has a memory in which a plurality of image processing commands are stored, a dependent information producing unit which produces dependent information in each image data block becoming a target image processing, the dependent information indicating a dependency relationship between image processing of the image data block and another processing, a dependency relationship solving unit which makes a determination of a practicable image processing based on the dependent information, the dependency relationship solving unit writing an image processing command of the practicable image processing in the memory, and a plurality of image processing units which read an image processing command stored in the memory, the image processing units performing the image processing to the image data block based on the image processing command.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: February 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Kodaka, Nobuhiro Nonogaki
  • Patent number: 8369411
    Abstract: A system for processing sub-blocks of a macroblock of a video frame. In an example embodiment, the system includes a first module that is adapted to process each sub-block of the macroblock, wherein each sub-block is associated with a predetermined position in a first sequence. The processing of certain sub-blocks in the first sequence requires results of processing of one or more previously processed sub-blocks in the first sequence. A controller selectively enables the first module to process each sub-block of a second sequence that is altered from the first sequence so that the first module implements parallel or pipelined processing of certain sub-blocks of the macroblock. In a more specific embodiment each sub-block in the first sequence of sub-blocks is consecutively numbered 0-15 according to H.264 standards.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: February 5, 2013
    Inventors: James Au, Barry Moss
  • Patent number: 8351719
    Abstract: An image decoding apparatus which decodes externally received encoded image information includes a storage unit which stores the image information. The image decoding apparatus includes a first decoding unit which receives, from the storage unit, image data to be decoded and reference data, and decodes the target image data. The image decoding apparatus includes a second decoding unit which receives the image data decoded by the first decoding unit, receives, from the storage unit, image data to be decoded based on the decoded image data, and decodes the image data received from the storage unit. The image decoding apparatus includes a decoding control unit which controls the first and second decoding units to repetitively execute decoding of image data in parallel.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: January 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroki Horikoshi
  • Patent number: 8351718
    Abstract: An image data processing apparatus including: a compression processing section that divides image data into a plurality of partial data in a prescribed size, generates link information showing a mutual arrangement of each of the divided partial data, and generates compressed partial data by compressing each of the divided partial data; a plurality of expansion sections that expand the compressed partial data respectively; a data controller that assigns each of the compressed partial data to any one of the expansion sections, and operates the expansion sections to expand the compressed partial data substantially simultaneously; and an image data storage section that stores each of the expanded partial data, wherein the data controller determines an area of the image data storage section, in which each of the expanded partial data ought to be stored, and an output order of the stored partial data, based on the link information and the prescribed size of the partial data, so as to restore the original image data
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: January 8, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroshi Maeda
  • Patent number: 8320693
    Abstract: An encoding device includes a filter unit that performs a filtering processing as to image data, for a line block including image data of a number of lines for generating coefficient data of one line of a sub-band of at least a lowest band component. The filter unit generates a plurality of sub-bands made up of coefficient data broken down by frequency band. The encoding device also includes a storage unit that stores coefficient data generated by the filter unit, for the line block. The encoding device further includes a coefficient rearranging unit that rearranges the coefficient data, for each line block, in an order in which a synthesizing processing, for generating image data by synthesizing the coefficient data of a plurality of sub-bands which have been divided into frequency bands, is to be executed. An encoding unit encodes the coefficient data rearranged by the coefficient rearranging unit.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: November 27, 2012
    Assignee: Sony Corporation
    Inventors: Takahiro Fukuhara, Kazuhisa Hosaka, Katsutoshi Ando
  • Patent number: 8306340
    Abstract: This invention provides a novel single-pass and multi-pass synchronized encoder and decoder, performing order(s) of magnitude faster data compression and decompression, at any compression ratio with the higher or the same perceived and measured decompressed image quality in comparison with the best state-of-the-art compression methods, using order(s) of magnitude less system resources (processor complexity, memory size, consumed power, bus bandwith, data latency). These features are achieved using novel direct and inverse non-stationary filters for the recusive octave direct and inverse subband transformation, novel simple context modeling and symbol probability estimation using a minimum number of histograms with the fast adaptation for the sign and the magnitude of the transformation coefficients, a novel accelerated range coder without division operations, and a novel synchronisation of the compressed data.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 6, 2012
    Inventors: Vladimir Ceperkovic, Sasa Pavlovic, Dusan Mirkovic
  • Patent number: 8279504
    Abstract: Pieces of reading frequency information representing the use frequencies of first and second reading units are acquired. Read color information of a color on a document that is read by the first or second reading unit is acquired. Based on the acquired pieces of reading frequency information and the acquired read color information, one of the first and second reading units is decided as a reference reading unit serving as a reference when performing correction to make the reading characteristics of the first and second reading units relatively coincide with each other.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: October 2, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Asako Hashizume
  • Patent number: 8270497
    Abstract: Among other things, techniques, systems and apparatus are described for complementing a bitstream error so that a hardware decoder can stably decrypt a bitstream. A method of complementing a bitstream error includes: receiving a bitstream; detecting an error in the received bitstream; and complementing the detected error, before decrypting the bitstream.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: September 18, 2012
    Assignee: Core Logic, Inc.
    Inventors: Jeong Kwon Kim, Seung Pyo Shin
  • Patent number: 8265406
    Abstract: A method of entropy encoding image or video data may include entropy encoding a number of blocks independently and in parallel to generate a number of bit streams. At least one of the number of bit streams may include an assumed value in place of a value that would be determined by another bit stream. The method may also include selectively correcting the assumed value based on a value in another one of the number of bit streams. The number of bit streams may be combined into an output, entropy encoded bit stream corresponding to the number of blocks.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: September 11, 2012
    Assignee: Intel Corporation
    Inventor: Robert J. Reese
  • Publication number: 20120213448
    Abstract: An image encoding apparatus is configured to encode image data comprising a sequence of unencoded blocks of pixels into a sequence of encoded blocks of pixels in a predetermined image encoding format. Each encoded block of pixels has a characteristic encoding value representative of its corresponding unencoded block of pixels, and a plurality of dependently encoded blocks of pixels each have a dependent characteristic encoding value which is defined with reference to the characteristic encoding value for a preceding encoded block of pixels.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Applicant: ARM LIMITED
    Inventors: Lars Ingvar Malmborg, Reimar Gisbert Döffinger
  • Patent number: 8237594
    Abstract: An encoding apparatus includes a unit that calculates a plurality of normalized values by dividing input values in an input signal by either a normalization coefficient that is closest to a maximum value of absolute values of the input values or a normalization coefficient that is closest to the maximum value from among normalization coefficients that are larger than the maximum value; a unit that generates a plurality of quantized values by quantizing the plurality of normalized values; a unit that stores a code table in which the smaller the probability of occurrence of the plurality of quantized values, the longer the code length of a variable-length code allocated to the plurality of quantized values; and a unit that outputs, when the plurality of quantized values are all zero, a variable-length code allocated to a combination of a plurality of quantized values in accordance with the code table.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: August 7, 2012
    Assignee: Sony Corporation
    Inventors: Shiro Suzuki, Yuuki Matsumura, Yasuhiro Toguri, Yuuji Maeda
  • Patent number: 8233537
    Abstract: This invention is useful in video compression standards support a rich set of intra prediction modes. This invention a unique table creation and lookup approach to software pipeline the prediction process for all pixels within a block. The table stores constant data and pointer data into a neighbor pixel table. Indexing into the table based upon the current intra prediction mode for each pixel of a block recalls constant data and other pixel data for calculation of an intra prediction value.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: July 31, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Sunand Mittal, Ratna M. V. Reddy
  • Patent number: 8229235
    Abstract: An image data compression system, for compressing a frame represented as a plurality of blocks, can include: a lossless compression unit to receive the plurality of blocks and to perform lossless compression thereon resulting in a first code; a lossy compression unit to receive the plurality of blocks and to perform lossy compression thereon resulting in a second code; and a code selection circuit to selectively output one of the first and second codes based upon a figure of merit evaluated for at least one of the first and second codes.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: July 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Rae Kim, Jin-Pyo Park, Jae-Hong Park, Young-Jun Kwon
  • Publication number: 20120183214
    Abstract: According to one embodiment, an apparatus for processing data includes a data input unit, a lossy processing unit, a buffer, a region indication unit, a lossless processing unit, and a data output unit. The data input unit is configured to input time series data. The lossy processing unit is configured to obtain first compressed data by applying lossy processing to the time series data. The buffer is configured to store the first compressed data. The region indication unit is configured to indicate at least one part of the first compressed data. The lossless processing unit is configured to obtain second compressed data by applying lossless processing to the at least one part of the first compressed data. The data output unit is configured to output the second compressed data.
    Type: Application
    Filed: September 14, 2011
    Publication date: July 19, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidenori TAKESHIMA
  • Publication number: 20120183234
    Abstract: Bi-directional bitstream ordering is able to be used for expedited processing. The first part of the bitstream is coded in a standard format, but the end of the bitstream is coded in reverse order. In encoding and decoding, parallel processing is able to be implemented to provide more efficient (parallel and hence faster) encoding and decoding where a bitstream is separated and processed in parallel.
    Type: Application
    Filed: November 2, 2011
    Publication date: July 19, 2012
    Applicant: SONY CORPORATION
    Inventors: Wei Liu, Mohammad Gharavi-Alkhansari
  • Patent number: 8218885
    Abstract: There are provided an image processing section for carrying out processing to detect high frequency components of an image, a calculating section for calculating feature data representing distribution of frequency of appearances of high frequency components, a compression parameter setting section for setting compression parameters based on feature data, and a RAW compression processing section for carrying out RAW compression processing for image data based on compression parameters. Together with data size of lossless compression data, such as RAW data, not becoming large, the processing to do this is carried out in a short time.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: July 10, 2012
    Assignee: Olympus Imaging Corp.
    Inventor: Takashi Ishikawa
  • Patent number: 8208540
    Abstract: A video transcoder is disclosed. The video transcoder generally comprises a processor and a video digital signal processor. The processor may be formed on a first die. The video digital signal processor may be formed on a second die and coupled to the processor. The video digital signal processor may have (i) a first module configured to perform a first operation in decoding an input video stream in a first format and (ii) a second module configured to perform a second operation in coding an output video stream in a second format, wherein the first operation and the second operation are performed in parallel.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: June 26, 2012
    Assignee: LSI Corporation
    Inventor: Guy Cote
  • Patent number: 8189908
    Abstract: A system and method provides video data and its corresponding alpha channel data using a single stream or file, compressed using the same format and decompression algorithm for each of the video data and the alpha channel data.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: May 29, 2012
    Assignee: Adobe Systems, Inc.
    Inventor: Tinic Uro
  • Patent number: 8184690
    Abstract: An image processing apparatus able to encode and decode images by a low cost, small sized circuit configuration, having a temporary storage portion for temporarily storing data, an encoding/decoding processing portion for reading and writing data successively with respect to the temporary storage portion and encoding and decoding the image data in parallel, and a storage control portion for controlling the read and write operations of the data with respect to the temporary storage portion, wherein the storage control portion controls the read and write operations with respect to the temporary storage portion by the encoding/decoding processing portion in the encoding processing and at least read and write operations to the temporary storage portion by the encoding/decoding processing portion in the decoding processing so as to be performed within one frame's worth or one field's worth of processing period in a time division manner.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuji Sumioka, Mitsuaki Shiraga, Yukio Yanagita
  • Patent number: 8160152
    Abstract: A data storage unit (103) stores an image frame in which an image frame which consists of coded data having a data loss or error received by a receiving unit (100) and complementary coded data which is received by receiving unit at a later time are rearranged into normal sequence. A redecoding unit (105) decodes the image frame stored in the data storage unit (103) with reference to one or more already-decoded image frames required for the decoding, and stores the decoded image frame in a frame additionally-storage unit (104). A decoding unit (101) decodes an image frame with reference to an image frame stored in either a frame storage unit (102) or the frame additionally-storage unit 104 according to a command from a control unit (106).
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 17, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shu Murayama, Hiroshi Homma, Kunio Shibata
  • Patent number: 8139876
    Abstract: When an original image containing a code image is lossy-compressed, the image quality of the code image is deteriorated. Thus, due to the deterioration of the image quality of the code image, information contained in the code image cannot be acquired. Thus, a portion corresponding to the code image is not lossy compressed, and the portion corresponding to the code image, which has not been subjected to lossy compression, is stored in a storage unit.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: March 20, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masahiro Takayanagi
  • Patent number: 8135068
    Abstract: A camera comprising a first circuit and a second circuit. The first circuit may be configured to perform image signal processing using encoding related information. The second circuit may be configured to encode image data using image signal processing related information. The first circuit may be further configured to pass the image signal processing related information to the second circuit. The second circuit may be further configured to pass the encoding related information to the first circuit. The second circuit may be further configured to modify one or more motion estimation processes based upon the information from the first circuit.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: March 13, 2012
    Assignee: Maxim Integrated Products, Inc.
    Inventors: José R. Alvarez, Guy Cote
  • Patent number: 8121196
    Abstract: A method and an apparatus for performing multi-threaded video decoding are disclosed. The method takes use of a multi-threaded scheme to process an encoded picture stream on a picture by picture basis. In the method, multiple threads are used for performing video decoding at the same time, such as one thread for the operation of parsing input bits into syntax elements of one picture implemented by the first thread, another thread for the operation of decoding the parsed syntax elements of another picture into pixel values implemented by the second thread, and the other threads for the operations of the non-reference picture, such as bidirectional predictive picture, including parsing input bits into syntax elements and the subsequent operation of decoding the parsed syntax elements into pixel values. Therefore, the decoding speed is substantially increased, and the decoding efficiency is enhanced.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: February 21, 2012
    Assignee: Corel Corporation
    Inventors: Ioannis Katsavounidis, Yu-Nien Chien, Chun-Huan Chuang, Chung-Tao Chu, Te-Chien Chen
  • Patent number: 8116579
    Abstract: A method and an apparatus for compressing or decompressing two-dimensional electronic data are provided. The method for compressing the two-dimensional electronic data set includes dividing the data set into data arrays, performing a wavelet transformation on each array to provide a plurality of wavelet coefficients, and encoding at least some of the wavelet coefficients using an entropy encoding scheme. Each data array preferably relates to a separate and continuous area of an image.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 14, 2012
    Assignee: Imagination Technologies Limited
    Inventors: Simon Fenney, Nico Ritsche
  • Publication number: 20120027314
    Abstract: An apparatus and a method for dividing image data into partition slices and encoding and decoding the image data based on a correlation between macroblocks are provided. The macroblocks may be decoded in parallel and thus, it is possible to improve an overall image quality and processing speed.
    Type: Application
    Filed: July 13, 2011
    Publication date: February 2, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won Chang Lee, Joon Ho Song, Sang Jo Lee
  • Patent number: 8107747
    Abstract: The present invention relates to a real-time wideband compressor for multi-dimensional data. The compressor comprises a plurality of compression engines for simultaneously compressing a plurality of data subsets of a set of input data vectors and providing compressed data thereof using one of SAMVQ or HSOCVQ data compression. Each compression engine comprises an along spectral vectors codevector trainer as well as an across spectral bands codevector trainer. The compression engines are programmable to perform either along spectral vectors codevector training or across spectral bands codevector training in combination with one of the SAMVQ or HSOCVQ techniques without changing hardware. The compressor further comprises a network switch for partitioning the set of input data vectors into the plurality of data subsets, for providing each of the plurality of data subsets to one of the plurality of compression engines, and for transmitting the compressed data.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: January 31, 2012
    Assignee: Canadian Space Agency
    Inventors: Shen-En Qian, Allan B. Hollinger, Luc Gagnon
  • Patent number: 8107540
    Abstract: A method to determine real time image complexity in video streaming, IPTV and broadcast applications using a statistical model representing channel bandwidth variation and image complexity that considers scene content changes. Available channel bandwidth is distributed unevenly among multiple video streams in proportion to bandwidth variation and image complexity of the broadcast video stream. The distribution of available channel bandwidth is determined based upon an image complexity factor of each video stream as determined from probability matrices considering bandwidth variations and image complexity.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: January 31, 2012
    Assignee: Cheetah Technologies, L.P.
    Inventor: Praveen A. Mohandas
  • Patent number: 8085446
    Abstract: An image processing device includes a first encoding processing portion to perform first encoding processing according to a first compression method for compressing multilevel image data and a second encoding processing portion to perform second encoding processing according to a second compression method for compressing binary image data. A determination portion determines whether an image made up of acquired image data is a monochrome image. A data volume estimating portion makes an estimation between a first data volume when image data forming the monochrome image is compressed by the first encoding processing and a second data volume when the image data is compressed by the second encoding processing as to which data volume becomes smaller. A file creating portion creates a data file from image data that has the smaller volume.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: December 27, 2011
    Assignee: Kyocera Mita Corporation
    Inventor: Hiroyuki Harada
  • Publication number: 20110305400
    Abstract: An apparatus and method provide parallel encoding and decoding of image data based on correlation of macroblocks. To encode and decode image data having a high resolution, an encoding order may be determined based on a correlation between blocks of the image data, and a decoding order may be determined based on the determined encoding order, thereby efficiently processing the blocks in parallel.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 15, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joon Ho Song, Shi Hwa Lee, Do Hyung Kim
  • Patent number: 8073272
    Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: December 6, 2011
    Assignee: Altera Corporation
    Inventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles W. Kurak, Jr.
  • Patent number: 8068681
    Abstract: A method and system for pipelined processing in an integrated embedded image and video accelerator is described. Aspects of a system for pipelined processing in an integrated embedded image and video accelerator may include circuitry that enables pipeline processing of video data within a single chip, wherein the pipeline processing may further include decoding of a block of video data while simultaneously inverse transforming a previously decoded block of video data. Aspects of the system may also include circuitry that enables transformation, within the single chip, of a block of said video data while simultaneously encoding, within said single chip, a previously transformed block of video data.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: November 29, 2011
    Assignee: Broadcom Corporation
    Inventors: Taiyi Cheng, Mark Hahm, Li Fung Chang
  • Patent number: 8064524
    Abstract: The present invention is directed to de-interlacing method and apparatus using remote interpolation. An up window and a down window are firstly determined. The closest pair of pixels of the up window and the down window along a direction of 90°, ?45°, and 45° is determined, which is then used to interpolate a new pixel. Subsequently, the up window and the down window are moved or stayed according to which pair is determined as being closest.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: November 22, 2011
    Assignee: Via Technologies, Inc.
    Inventor: Lien-Hsiang Sung
  • Patent number: 8050325
    Abstract: A system and method for more efficiently determining motion vectors of uncovering areas adjacent the edge of frames when the frame image is moving in the direction of the frame boundary. Backwards motion estimation is used to determine a block of video data which is, in one implementation, the block of video data adjacent the frame edge having a reliable motion vector known from the first frame. Once the block is identified, the blocks of video data in the uncovering area between the identified block and the frame boundary can then be assigned the motion vector data of the identified block.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: November 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Zhi Zhou, Yeong Taeg Kim
  • Patent number: 8036476
    Abstract: The invention provides an image encoding/decoding device and method. An encoding/decoding architecture of the invention includes: encoders for encoding image data into data blocks; a reordering multiplexer for receiving the data blocks and determining an order by which the data blocks are written into a memory according to an order of an achieved percentage of an encoding progress for each encoder; a memory writing unit, a memory dispatcher, a memory controller, and a memory reading unit, for writing the data blocks into the memory and reading the data blocks from the memory; a request demultiplexer for receiving the read data blocks from the memory reading unit and outputting the received data blocks according to data request signals; and decoders for generating the data request signals, receiving the output data blocks from the request demultiplexer, decoding the received data blocks, and then outputting the decoded data blocks.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: October 11, 2011
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wen-Che Wu, Hsien-Chun Chang
  • Patent number: 8036517
    Abstract: A video stream (for example, H.264 video) includes intra-encoded portions. Decoding an intra-encoded portion utilizes the result of decoding one or more other portions (called predecessors) in the frame. Frame reconstruction involves identifying a portion that has no predecessor portions that have not been decoded and then initiating decoding of the identified portion(s). When the decoding of a portion is substantially complete, then the remaining portions to be decoded are examined to identify portions that have no predecessors that have not been decoded. By carrying out this method, multiple portions may be decoded simultaneously. Each can be decoded on a different work entity, thereby increasing the rate of decoding of the overall frame. Because deblock filtering a predecessor destroys information needed in the intra-decoding of other portions, prefiltered predecessor information is stored in a buffer for subsequent use during intra-decoding, thereby facilitating simultaneous decoding of multiple portions.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: October 11, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Jayson Roy Smith, Aravind Bhaskara
  • Publication number: 20110243467
    Abstract: In this invention, scan conversion processing of changing the scan order for each block is used. Parallel scan conversion processing is executed if possible, thereby making the number of scan conversion target blocks per unit time larger than before. To do this, a scan status holding unit holds statistical information based on the appearance frequency values of coefficients in a block. A scan order holding unit holds coefficient position information in which the coefficient positions in a block are arranged based on the scan order. A parallel number determination unit determines the number of blocks processable in parallel based on the statistical information held in the scan status holding unit and supplies the result to a scan conversion unit as a control signal. If the control signal from the parallel number determination unit indicates parallel processing, the scan conversion unit executes scan conversion of two input blocks in parallel.
    Type: Application
    Filed: February 1, 2010
    Publication date: October 6, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Susumu Igarashi
  • Patent number: 8031772
    Abstract: Disclosed herein is a video decoding system of a mobile broadcasting receiver. The video decoding system of a mobile broadcasting receiver for decoding a compression-coded video signal includes: at least one buffer memory for performing video decoding; a plurality of coprocessors including a data processing unit partitioned into one or more hardware blocks, wherein the data processing unit performs actual video decoding via data input/output from/to the buffer memory; and a DMA (Direct Memory Access) coprocessor for performing a direct access operation to an external memory, wherein, the at least one buffer memory, the plurality of coprocessors and the DMA coprocessor take the form of hardware, and operations thereof are controlled via software in a processor.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: October 4, 2011
    Assignee: LG Electronics Inc.
    Inventor: Sang Chul Kim
  • Patent number: 8031960
    Abstract: Wavelet transformation is performed at a plurality of levels as to image signals. A first buffer stores, independently for each of the levels, a part of coefficients from results of analysis filtering in a horizontal direction of the image signals. A second buffer stores, independently for each of the levels, a part of coefficients generated in a computation process of analysis filtering in a vertical direction of the image signals. A vertical filtering unit performs the vertical direction analysis filtering, using coefficients read out from the first and second buffers. A horizontal filtering unit performs analysis filtering in the horizontal direction, using coefficients from the results of the vertical direction analysis filtering as the input of the horizontal direction analysis filtering for the next level, except for the final level of the levels.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: October 4, 2011
    Assignee: Sony Corporation
    Inventors: Takahiro Fukuhara, Katsutoshi Ando, Naoto Nishimura, Yuuki Tanaka
  • Patent number: 8000389
    Abstract: The method is characterized in that the step for selecting a coding mode from the inter modes and from the intra modes is broken down into two sequential steps, a step for preselecting the intra coding mode for preselecting an intra mode for the current macroblock from the intra coding modes, and a coding decision step, part of the effective coding of the current macroblock for selecting the mode of coding the current macroblock from the inter modes and the preselected intra mode and in that the preselection step for the current macroblock is carried out during the coding decision step for a preceding macroblock.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: August 16, 2011
    Assignee: Thomson Licensing
    Inventors: Xavier Ducloux, Yannick Olivier, Anne Lorette