Abstract: An ultrasound imaging device and a clutter filtering method using the same are disclosed. The clutter filtering method using the ultrasound imaging device according to one embodiment includes obtaining ultrasound data from a field-of-view (FOV) of an object, generating decomposition data including common scale information by performing rank matrix decomposition once on all of the obtained ultrasound data, estimating local characteristic information by reflecting spatial information on each pixel to the common scale information, and extracting a blood flow signal by performing filtering on each pixel based on the estimated local characteristic information.

Abstract: An information processing apparatus includes circuitry configured to recognize a character in an original image by character recognition, to generate a font, calculate a certainty factor of the character recognition, determine a color of the font based on the certainty factor by a first processing method, and determine a replacement color by a second processing method based on the certainty factor, and convert the original image into an editable electronic document including the font and an image in which the character pixel has the replacement color. The replacement color is a color to which a color of a character pixel of the recognized character is replaced.

Abstract: A method for ascertaining/mapping between a matrix element (ME) and a comparison ME (CME) of a comparison matrix (CM), including writing the ME position in a table element (TE) of a correspondence table (CT) for a number of MEs, and following a predefined offset, reading out a TE, ascertaining the ME position stored in the TE until the read for the same number of MEs has been performed, establishing a mapping from the TE's read-out position and a CME's current position. The writing includes reading out a ME feature, ascertaining an access feature (AF) from the ME feature, ascertaining a TE of the CT from the AF, and writing the ME position in the ascertained TE. The reading includes reading out a CME feature, ascertaining an AF from the CME, ascertaining a TE of the CT from the AF, and reading out the ME's stored position from the ascertained TE.

Abstract: The present disclosure provides a wafer inspection technology that involves less degradation of the image quality even when an object to be observed has a variation in height due to warpage, etc. of a wafer. This wafer inspection apparatus obtains an image with less degradation by: adjusting the focal point of an observation optical system to a height measured by a height sensor for measuring wafer surface heights; and further, correcting a switching signal for a CCD line sensor on the basis of stage position data and optical magnification data corresponding to the height so as to make a correction corresponding to the wafer surface height.

Abstract: Output control is separately performed on pixels corresponding to a plurality of different regions (ROIs) in the entire region of an imaging element. An imaging element that captures an image of a subject includes first and second pixels. First and second analog-to-digital converters convert pixel signals from the first and second pixels from an analog value to a digital value. A first switch supplies a pixel signal from the first pixel to any one of the first and second analog-to-digital converters. A second switch supplies a pixel signal from the second pixel to any one of the first and second analog-to-digital converters.

Abstract: An image processing apparatus includes a memory holding image data generated by an image reader; a memory controller for accessing the memory; first and second image processors for executing image processing on the image data one line at a time, the second image processor being added when implementing functional expansion; a connector for connecting the first and second image processors by a transfer path of the image data when implementing the functional expansion; first and second generators for respectively generating first and second allowance signals for allowing reading of a next line of the image data from the memory, according to the image processing times taken by the first and second image processors; and an allower configured to output, to the memory controller, a third allowance signal for allowing reading of the next line of the image data from the memory, based on the first and second allowance signals.

Abstract: According to an embodiment, a transformation matrix deriving device includes a first trajectory generator, a second trajectory generator, a trajectory matcher, and a deriver. The first trajectory generator is configured to generate a first trajectory of a moving object, detected from a video, in a first coordinate system. The second trajectory generator is configured to generate a second trajectory of a moving object in a second coordinate system, from time-series data of positional information. The trajectory matcher is configured to associate the first trajectory with the second trajectory to be a motion trajectory of the same moving object based on a similarity between the first trajectory and the second trajectory. The deriver is configured to derive a transformation matrix that transforms the second coordinate system into the first coordinate system by using the first trajectory and the second trajectory associated with each other.

Abstract: An image retrieval apparatus includes a processor, and the processor performs a process including: determining an image in which a first characteristic object is included in a subject to be a first image, and determining an image that is captured after the first image and in which a second characteristic object is included in the subject to be a second image, from among a series of captured images; specifying images as an image group, the images being captured during a period after the first image is captured before the second image is captured from among the series of captured images; and extracting a representative image from the image group.

Abstract: An apparatus is described. The apparatus includes an execution lane array coupled to a two dimensional shift register array structure. Locations in the execution lane array are coupled to same locations in the two-dimensional shift register array structure such that different execution lanes have different dedicated registers.

Abstract: An apparatus is described that include a line buffer unit composed of a plurality of a line buffer interface units. Each line buffer interface unit is to handle one or more requests by a respective producer to store a respective line group in a memory and handle one or more requests by a respective consumer to fetch and provide the respective line group from memory. The line buffer unit has programmable storage space whose information establishes line group size so that different line group sizes for different image sizes are storable in memory.

Abstract: A buffer device includes input lines, an input buffer unit and a remapping unit. The input lines are coupled to a memory and configured to be inputted with data from the memory in a current clock. The input buffer unit is coupled to the input lines and configured to buffer one part of the inputted data and output the part of the inputted data in a later clock. The remapping unit is coupled to the input lines and the input buffer unit, and configured to generate remap data for a convolution operation according to the data on the input lines and the output of the input buffer unit in the current clock. A convolution operation method for a data stream is also disclosed.

Abstract: An image processing apparatus for processing image data by a plurality of pipeline-connected processing modules is provided. The apparatus includes a first pipeline processing unit configured to include a plurality of processing modules including a processing module which processes image data for every first size; and a second pipeline processing unit configured to be branched from the first pipeline processing unit and include a plurality of processing modules including a processing module which processes image data for every second size different from the first size. The second pipeline processing unit includes, at a start, a change unit configured to acquire partial image data of the first size from the first pipeline processing unit and change the partial image data of the first size into partial image data of the second size.

Abstract: Examples of the present disclosure provide apparatuses and methods for determining a data storage layout. An example apparatus comprising a first address space of a memory array comprising a first number of memory cells coupled to a plurality of sense lines and to a first select line. The first address space is configured to store a logical representation of a first portion of a value. The example apparatus also comprising a second address space of the memory array comprising a second number of memory cells coupled to the plurality of sense lines and to a second select line. The second address space is configured to store a logical representation of a second portion of the value. The example apparatus also comprising sensing circuitry configured to receive the first value and perform a logical operation using the value without performing a sense line address access.

Abstract: A method and apparatus for processing images. A set of candidate targets is identified in a first image and in a second image that corresponds with the first image. A set of first scores is generated for the set of candidate targets using the first image. A set of second scores is generated for the set of candidate targets using the second image. A set of final scores is computed for the set of candidate targets using the set of first scores and the set of second scores. A determination is made as to which of the set of candidate targets is a target of interest based on the set of final scores.

Abstract: A method and system for coordinated data execution in a computer system. The system includes a first graphics processor coupled to a first memory and a second graphics processor coupled to a second memory. A graphics bus is configured to couple the first graphics processor and the second graphics processor. The first graphics processor and the second graphics processor are configured for coordinated data execution via communication across the graphics bus.

Abstract: A system and method are presented by which data on a graphics processing unit (GPU) can be output to one or more buffers with independent output frequencies. In one embodiment, a GPU includes a shader processor configured to respectively emit a plurality of data sets into a plurality of streams in parallel. Each data is emitted into at least a portion of its respective stream. Also included is a first number of counters configured to respectively track the emitted data sets.

Abstract: According to one embodiment, a solid-state imaging device includes a pixel array and AD converting unit. In the AD converting unit, a plurality of AD converts are arranged in a horizontal direction. The pixel is configured by a small pixel group. The small pixel group is formed of a plurality of small pixels. The plurality of small pixels read out the signal charges. The small pixel group includes two or more small pixels having different optical sensitivities. The solid-state imaging device includes N AD converting units. N is the number of small pixel groups which are arranged in a vertical direction at every small pixel. N is an integer of 2 or higher.

Abstract: Systems, methods, and computer program products receive an image request identifying an image having a width and a height. A number of interleaved buffers is identified, each of the interleaved buffers operable to store data associated with the image. The image is split into each of the interleaved buffers on a computing device. An interleaved image is displayed corresponding to at least one of the interleaved buffers, where the interleaved image having substantially the same width and height of the image.

Abstract: A method generates an image from a set of image zones each delimited by a contour of polygonal shape defined by a set of vertexes, and comprising pixels having an attribute value which can be deduced from the value of a corresponding attribute of each of the vertexes of the image zone. The method includes determining to within a pixel the pixels that belong to each image zone according to the dimensions in number of pixels of the image to be generated; associating the pixels of each image zone in blocks of pixels; and determining an attribute value for each block of pixels of each image zone as a function of the value of the corresponding attribute of each vertex of the image zone.

Abstract: A second projector projects and displays a measurement pattern on a projection screen while a first projector projects and displays another measurement pattern on the projection screen. The second projector causes an imaging unit to acquire a captured image including projection images of the two measurement patterns are captured, and detects coordinates of measurement points which are represented in the measurement patterns from the captured image. The second projector corrects the projection target image based on the coordinates such that the projection image by the first projector and its own projection image are in a desired relationship.

Abstract: The present invention relates to the parallel calculation of convoluted data. In particular, the invention relates to Gaussian pyramid construction and parallel processing of image data, such as parallel calculation of repeatedly convoluted data for use in a SIFT algorithm.

Abstract: A print image processing system includes plural logical page interpretation units, a caching interpretation unit, and a print image data generation unit. The plural logical page interpretation units interpret different logical pages in print data in parallel to obtain interpretation results, and output the interpretation results. The caching interpretation unit interprets an element to be cached which is included in each of logical pages in the print data to obtain interpretation results, and stores the interpretation results in a cache unit. The print image data generation unit generates print image data of the logical pages using the interpretation results of the logical pages output from the logical page interpretation units and the interpretation results of the elements to be cached stored in the cache unit. The print image data generation unit supplies the generated print image data to a printer.

Abstract: A parallax representation unit in a displayed image processing unit uses a height map containing information on a height of an object for each pixel to represent different views caused by the height of the object. A color representation unit uses, for example, texture coordinate values derived by the parallax representation unit to render the image, shifting the pixel defined in the color map. The color representation unit uses the normal map that maintains normals to the surface of the object for each pixel to change the way that light impinges on the surface and represent the roughness accordingly. A shadow representation unit uses a horizon map, which maintains information for each pixel to indicate whether a shadow is cast depending on the angle relative to the light source, so as to shadow the image rendered by the color representation unit.

Abstract: A quality display is disclosed. Embodiments of the invention provide for the display of an indication of quality of a geographic survey. In some example embodiments, a survey grid corresponding to the geographic boundaries of a dynamically created survey area is displayed, where the displayed survey grid expands based on the geographic movement of survey participants. In additional embodiments, data representing the survey grid, cells of the survey grid, and a plurality of sub-cells into which each cell of the survey grid is divided is stored. In other embodiments, a numerical index corresponding to the quality of the survey in each cell of the survey grid is determined based on positioning information. In still other embodiments, a display attribute associated with each cell of the survey grid is adjusted in accordance with the numerical index.

Abstract: Disclosed herein is a real-time face recognition apparatus and method. A real-time face recognition apparatus includes a face detection unit for detecting a face image by obtaining image coordinates of a face from an input image. An eye detection unit obtains image coordinates of both eyes in the face image. A facial feature extraction unit generates feature histogram data based on parallel processing from the face image. A DB unit stores predetermined comparative feature histograms. A histogram matching unit compares the histogram data generated by the facial feature extraction unit with the comparative feature histograms, and then outputting similarities of face images. The face recognition apparatus may be implemented as internal hardware in which a VGA camera and an exclusive chip interface with each other, thus remarkably reducing a system size and installation cost, and performing face recognition in real time without requiring additional equipment.

Abstract: Fingerprint images that are required for fake-finger determination can be acquired with a single input operation, and the user-friendliness and the determination accuracy of a fake-finger are improved.

Abstract: Provided herein is a method for implementing antialiasing including independently operating different portions of a graphics pipeline at different sampling rates in accordance with pixel color details.

Abstract: A method of analyzing a target item utilizing multiple scanners is disclosed. The method can include providing an item comprising a material. The method can further include acquiring a first set of scan data associated with the item using a first scanner, and acquiring a second set of scan data associated with the item using a second scanner. The method can further include generating a first set of transform data from the first set of scan data, analyzing the first set of transform data to identify a subset of the first set of transform data associated with a first region, and analyzing the second set of scan data to identify a subset of the second set of scan data associated with a second region.

Abstract: A system and method for parallel processing of semantically grouped data in data warehouse environments is disclosed. A datastore object having a number of records is generated in a data warehouse application. A hash value is added to each record. The hash value has an integer domain, and is uniformly distributed over the integer domain across the datastore object. A selection table is generated to create a number of tasks based on discrete ranges of the hash value. Then, a transformation routine is executed on each of the number of tasks in parallel to generate an infocube of data that corresponds to each range of the discrete ranges of the hash value.

Abstract: Disclosed are methods and apparatus for operating a page parallel RIP printing system including a plurality of image marking engines (IMEs). According to an exemplary method, a print job is split into a plurality of job chunks, each job chunk grouped by its destination IME; and the job chunks are processed into a printer ready format by a plurality of RIP nodes associated with the job chunk group's respective destination IME.

Abstract: System and methods for gamut bounded saturation adaptive color enhancement are provided. Color enhancement incorporating gamut bounded saturation enhances colors of an pixel from a source color gamut such that the resulting color is within a target color gamut. This resulting color may, for example, take advantage of an expanded target color gamut of a display. Gamut bounded saturation may be implemented independently or in combination with RGB bounded saturation.

Abstract: An image processing system includes intermediate-data generating apparatuses and one or more drawing-data generating apparatuses. The intermediate-data generating apparatuses interpret data of pages forming PDL document data, the pages being assigned to the corresponding intermediate-data generating apparatuses, to generate elements of intermediate data of the pages. The drawing-data generating apparatuses each obtain assigned elements of the intermediate data and each draw the obtained elements to generate drawing data including information concerning pixels forming each obtained element. The drawing-data generating apparatuses each include a memory that stores intermediate data or drawing data of a common element used in the obtained elements. If the intermediate data or the drawing data of the common element is stored in the memory, the drawing-data generating apparatuses generate drawing data of the obtained elements using the stored intermediate data or drawing data.

Abstract: An image processing apparatus, includes an image-scanning unit, and an image processing unit, wherein when the image-scanning unit continuously scans a plurality of documents, the image-scanning unit continuously scans the documents and parallel the image processing unit executes image processing on the scanned documents.

Abstract: An image forming apparatus includes a renderer configured to render a one page amount of image data based on intermediate data generated by either a first execution unit or a second execution unit, a printer engine configured to form image data of a page rendered by the renderer on a recording medium, and after forming the image data, stop each unit in the engine when there is no image data formation instruction corresponding to a next page of the page even after a cycle down time limit has elapsed, and a request unit configured to, during generation of intermediate data of a predetermined page by the first execution unit, request an extension of the cycle down time limit set in the printer engine based on a number of pages of rendered image data corresponding to intermediate data of pages following the predetermined page.

Abstract: Apparatus, systems and methods for low latency remote display rendering using tile-based rendering systems are disclosed. In one implementation, a system includes a network interface and a content source coupled to the network interface. The content source being capable of rendering at least one tile of a tiled image, encoding the at least one tile, and providing the at least one encoded tile to the network interface before all tiles of the tiled image are rendered.

Abstract: An electronic device for parallel image processing using multiple processors is disclosed. The electronic device includes multiple image sensors for providing image data. The electronic device also includes multiple processors for processing segmented image data to produce processed segmented image data. Each processor is dedicated to one of the image sensors. A multiple processor interface is also included. The multiple processor interface maps the image data to the processors, segments the image data to produce the segmented image data and synchronizes the segmented image data to processor clock rates.

Abstract: Systems and methods are disclosed for video processing modules. More specifically a network is disclosed for processing data. The network comprises a register DMA controller adapted to support register access and at least one node adapted to the data. At least one link communicates with the node, and is adapted to transmit data and at least one network module communicates with at least the link, and is adapted to route data to at least the link.

Abstract: Systems and methods resize images for a wagering game. The images are resized by analyzing the content of the image, and removing or adding data from/to the image in accordance with the content analysis. The content analysis may include determining an energy level, where portions of the image having a low energy level are adjusted, and portions having a higher energy level are not adjusted, or adjusted less.

Abstract: A reception processing unit provided in a document processing system receives a document data processing request from a user device. A division processing unit divides document data corresponding to the processing request and generates divided document data. A document processing unit performs document processing for the divided document data, and a coupling processing unit combines the document-processed divided document data. A resource management unit increases or decreases the number of the division processing units, the document processing units, and the coupling processing units in response to the processing status of each thereof.

Abstract: A method for providing two or more processors access to a single command buffer is provided. The method includes receiving instructions in the command buffer from a central processor, at least one of the instructions being designated for a particular one of the two or more processors. The method also includes sending the at least one instruction to only the particular processor.

Abstract: Embodiments of the present invention provide a system for performing image conversion operations. The system starts by receiving a request from a client for one or more pixel buffers containing a pixel-formatted, cropped, geometrically transformed, and/or color matched version of an image representation. The system then determines if a provider can provide the one or more pixel buffers. If so, the system calls the provider to generate the one or more pixel buffers containing the pixel-formatted, cropped, geometrically transformed, and/or color matched version of the image representation. Otherwise, the system calls the provider to generate one or more intermediate pixel buffers, generates a sequence of converters for converting the one or more intermediate pixel buffers, and calls the sequence of converters to generate the one or more pixel buffers containing the pixel-formatted, cropped, geometrically transformed, and/or color matched version of the image representation.

Abstract: Input amount calculation processing and output amount calculation processing corresponding to each processing module are defined. The input amount calculation processing and the output amount calculation processing are performed in a processing order (a reverse order to the processing order) to obtain a favorable peripheral pixel amount.

Abstract: Assets of raw geo-located imagery can be divided into tiles and coverage masks can be generated for each tile. For each tile, fragments of pixels from coverage masks of neighboring tiles can be extracted and tagged. The fragments can be sorted and stored in a data structure so that fragments having the same tag can be grouped together in the data structure. The fragments can be used to feather the coverage mask of the tile to produce a blend mask. Multi-resolution imagery and mask pyramids can be generated by extracting fragments from tiles and minified (e.g., down-sampled). The minified fragments can be tagged (e.g., by ancestor tile name), sorted and stored in a data structure, so that fragments having like tags can be stored together in the data structure. The fragments can be assembled into fully minified tiles for each level in the pyramid.

Abstract: A computer-implemented method for calculating a multi-dimensional wavelet transform in an image processing system comprising a plurality of computation units includes receiving multi-dimensional image data. An overlap value corresponding to a number of non-zero filter coefficients associated with the multi-dimensional wavelet transform is identified. Then the multi-dimensional image data is divided into a plurality of multi-dimensional arrays, wherein the multi-dimensional arrays overlap in each dimension by a number of pixels equal to the overlap value. A multi-dimensional wavelet transform is calculated for each multi-dimensional array, in parallel, across the plurality of computation units.

Abstract: Methods and apparatuses for scheduling and storing media creation are described. Methods and apparatuses for rendering a plurality of vector graphic objects on a display are also described.

Abstract: This invention provides a computer processor architecture optimized for power-efficient computation of certain sensory recognition (e.g. vision) algorithms on a single computer chip. Illustratively, the architecture is optimized to carry out low-level routines and a special class of high-level sensory recognition routines derived from research into human brain perception processes. In an illustrative embodiment, the processor includes a plurality of processing nodes, arranged in a hierarchy of layers, and the processor resolves features from sensory information input and provides the feature information as input to a lowest hierarchy layer thereof. The hierarchy simultaneously, recognizes multiple components of the features, which are transferred between the layers so as to build likely recognition candidates. Each node can further include memory constructed and arranged to refresh and retain features determined to be likely recognition candidates by a thresholding process.

Abstract: A print image processing apparatus, includes N image processing circuits; a selection unit that estimates, every N pages, a necessary time corresponding to each of (i) a page-based parallel method for allocating image processing of the N pages to the image processing circuits in units of pages to perform the image processing of the N pages in parallel, and (ii) a paginal-object-based parallel method for allocating image processing of each single page to the image processing circuits in units of objects to perform the image processing of the objects of each single page in parallel, and selects one of the page-based parallel method and the paginal-object-based parallel method such that the estimated necessary time corresponding to the selected one of the parallel methods is shorter than the estimated necessary time; and an allocation unit that allocates image processing of the N pages to the N image processing circuit, respectively.

Abstract: Systems and methods are disclosed for video processing modules. More specifically a network is disclosed for processing data. The network comprises a register DMA controller adapted to support register access and at least one node adapted to the data. At least one link communicates with the node, and is adapted to transmit data and at least one network module communicates with at least the link, and is adapted to route data to at least the link.

Abstract: Systems, methods, and computer-readable storage media for resizing images using seam carving techniques may include generation of a partial solution matrix by at least partially isolating dependencies between sub-problems of a dynamic programming problem corresponding to its solution within different regions of an input image. The number and/or shape of the isolated (or partially isolated) sub-problems may be dependent on the access pattern used by a dynamic programming operation to identify seams in the input image. Multiple sub-problems may be processed independently and in parallel on respective processor core(s) or threads thereof to generate the partial solution matrix. The partial solution matrix may then be processed to identify one or more low-cost seams of the input image. The methods may be implemented as stand-alone applications or as program instructions implementing components of a graphics application, executable by a CPU and/or GPU configured for parallel processing.

Abstract: In general, the present disclosure describes various techniques for programmable, pattern-based unpacking and packing of data channel information, including still image, video, and audio component data. One example device comprises a programmable processor having a plurality of processing pipelines. The processor is configured to receive pattern information that specifies a pattern for a plurality of input data components, the pattern information comprising a plurality of pattern elements that are each associated with one or more of the input data components, and each input data component being selected from a component group consisting of a still image data component, an audio data component, and a video data component. For example, the input data components may comprise pixel data components, such as color channels. The processor is further configured to provide each input data component to a selected processing pipeline of the processor in accordance with the pattern information.