Vapor Or Gas Deposition Patents (Class 427/96.8)
  • Patent number: 12066467
    Abstract: An electro-wetting on dielectric (EWOD) device, comprises first and second substrates defining a fluid chamber therebetween, a plurality of electro-wetting electrodes on the first substrate, and at least one first electrode and at least two second electrodes on the second substrate. The device further includes a current sensor for sensing a difference between (1) a first current flowing between the first electrode and one of the second electrodes via a first fluid package in the fluid chamber of the EWOD device and (2) a second current flowing between the first electrode and another of the second electrodes via a second fluid package in the fluid chamber of the EWOD device.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: August 20, 2024
    Assignee: Sharp Life Science (EU) Limited
    Inventors: Christopher James Brown, Benjamin James Hadwen
  • Patent number: 11371138
    Abstract: Chemical vapor deposition (CVD) processes which use a ruthenium precursor of formula R1R2Ru(0), wherein R1 is an aryl group-containing ligand, and R2 is a diene group-containing ligand and a reducing gas a described. The CVD can include oxygen after an initial deposition period using the ruthenium precursor and reducing gas. The method can provide selective Ru deposition on conductive materials while minimizing deposition on non-conductive or less conductive materials. Further, the subsequent use of oxygen can significantly improve deposition rate while minimizing or eliminating oxidative damage of the substrate material. The method can be used to form Ru-containing layers on integrated circuits and other microelectronic devices.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: June 28, 2022
    Assignee: ENTEGRIS, INC.
    Inventors: Philip S. H. Chen, Bryan C. Hendrix, Thomas H. Baum
  • Patent number: 9595695
    Abstract: A method for using a vacuum apparatus that includes a vacuum chamber and a pump, the vacuum chamber housing an object, the pump reducing an internal pressure of the vacuum chamber, the method including: ventilating inside the vacuum chamber by introducing a gas into the vacuum chamber and discharging the gas from the vacuum chamber by causing the pump to reduce the internal pressure of the vacuum chamber. In the ventilating, a discharge rate at which molecules of the gas per unit volume are discharged is at least 3.3×10?5 mol/(s·L), and the temperature in the vacuum chamber is at least 15° C. and at most 80° C.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: March 14, 2017
    Assignee: JOLED INC.
    Inventor: Yuko Kawanami
  • Patent number: 8988758
    Abstract: A thermochromic window doped with a dopant and a method of manufacturing the same. The thermochromic window includes a substrate and a thermochromic thin film formed on the substrate. The thermochromic thin film has a thermochromic material doped with a dopant, the concentration of the dopant gradually decreasing in a depth direction from one surface of the upper surface and the undersurface of the thermochromic thin film. The thermochromic window has a high level of visible light transmittance and high phase change efficiency while having a low phase transition temperature.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventors: Yong Won Choi, Yung-Jin Jung, Dong Gun Moon, Jee Yun Cha
  • Patent number: 8974888
    Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a silane applied to the ends of glass fibers in via holes. In one embodiment, during a plated through-hole (PTH) via fabrication process, glass fiber bundles exposed in a drilled through-hole are selectively sealed. For example, after the through-hole is drilled in a substrate, the substrate may be subjected to an aqueous silane bath (e.g., an organo trialkoxysilane in an aqueous solution of an acid that acts as a catalyst) to deposit a layer of silane on the exposed glass fiber bundle ends. For example, trialkoxy groups of the silane may react with exposed silanols on the glass to form a siloxane, which is further polymerized to form a silane polymer barrier layer on the exposed glass fiber ends. The barrier layer effectively seals the glass fiber bundles and eliminates the conductive anodic filament (CAF) pathway between PTH vias.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: March 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Gregory E. Balcome, Brett P. Krull, Joseph Kuczynski, Terry G. Ryks, Timothy J. Tofil
  • Publication number: 20150061942
    Abstract: Provided is a translucent conductive patterned member in which, as the metal pattern portion itself has a translucency, the metal pattern portion is hardly visible, and scattering caused by a moiré or diffraction is reduced, and in which it is also provided with sufficient conductivity. The translucent conductive patterned member is provided with a base layer formed by using a compound containing a nitrogen atom and a conductive pattern portion having a translucency in which the conductive pattern portion is formed on at least one part of the base layer by using silver or an alloy containing silver as a main component.
    Type: Application
    Filed: April 5, 2013
    Publication date: March 5, 2015
    Inventor: Hirokazu Koyama
  • Patent number: 8961745
    Abstract: The plant is suitable to produce a semiconductor film (8) having a desired thickness and consisting substantially of a compound including at least one element for each of the groups 11, 13, and 16 of the periodic classification of elements. The plant comprises an outer case (1) embedding a chamber (2) divided into one deposition zone (2a) and one evaporation zone (2b), which are separated by a screen (3) interrupted by at least one cylindrical transfer member provided with actuation means rotating about its axis (5). To the deposition zone (2a) a magnetron device (7) is associated, for the deposition by sputtering of at least one element for each of the groups 11 and 13 on the side surface (?) of the cylindrical member that is in the deposition zone (2a). To the evaporation zone (2b) a cell (10) for the evaporation of at least one element of the group 16 is associated, and such an evaporation zone (2b) houses a substrate (8a) on which the film (8) is produced.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: February 24, 2015
    Assignee: VOLTASOLAR S.r.l.
    Inventors: Maurizio Filippo Acciarri, Simona Olga Binetti, Leonida Miglio, Maurilio Meschia, Raffaele Moneta, Stefano Marchionna
  • Publication number: 20150036969
    Abstract: An apparatus comprising a dispersion plate, a dispersion plate, the dispersion plate including input side openings connected to holes therein, the holes following a torturous path through the dispersion plate and configured to deliver dopants through output side openings of the dispersion plate.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 5, 2015
    Applicant: LGS Innovations LLC
    Inventors: Hugo Safar, Mike Santo, Brijesh Vyas
  • Publication number: 20150024119
    Abstract: A method and an arrangement are disclosed for transferring electrically conductive material in fluid form onto a substrate. Said substrate is preheated to a first temperature, and of said electrically conductive material there is produced fluid electrically conductive material. The fluid electrically conductive material is sprayed onto the preheated substrate to form a pattern of predetermined kind. The substrate onto which said fluid electrically conductive material was sprayed is cooled to a third temperature, which is lower than the melting point of said electrically conductive material.
    Type: Application
    Filed: January 30, 2013
    Publication date: January 22, 2015
    Inventors: Juha Maijala, Petri Sirviö
  • Patent number: 8822833
    Abstract: A method of making a touch sensor assembly comprises: forming conductive trace elements on a transparent substrate; forming an insulator layer on the transparent substrate such that the insulator layer covers a portion of the conductive trace elements; and forming a plurality of conductive bridging lines such that each of the conductive bridging lines bridges two corresponding ones of the conductive trace elements. Each of the conductive bridging lines includes a plurality of conductor layers stacked one above the other and differing from one another in reflectivity. One of the conductor layers is formed by reacting a reactive gas with a metallic material, and has a reflectivity less than that of the metallic material.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: September 2, 2014
    Assignee: Cando Corporation
    Inventors: Fan Hsu, Chi-Kuang Lai
  • Patent number: 8802194
    Abstract: Methods and compositions for depositing a tellurium-containing film on a substrate are disclosed. A reactor and at least one substrate disposed in the reactor are provided. A tellurium-containing precursor is provided and introduced into the reactor, which is maintained at a temperature ranging from approximately 20° C. to approximately 100° C. Tellurium is deposited on to the substrate through a deposition process to form a thin film on the substrate.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: August 12, 2014
    Assignee: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude
    Inventors: Hana Ishii, Julien Gatineau
  • Publication number: 20140161992
    Abstract: There is provided a Cu wiring forming method for forming a Cu wiring by filling Cu in a recess, which is formed in a predetermined pattern in a Si-containing film of a substrate. The Cu wiring forming method includes forming a Mn film, which becomes a self-aligned barrier film by reaction with an underlying base, at least on a surface of the recess by chemical vapor deposition, forming a Cu film by a physical vapor deposition to fill the recess with the Cu film, and forming a Cu wiring in the recess by polishing the entire surface of the substrate by a chemical mechanical polishing.
    Type: Application
    Filed: December 5, 2013
    Publication date: June 12, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Tadahiro ISHIZAKA, Kenji SUZUKI, Atsushi SHIMADA
  • Publication number: 20140154405
    Abstract: The present invention improves the wetting between process solution and the wafer surface when they are put into contact by pre-implementing an adsorbed liquid layer on the entire front surface of the wafer just prior to the process. The pre-implementing adsorbed liquid layer is realized by transporting vaporized liquid molecules from vapor phase at elevated temperature (relative to wafer) and condensing them onto wafer surface. The pre-implementing adsorbed liquid is fully filled in the patterned structures formed on the wafer by multilayer absorption of the vaporized liquid molecules and the temperature of the wafer surface is above dew point of the vaporized liquid while condensing, which avoids generating bubbles inside the patterned structures.
    Type: Application
    Filed: November 12, 2013
    Publication date: June 5, 2014
    Applicant: ACM Research (Shanghai) Inc.
    Inventors: Yue Ma, David Wang
  • Publication number: 20140080295
    Abstract: A method of introducing a bandgap in single layer graphite on a SiO2 substrate comprising the steps of preparing graphene flakes and CVD grown graphene films on a SiO2/Si substrate and performing hydrogenation of the graphene. Additionally, controlling the majority carrier type via surface adsorbates.
    Type: Application
    Filed: July 15, 2013
    Publication date: March 20, 2014
    Applicant: The Government of the US, as represented by the Secretary of the Navy
    Inventors: Jeffrey W. Baldwin, Bernard R. Matis, James S. Burgess, Felipe Bulat-Jara, Adam L. Friedman, Brian H. Houston
  • Patent number: 8673390
    Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: March 18, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel F. Gealy
  • Publication number: 20140048320
    Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same, the printed circuit board including an adhesion promoter (AP) film for enhancing adhesive strength, interposed between a circuit pattern and an insulating layer above a substrate, the AP film containing any one of a first polymer, a second polymer, and an organic compound. According to the method for manufacturing the printed circuit board, there can be provided a printed circuit board having a fine circuit pattern by using the AP film having a low roughness value and having improved adhesive strength with respect to the circuit pattern.
    Type: Application
    Filed: December 7, 2012
    Publication date: February 20, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Jin Park, Yong Gwan Ko, Hye Won Jung, Joon Sung Kim
  • Publication number: 20140041921
    Abstract: A method for making conformal non-planar multi-layer circuitry is described. The method can include providing a substrate having a non-planar surface and depositing a first conformal dielectric layer on the substrate, the first conformal dielectric layer conforming to the non-planar surface of the substrate and having a non-planar surface. The method can also include applying a first conformal circuitry layer on the first conformal dielectric layer. The method can include depositing a second conformal dielectric layer on the first conformal circuitry layer, the second conformal dielectric layer conforming to a non-planar surface of the first conformal circuitry layer, and applying a second conformal circuitry layer on the second conformal dielectric layer. Successive layers can be sequentially deposited. Microvias may provide electrical connections between circuit layers.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: Lockheed Martin Corporation
    Inventors: Stephen Gonya, Kenn Twigg, Jim Patterson
  • Publication number: 20130335483
    Abstract: An inkjet print head includes a jet assembly which includes a nozzle plate, the nozzle plate including an ink transferring path on a bottom surface of the nozzle plate, and a jet jetting a transferred ink out of the head. A printed circuit substrate is connected to the jet assembly and includes an integrated circuit and a connection electrode. A barrier coating layer covers a surface of the printed circuit substrate and an inner surface and an outer surface of the jet assembly except a bottom surface of the nozzle plate and a surface of the connection electrode of the jet assembly and the printed circuit substrate being connected with each other. The barrier coating layer has a layered structure which includes a flexible layer, a diffusion barrier layer, and a hydrophobic layer.
    Type: Application
    Filed: October 17, 2012
    Publication date: December 19, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Woo-Yong SUNG, A-Ram Lee, Tae-Woon Cha, Tae-Gyun Kim, Hyoung Sub Lee, Seung-Yeon Chae, Sang Gun Choi
  • Publication number: 20130337192
    Abstract: Disclosed are manganese-containing precursors having the formula (I): wherein each R1 through R5 is independently selected from H; C1-C4 linear or branched alkyl group; C1-C4 linear, branched, or cyclic alkylsilyl group; C1-C4 alkylamino group; and a C1-C4 linear or branched fluoroalkyl group. Also disclosed are method of making the disclosed manganese-containing precursors and methods of using the disclosed manganese-containing precursors to deposit Mn-containing films on a substrate.
    Type: Application
    Filed: November 3, 2011
    Publication date: December 19, 2013
    Applicant: L'Air Liquide Société Anonyme pour I'Etude et I'Exploitation des Procédés Georges Claude
    Inventor: Clément Lansalot-Matras
  • Publication number: 20130335822
    Abstract: The disclosure is related to a method for manufacturing touch-sensitive element on a polarizer, and a polarization device made by the method. In one of the embodiments of the invention, a polarizing substrate is firstly prepared. The method then coats first transparent conductive material onto the substrate, and uses a patterning process to form multiple sensing areas and wiring areas. There are continuous paths and adjacent non-continuous paths are existed in between the sensing areas. A bridged insulating layer is formed as processing the step for spray-coating or inject-printing insulating material upon the areas of the non-continuous pads. A bridged conductive layer is formed upon the insulation layer as spray-coating or inject-printing a second transparent conductive material there-on. The bridged conductive layer is to electrically connect the non-continuous pads. The method is therefore forming the polarization device with the touch-screen elements.
    Type: Application
    Filed: June 18, 2012
    Publication date: December 19, 2013
    Applicant: J TOUCH CORPORATION
    Inventors: YU-CHOU YEH, JUI-MING NI, PING-HSU LAI, HSIAO-SHUN JAN, CHENG-HSIUNG WU
  • Publication number: 20130333835
    Abstract: Hybrid inorganic-organic, polymeric alloys are prepared by combining atomic layer deposition and molecular layer deposition techniques provide barrier protection against intrusion of atmospheric gases such as oxygen and water vapor. The alloy may be formed either directly on objects to be protected, or on a carrier substrate to form a barrier structure that subsequently may be employed to protect an object. The alloy thus formed is beneficially employed in constructing electronic devices such as photovoltaic cell arrays, organic light-emitting devices, and other optoelectronic devices.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 19, 2013
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: Peter Francis Carcia, Robert Scott Mclean
  • Publication number: 20130319290
    Abstract: Described herein are precursors and methods for forming silicon-containing films. In one aspect, there is a precursor of following Formula I: wherein R1 and R3 are independently selected from linear or branched C3 to C10 alkyl group, a linear or branched C3 to C10 alkenyl group, a linear or branched C3 to C10 alkynyl group, a C1 to C6 dialkylamino group, an electron withdrawing and a C6 to C10 aryl group; R2 and R4 are independently selected from hydrogen, a linear or branched C3 to C10 alkyl group, a linear or branched C3 to C10 alkenyl group, a linear or branched C3 to C10 alkynyl group, a C1 to C6 dialkylamino group, an electron withdrawing, and a C6 to C10 aryl group; and wherein any one, all, or none of R1 and R2, R3 and R4, R1 and R3, or R2 and R4 are linked to form a ring.
    Type: Application
    Filed: May 24, 2013
    Publication date: December 5, 2013
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Manchao Xiao, Xinjian Lei, Daniel P. Spence, Haripin Chandra, Mark Leonard O'Neill
  • Patent number: 8585912
    Abstract: A batch vapor deposition process for applying adhesion promoter during manufacturing of nanoimprinted discrete track media and bit-patterned media, and mono-molecular layer lubricant on magnetic recording media are disclosed. The adhesion promoter is simultaneously coated on both sides of numerous disk substrates, and minimal solution is wasted. In another step, the lubricant is applied at a uniform thickness that is on the order of a single molecular layer. The lubricant is also applied on the entire disk surfaces while processing multiple disks at a time. Batch processing increases throughput, and vapor lubricant reduces costs compared to conventional techniques. Limited air exposure controls bonding and monolayer adsorption guarantees uniformity.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: November 19, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Xing-Cai Guo, Robert Waltman, Tsai-Wei Wu
  • Patent number: 8568686
    Abstract: A method for the fabrication of nanostructured semiconducting, photoconductive, photovoltaic, optoelectronic and electrical battery thin films and materials at low temperature, with no molecular template and no organic contaminants. High-quality metal oxide semiconductor, photovoltaic and optoelectronic materials can be fabricated with nanometer-scale dimensions and high dopant densities through the use of low-temperature biologically inspired synthesis routes, without the use of any biological or biochemical templates.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: October 29, 2013
    Assignee: The Regents of the University of California
    Inventors: Daniel E. Morse, Birgit Schwenzer, John R. Gomm, Kristian M. Roth, Brandon Heiken, Richard Brutchey
  • Publication number: 20130280417
    Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a hydrophobic silane coating of a silane composition intermixed with a silane coupling agent applied to a glass fiber substrate. The silane coupling agent is applied to the surface of the substrate for coupling the substrate to a varnish coating. Applying the silane coupling agent to the surface of the substrate creates surface silanols, which are implicated in conductive anodic filament (CAF) growth. A silane composition, which reacts with the surface silanols, is applied to the surface of the substrate having the silane coupling agent applied thereto to form the hydrophobic silane coating. The surface presented by the hydrophobic silane coating/substrate is hydrophobic and essentially silanol-free. This surface is then dried, and varnish is applied thereto. Then, the substrate, hydrophobic silane coating and varnish are subjected to curing conditions to define the PCB.
    Type: Application
    Filed: March 4, 2013
    Publication date: October 24, 2013
    Inventors: Dylan J. Boday, Joseph Kuczynski
  • Patent number: 8563095
    Abstract: A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: October 22, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Nagarajan Rajagopalan, Xinhai Han, Ryan Yamase, Ji Ae Park, Shamik Patel, Thomas Nowak, Zhengjiang “David” Cui, Mehul Naik, Heung Lak Park, Ran Ding, Bok Hoen Kim
  • Patent number: 8529985
    Abstract: A method for atomizing a precursor liquid for vapor generation and thin film deposition on a substrate. The precursor liquid is atomized by a carrier gas to form a droplet aerosol composed of small precursor liquid droplets suspended in the carrier gas. The droplet aerosol is then heated to form vapor, producing a gas/vapor mixture that can be introduced into a deposition chamber to form thin films on a substrate. The liquid is introduced into the atomizing apparatus in such a manner as to avoid excessive heating that can occur or lead to the formation of undesirable by-products due to material degradation as result of thermal decomposition. The method is particularly suited for vaporizing high molecular weight substances with a low vapor pressure that requires a high vaporization temperature for the liquid to vaporize. The method can also be used to vaporize solid precursors dissolved in a solvent for vaporization.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: September 10, 2013
    Assignee: MSP Corporation
    Inventor: Benjamin Y. H. Liu
  • Patent number: 8529996
    Abstract: This invention provides a new procedure for attaching molecules to semiconductor surfaces, in particular silicon. The molecules, which include, but are not limited to porphyrins and ferrocenes, have been previously shown to be attractive candidates for molecular-based information storage. The new attachment procedure is simple, can be completed in short times, requires minimal amounts of material, is compatible with diverse molecular functional groups, and in some instances affords unprecedented attachment motifs. These features greatly enhance the integration of the molecular materials into the processing steps that are needed to create hybrid molecular/semiconductor information storage devices.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: September 10, 2013
    Assignees: The Regents of the University of California, North Carolina State University
    Inventors: David F. Bocian, Jonathan S. Lindsey, Zhiming Liu, Amir A. Yasseri, Veena Misra, Qian Zhao, Qiliang Li, Shyam Surthi, Robert S. Loewe
  • Publication number: 20130146332
    Abstract: A method for forming a conductive pattern on a substrate surface comprises altering the surface energy of the substrate surface, depositing a catalyst-doped liquid on to said substrate surface; forming a seed layer from said deposited catalyst-doped liquid, and plating the seed layer thereby forming the conductive pattern. In some embodiments, 3-D structures are placed on the substrate to delimit the size and shape of the conductive pattern. In other embodiments, the surface energy of the areas of the substrate in which conductive material is not desired (i.e., inverse pattern) is altered (e.g., lowered) to avoid having conductive liquid adhere thereto.
    Type: Application
    Filed: October 29, 2010
    Publication date: June 13, 2013
    Applicant: UNIPIXEL DISPLAYS ,INC.
    Inventors: Ed S. Ramakrishnan, Robert J. Petcavich
  • Publication number: 20130140064
    Abstract: Electronic devices can be prepared by forming a patterned thin film on a suitable receiver substrate. A cyanoacrylate polymer is used as a deposition inhibitor material and applied first as a deposition inhibitor material. The deposition inhibitor material can be patterned to provide selected areas on the receiver substrate where the deposition inhibitor is absent. An inorganic thin film is then deposited on the receiver substrate using a chemical vapor deposition technique only in those areas where the deposition inhibitor material is absent. The cyanoacrylate polymer deposition inhibitor material can be applied by thermal transfer from a donor element to a receiver substrate before a patterned thin film is formed.
    Type: Application
    Filed: December 5, 2011
    Publication date: June 6, 2013
    Inventors: Mitchell S. Burberry, David H. Levy
  • Publication number: 20130133935
    Abstract: A method of making a touch sensor assembly comprises: forming conductive trace elements on a transparent substrate; forming an insulator layer on the transparent substrate such that the insulator layer covers a portion of the conductive trace elements; and forming a plurality of conductive bridging lines such that each of the conductive bridging lines bridges two corresponding ones of the conductive trace elements. Each of the conductive bridging lines includes a plurality of conductor layers stacked one above the other and differing from one another in reflectivity. One of the conductor layers is formed by reacting a reactive gas with a metallic material, and has a reflectivity less than that of the metallic material.
    Type: Application
    Filed: November 20, 2012
    Publication date: May 30, 2013
    Applicant: CANDO CORPORATION
    Inventor: Cando Corporation
  • Patent number: 8435905
    Abstract: The present invention provides a manufacturing method of a semiconductor device that has a rapid film formation rate and high productivity, and to provide a substrate processing apparatus.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: May 7, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Sadayoshi Horii, Hideharu Itatani, Kazuhiro Harada
  • Publication number: 20130088406
    Abstract: Low-loss printed circuit boards, low-loss wide-band antennas, and manufacturing methods thereof are provided by using a resin as a board material. A resin material (101) having a predetermined shape is prepared in a molding step, and the resin material (101) is foamed in a foaming step. As a result, a skin layer (111) and a foamed part (112) are formed. Since the skin layer (111) does not allow close contact of plating, the skin layer (111) is removed in the shape of a conductor pattern in a skin-layer removing step to expose the foamed part (112) in the interior. Electroless plating is carried out in a conductor-layer forming step; and, as a result, plating is brought into close contact with the foamed part (112) having an anchor effect, and a conductor layer (120) is formed.
    Type: Application
    Filed: December 4, 2012
    Publication date: April 11, 2013
    Applicant: Furukawa Electric Co., Ltd.
    Inventor: Furukawa Electric Co., Ltd.
  • Publication number: 20130068511
    Abstract: A method for printing an electrical conductor on a substrate has been developed. In the method, a reverse image of the electrical conductor pattern is printed on a substrate with an electrically non-conductive material to form a second pattern that exposes a portion of the surface area of the substrate. The entire surface area of the substrate is then covered with an electrically conductive material. The non-conductive material of the reverse image electrically isolates the electrically conductive material covering the reverse image from the electrically conductive material covering the second pattern.
    Type: Application
    Filed: September 19, 2011
    Publication date: March 21, 2013
    Applicant: XEROX CORPORATION
    Inventor: Yiliang Wu
  • Publication number: 20130052409
    Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a silane applied to the ends of glass fibers in via holes. In one embodiment, during a plated through-hole (PTH) via fabrication process, glass fiber bundles exposed in a drilled through-hole are selectively sealed. For example, after the through-hole is drilled in a substrate, the substrate may be subjected to an aqueous silane bath (e.g., an organo trialkoxysilane in an aqueous solution of an acid that acts as a catalyst) to deposit a layer of silane on the exposed glass fiber bundle ends. For example, trialkoxy groups of the silane may react with exposed silanols on the glass to form a siloxane, which is further polymerized to form a silane polymer barrier layer on the exposed glass fiber ends. The barrier layer effectively seals the glass fiber bundles and eliminates the conductive anodic filament (CAF) pathway between PTH vias.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory E. Balcome, Brett P. Krull, Joseph Kuczynski, Terry G. Ryks, Timothy J. Tofil
  • Publication number: 20120305300
    Abstract: A method for manufacturing an electrical contact pad, including a pad mounting and at least one contact layer, and a method for manufacturing an electrical contact, including a contact mounting and at least one contact layer are described. The methods include a step of depositing, via cold gas dynamic spraying, a first powder onto the pad or contact mounting so as to form the contact layer, the first powder containing at least particles including grains made of at least one refractive material, the grains being built into a matrix made of conductive metal selected from among silver or copper. The pads and the electrical contacts obtained in the respective manufacturing methods are also described.
    Type: Application
    Filed: December 16, 2010
    Publication date: December 6, 2012
    Applicant: METALOR TECHNOLOGIES INTERNATIONAL SA
    Inventors: Christine Bourda, Gilles Rolland, Michel Jeandin
  • Patent number: 8304013
    Abstract: In a method for producing especially doped layers for electronic, luminescent or photovoltaic components, especially OLEDs, one or more liquid or solid starting materials are evaporated in a source (11, 12, 13, 14) or are admixed as aerosol to a carrier gas and transported in this form to a deposition chamber (1) where they condense on a substrate (5), especially as a result of a temperature gradient, forming a doped matrix. In order to improve the doping of electronic, luminescent or photovoltaic layers, it is proposed that the doping occurs by modification of a starting material during its transport.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: November 6, 2012
    Assignee: Aixtron Inc.
    Inventor: Holger Kalisch
  • Patent number: 8282988
    Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: October 9, 2012
    Assignee: Micron Technology, Inc
    Inventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel F. Gealy
  • Patent number: 8246749
    Abstract: Disclosed is a substrate processing apparatus, including a reaction tube to process a substrate therein, wherein the reaction tube includes an outer tube, an inner tube disposed inside the outer tube, and a support section to support the inner tube, the inner tube and the support section are made of quartz or silicon carbide, and a shock-absorbing member is provided between the support section and the inner tube.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: August 21, 2012
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Jie Wang, Ryuji Yamamoto, Sadao Nakashima
  • Publication number: 20120207916
    Abstract: A vacuum processing system includes a vacuum chamber in connection with a vacuum pump that can exhaust air or vapor in the vacuum chamber, and a container in the vacuum chamber configured to contain one or more work pieces therein and to receive a heat-exchange liquid that comes into contact with the one or more work pieces to allow heat exchange with the one or more work pieces. The vacuum pump can exhaust at least a portion of the vapor evaporated from the heat-exchange liquid on the work pieces or in the container. A deposition source unit can provide material to be deposited on the one or more work pieces in vacuum. The one or more work pieces can be brought a predetermined temperature by the heat-exchange liquid.
    Type: Application
    Filed: June 29, 2011
    Publication date: August 16, 2012
    Inventor: George X. Guo
  • Patent number: 8225745
    Abstract: System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: July 24, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Eugene P. Marsh, David R. Atwell
  • Patent number: 8192652
    Abstract: The tin-doped indium oxide thin film in accordance with the present invention has a tin-doped indium oxide, yttrium ions and europium ions, wherein the yttrium ions are proportional to 0.1-10 mol % of the tin-doped indium oxide while the europium ions proportional to 0.05-5 mol % of the tin-doped indium oxide. The method in accordance with the present invention comprises preparing a tin-doped indium oxide; and doping yttrium ions proportional to 0.1-10 mol % of the tin-doped indium and europium ions proportional to 0.05-5 mol % of the tin-doped indium oxide in the tin-doped indium oxide using a film-manufacturing method.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: June 5, 2012
    Assignee: National Chung Cheng University
    Inventors: Chu-Chi Ting, Chia-Hao Tsai, Hsiang-Chen Wang
  • Patent number: 8132793
    Abstract: An apparatus for atomizing a precursor liquid for vapor generation and thin film deposition on a substrate. The precursor liquid is atomized by a carrier gas to form a droplet aerosol composed of small precursor liquid droplets suspended in the carrier gas. The droplet aerosol is then heated to form vapor, producing a gas/vapor mixture that can be introduced into a deposition chamber to form thin films on a substrate. The liquid is introduced into the atomizing apparatus in such a manner as to avoid excessive heating that can occur or lead to the formation of undesirable by-products due to material degradation as result of thermal decomposition. The apparatus is particularly suited for vaporizing high molecular weight substances with a low vapor pressure that requires a high vaporization temperature for the liquid to vaporize. The apparatus can also be used to vaporize solid precursors dissolved in a solvent for vaporization.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: March 13, 2012
    Assignee: MSP Corporation
    Inventor: Benjamin Y. H. Liu
  • Patent number: 8133555
    Abstract: A method of forming a single-metal film on a substrate by plasma ALD includes: contacting a surface of a substrate with a ?-diketone metal complex in a gas phase; exposing molecule-attached surface to a nitrogen-hydrogen mixed plasma; and repeating the above steps, thereby accumulating atomic layers to form a single-metal film on the substrate.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: March 13, 2012
    Assignee: ASM Japan K.K.
    Inventors: Hiroshi Shinriki, Kunitoshi Namba, Daekyun Jeong
  • Patent number: 8071160
    Abstract: A method of forming a film is provided. Nanoparticles are deposited on a surface of a substrate using a liquid deposition process. The nanoparticles are linked to each other and to the surface using linker molecules. A coating having a surface energy of less than 70 dyne/cm is deposited over the film to form a coated film. The coated film has an RMS surface roughness of 25 nm to 500 nm, a film coverage of 25% to 60%, a surface energy of less than 70 dyne/cm; and a durability of 10 to 5000 microNewtons. Depending on the particular environment in which the film is to be used, a durability of 10 to 500 microNewtons may be preferred. A film thickness 3 to 100 times the RMS surface roughness of the film is preferred.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: December 6, 2011
    Assignee: Integrated Surface Technologies
    Inventors: Jeffrey D. Chinn, Robert W. Ashurst, Adam N. Anderson
  • Patent number: 8063553
    Abstract: To reduce brightness variation by wiring resistance of an upper part transparent electrode in an organic luminescence element, a stripe-shape first auxiliary wiring 11 extending in a direction parallel to a signal line is formed on the upper part transparent electrode, by a precise mask vapor deposition method. Then, a stripe-shape second auxiliary wiring 12 extending in a direction parallel to a scanning line is formed by a precise mask vapor deposition method.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: November 22, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Shingo Ishihara, Eiji Matsuzaki, Hiroshi Kageyama
  • Publication number: 20110214909
    Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a hydrophobic silane coating of a silane composition intermixed with a silane coupling agent applied to a glass fiber substrate. The silane coupling agent is applied to the surface of the substrate for coupling the substrate to a varnish coating. Applying the silane coupling agent to the surface of the substrate creates surface silanols, which are implicated in conductive anodic filament (CAF) growth. A silane composition, which reacts with the surface silanols, is applied to the surface of the substrate having the silane coupling agent applied thereto to form the hydrophobic silane coating. The surface presented by the hydrophobic silane coating/substrate is hydrophobic and essentially silanol-free. This surface is then dried, and varnish is applied thereto. Then, the substrate, hydrophobic silane coating and varnish are subjected to curing conditions to define the PCB.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 8, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dylan Joseph Boday, Joseph Kuczynski
  • Publication number: 20110147339
    Abstract: A method for manufacturing a wiring structure of a wiring board is provided. In the method, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, a barrier layer completely covering the film is formed. Next, an intaglio pattern partially exposing the insulation layer is formed on an outer surface of the barrier layer. Next, an activated layer is formed on the outer surface and in the intaglio pattern. Then, the activated layer on the outer surface is removed, and the activated layer in the intaglio pattern is remained. After the activated layer on the outer surface is removed, a conductive material is formed in the intaglio pattern by using a chemical deposition method. After forming the conductive material, the barrier layer and the film are removed.
    Type: Application
    Filed: June 3, 2010
    Publication date: June 23, 2011
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Shu-Sheng Chiang, Tsung-Yuan Chen, Wei-Ming Cheng
  • Patent number: 7964441
    Abstract: A method is provided for low temperature catalyst-assisted atomic layer deposition of silicon-containing films such as SiO2 and SiN. The method includes exposing a substrate surface containing X—H functional groups to a first R1—X—R2 catalyst and a gas containing silicon and chlorine to form an X/silicon/chlorine complex on the surface, and forming a silicon-X layer terminated with the X—H functional groups by exposing the X/silicon/chlorine complex on the substrate surface to a second R1—X—R2 catalyst and a X—H functional group precursor. The method further includes one or more integrated in-situ reactive treatments that reduce or eliminate the need for undesired high-temperature post-deposition processing. One reactive treatment includes hydrogenating unreacted X—H functional groups and removing carbon and chlorine impurities from the substrate surface. Another reactive treatment saturates the silicon-X layer with additional X—H functional groups.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: June 21, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Raymond Joe, Meenakshisundaram Gandhi
  • Publication number: 20110104848
    Abstract: Methods and apparatus for hot wire chemical vapor deposition (HWCVD) are provided herein. In some embodiments, an inline HWCVD tool may include a linear conveyor for moving a substrate through the linear process tool; and a multiplicity of HWCVD sources, the multiplicity of HWCVD sources being positioned parallel to and spaced apart from the linear conveyor and configured to deposit material on the surface of the substrate as the substrate moves along the linear conveyor; wherein the substrate is coated by the multiplicity of HWCVD sources without breaking vacuum. In some embodiments, methods of coating substrates may include depositing a first material from an HWCVD source on a substrate moving through a first deposition chamber; moving the substrate from the first deposition chamber to a second deposition chamber; and depositing a second material from a second HWCVD source on the substrate moving through the second deposition chamber.
    Type: Application
    Filed: August 31, 2010
    Publication date: May 5, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: DIETER HAAS, PRAVIN K. NARWANKAR, RANDHIR P.S. THAKUR