Abstract: A method for making a coated substrate (10), such as a polymeric lens (11), includes positioning a heat sink (22) of a heat-conductive and/or heat reflective material adjacent a sidewall (16) of the substrate (10) and subjecting the substrate (10) to a coating and curing process. A coating assembly (76) includes a substrate (10), such as a polymeric lens (11), and a heat sink (22) adjacent a sidewall (16) of the substrate (10).

Abstract: A method to reduce the number and type of processing steps to achieve conductive lines in the planes of a substrate concurrently interconnecting conductor through the substrate, by forming structures in the planes of a substrate. These structures may include interconnect lines, bond pads, and other structures, and improve the performance of subsequent unique processing while simultaneously reducing the manufacturing complexity to reduce time and cost. These structures are formed by selective etching using chemical mechanical polishing, and then completed using a single fill step with a conductive material.

Abstract: A method to reduce the number and type of processing steps to achieve conductive lines in the planes of a substrate concurrently interconnecting conductor through the substrate, by forming structures in the planes of a substrate. These structures may include interconnect lines, bond pads, and other structures, and improve the performance of subsequent unique processing while simultaneously reducing the manufacturing complexity to reduce time and cost. These structures are formed by selective etching using chemical mechanical polishing, and then completed using a single fill step with a conductive material.

Abstract: A paste composition includes a branched metal carboxylate, a solvent in which the branched metal carboxylate is soluble and a gelling agent, wherein the gelling agent is a linear metal carboxylate. The paste solvent may be an aromatic hydrocarbon solvent. The paste compositing may be free of polymeric binder. The paste may be used in forming conductive features on a substrate, including by screen printing or offset printing.

Abstract: The present disclosure relates to an optical fiber fan-out device having a furcation tube assembly. The furcation tube assembly includes a furcation tube mounting insert and an array of furcation tubes. The first end of the furcation tube mounting insert has a first end surface being a slant configuration at an oblique angle relative to the furcation tube axes. The slanted edge helps to insert optical fibers into the furcation tubes. The supported portions of the furcation tubes have fiber insertion ends that terminate at the first end surface. The furcation tubes also including free portions that extend from the second end of the furcation tube mounting insert.

Abstract: There is provided a resist underlayer film forming composition for lithography for forming a resist underlayer film capable of being used as a hard mask or a bottom anti-reflective coating, or a resist underlayer film causing no intermixing with a resist and having a dry etching rate higher than that of the resist. A film forming composition comprising a silane compound having an onium group, wherein the silane compound having an onium group is a hydrolyzable organosilane having, in a molecule thereof, an onium group, a hydrolysis product thereof, or a hydrolysis-condensation product thereof. The composition uses as a resist underlayer film forming composition for lithography. A composition comprising a silane compound having an onium group, and a silane compound having no onium group, wherein the silane compound having an onium group exists in the whole silane compound at a ratio of less than 1% by mol, for example 0.01 to 0.95% by mol.

Abstract: The system of the present invention includes a conductive element, an electronic component, and a partial power source in the form of dissimilar materials. Upon contact with a conducting fluid, a voltage potential is created and the power source is completed, which activates the system. The electronic component controls the conductance between the dissimilar materials to produce a unique current signature. The system can also measure the conditions of the environment surrounding the system.

Abstract: A method is provided for controlling the channel length in a thin-film transistor (TFT). The method forms a printed ink first source/drain (S/D) structure overlying a substrate. A fluoropolymer mask is deposited to cover the first S/D structure. A boundary region is formed between the edge of the fluoropolymer mask and the edge of the printed ink first S/D structure, having a width. Then, a primary ink is printed at least partially overlying the boundary region, forming a printed ink second S/D structure, having an edge adjacent to the fluoropolymer mask edge. After removing the fluoropolymer mask, the printed ink first S/D structure edge is left separated from the printed ink second S/D structure edge by a space equal to the boundary region width. A semiconductor channel is formed partially overlying the first and second S/D structures, having a channel length equal to the boundary region width.

Abstract: An object of the present invention is to provide a resin composition for forming an ink-receiving layer that is capable of forming a printed image having excellent printing properties and water resistance, both in the case of use of a water-based ink and in the case of use of a solvent-based ink. The resin composition for forming an ink-receiving layer includes a binder resin (A) having a weight-average molecular weight of 100,000 or more and an acid value of 90 to 450, an aqueous medium (B), and as required, at least one component (C) selected from the group consisting of a water-soluble resin (c1) and an inorganic filler (c2). The binder resin (A) is dispersed in the aqueous medium (B), and the content of the at least one component (C) relative to the total amount of the binder resin (A) is 0% to 15% by mass.

Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.

Abstract: A layer of material having a low thermal conductivity is coated over a substrate. A film of conductive ink is then coated over the layer of material having the low thermal conductivity, and then sintered. The film of conductive ink does not absorb as much energy from the sintering as the film of conductive ink coated over the layer of material having the low thermal conductivity. The layer of material having the low thermal conductivity maybe a polymer, such as polyimide.

Abstract: Disclosed herein are a touch sensor and a method of manufacturing the same. The touch sensor includes: a transparent substrate; a resin layer formed on one surface of the transparent substrate; and an electrode formed on one surface of the resin layer, wherein one surface of the resin layer is formed with a substrate prominence and depression part having a prominence and depression shape.

Abstract: A method of forming low dielectric contrast structures by imprinting a silsesquioxane based polymerizable composition. The imprinting composition including: one or more polyhedral silsesquioxane oligomers each having one or more polymerizable groups, wherein each of the one or more polymerizable group is bound to a different silicon atom of the one or more polyhedral silsesquioxane oligomers; and one or more polymerizable diluents, the diluents constituting at least 50% by weight of the composition.

Abstract: A method for manufacturing a flexible circuit electrode array adapted to electrically communicate with organic tissue including the following steps: a) providing a flexible polymer base layer; b) curing the base layer; c) depositing a metal layer on base layer; d) patterning the metal layer and forming metal traces on the base layer; e) roughening the surface of the base layer; f) chemically reverting the cure of the surface of the base layer; g) depositing a flexible polymer top layer on the surface of the base layer and the metal traces; h) curing the top layer and the surface of the base layer forming one single flexible polymer layer; and i) creating openings through the single layer to the metal trace layer.

Abstract: There is provided a space transformer for a probe card, including: a substrate having a first surface and a second; a plurality of first pads formed on the first surface to be spaced apart from each other and connected to a printed circuit board of a probe card; a plurality of second pads formed on the second surface in positions corresponding to those of the first pads and receiving external electrical signals applied thereto; a plurality of via electrodes penetrating through the substrate and respectively connected to the plurality of first pads and the plurality of second pads formed in the positions corresponding to each other; a ground layer formed to cover the second surface and provided with a plurality of second pad exposure holes; and an insulating layer formed to cover the ground layer and the plurality of second pads.

Abstract: A method for manufacturing a printed wiring board includes forming a removable layer on a support substrate, forming an interlayer resin insulation layer on the removable layer, forming a penetrating hole in the interlayer resin insulation layer, forming a first conductive layer on the interlayer resin insulation layer and on a side wall of the penetrating hole, forming a conductive circuit on the interlayer resin insulation layer, forming a via conductor in the penetrating hole, removing the support substrate from the interlayer resin insulation layer by using the removable layer, forming a protruding portion of the via conductor protruding from a surface of the interlayer resin insulation layer, and forming a surface-treatment coating on a surface of the protruding portion of the via conductor.

Abstract: Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.

Abstract: Methods for fabricating sub-lithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multi-layer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.

Abstract: Multifunctional reactive polymers created by chemical vapor deposition (CVD) and methods of making such polymeric systems are provided. Such polymers provide multifunctional surfaces which can present two or more different molecules (e.g. biological ligands) in controlled ratios. Polymers may include compositional gradients allowing attached ligands to be presented as continuous gradients across a surface. The polymer compositions are modularly designable and applicable to a wider range of applications, including biomedical devices and diagnostic systems.

Abstract: A manufacturing method of a flux gate sensor may include: a first step of forming a first wiring layer on a substrate; a second step of forming a first insulating layer to cover the first wiring layer; a third step of forming a magnetic layer on the first insulating layer, the magnetic layer constituting a core of a flux gate; a fourth step of forming a second insulating layer on the first insulating layer to cover the magnetic layer; and a fifth step of forming a second wiring layer on the second insulating layer. The first wiring layer and the second wiring layer may be electrically connected to each other so that each constitutes a magnetic coil and a pickup coil, and at least a process temperature in each of the third, fourth, and fifth steps may be lower than a glass transition temperature of the first resin.

Abstract: A wiring method is provided in which an insulating layer is formed on a surface of a semiconductor device 1 of which a plurality of connecting terminals are exposed, a resin film is formed on a surface of the insulating layer, a groove of a depth equal to or exceeding a thickness of the resin film is formed from a surface side of the resin film so that the groove passes in a vicinity of connecting terminals that are to be connected, and furthermore communicating holes which reach the connecting terminals to be connected from this portion that groove passes in the vicinity thereof are formed.

Abstract: At least one embodiment provides an interposer including: a lower wiring substrate; an upper wiring substrate disposed over the lower wiring substrate via a gap; and through-electrodes which penetrate through the upper wiring substrate and the lower wiring substrate across the gap to thereby link the upper wiring substrate and the lower wiring substrate, portions of the through-electrodes being exposed in the gap.

Abstract: The invention relates to the preparation of multilayer microcomponents which comprise one or more films, each consisting of a material M selected from metals, metal alloys, glasses, ceramics and glass-ceramics. The method consists in depositing on a substrate one or more films of an ink P, and one or more films of an ink M, each film being deposited in a predefined pattern selected according to the structure of the microcomponent, each film of ink P and each film of ink M being at least partially consolidated before deposition of the next film; effecting a total consolidation of the films of ink M partially consolidated after their deposition, to convert them to films of material M; totally or partially removing the material of each of the films of ink P. An ink P consists of a thermoset resin containing a mineral filler or a mixture comprising a mineral filler and an organic binder. An ink M consists of a mineral material precursor of the material M and an organic binder.

Abstract: A conductor layer having a predetermined pattern is formed on a base insulating layer so that its second main surface opposes the base insulating layer. A barrier layer having higher corrosion resistance to acids than that of the conductor layer is formed on its first main surface and a side surface of the conductor layer while the first main surface and the side surface of the conductor layer and the barrier layer are covered with a conductive cover layer.

Abstract: Provided are methods of and apparatuses for forming a metal pattern. In the method, an initiator and a metal pattern are sequentially combined on a previously-formed bonding agent pattern improving adhesion and/or junction properties between the substrate and the metal. The bonding agent pattern may be formed using a reverse offset printing method. The metal pattern may be formed using an electroless electrochemical plating method. The metal pattern can be formed with improved uniformity in thickness and planar area.

Abstract: An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a packaging board. The wiring pattern of the packaging board is formed on an insulating substrate and includes a wiring region, an electrode region (pad electrode) connected with a semiconductor device, and a boundary region provided between the wiring region and the electrode region. A gold plating layer is provided on the surface of the electrode region of the wiring pattern. The top surface of the boundary region of the wiring pattern is so formed as to be dented from the top surface of the wiring region of the wiring pattern, and there is provided a stepped portion in the boundary region.

Abstract: Methods for fabricating sublithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multilayer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.

Abstract: A method of forming a film is provided. Nanoparticles are deposited on a surface of a substrate using a liquid deposition process. The nanoparticles are linked to each other and to the surface using linker molecules. A coating having a surface energy of less than 70 dyne/cm is deposited over the film to form a coated film. The coated film has an RMS surface roughness of 25 nm to 500 nm, a film coverage of 25% to 60%, a surface energy of less than 70 dyne/cm; and a durability of 10 to 5000 microNewtons. Depending on the particular environment in which the film is to be used, a durability of 10 to 500 microNewtons may be preferred. A film thickness 3 to 100 times the RMS surface roughness of the film is preferred.

Abstract: The present invention provides a method for producing a multilayer wiring substrate, including: forming a laminated body having an insulating resin layer and a polymer adhesive layer, on a surface of a first wiring substrate wherein the polymer adhesive layer contains a polymer precursor interacting with a plating catalyst or a precursor thereof, and a reactive group bonding with an adjacent layer on the first wiring substrate side; applying energy to a region outside of a via connection portion on the surface of the laminated body, to form a patterned polymer adhesive layer; applying a plating catalyst or a precursor thereof to the patterned polymer adhesive layer, and carrying out a first electroless plating, to form a second metal wiring on the surface of the patterned polymer adhesive layer; and forming a via by utilizing the patterned second metal wiring as a mask, and subsequently carrying out a desmear treatment.

Abstract: A method of manufacturing a structure, including forming a composite film composed of a coating film and an organic or inorganic film on top of a substrate by forming the coating film on the surface of a template provided on top of the substrate; forming the organic or inorganic film on the surface of the coating film, and removing a portion of the organic or inorganic film and a portion of the coating film; forming a second coating film on the surface of the composite film; forming an organic coating film on the substrate that covers the second coating film; removing a portion of the second coating film; and forming a structure composed of a metal or metal oxide later on the substrate by removing all residues left on the substrate except for the coating film and the second coating film.

Abstract: A method for manufacturing an organic device includes disposing a solution containing a conductive organic material in a first region on a substrate, drying the solution to form a conductive organic film in the first region, and irradiating the conductive organic film formed in a second region other than the first region with light to decrease the conductivity of the conductive organic film.

Abstract: The invention provides a method for preparing a pattern for an electric circuit comprising the steps of: (a) providing a substrate; (b) providing a pattern of an inhibiting material for an electrical circuit onto said substrate by i) applying a layer of the inhibiting material onto said substrate and mechanically removing locally the layer of the inhibiting material to obtain said pattern; or ii) applying a layer of the inhibiting material onto said substrate, wherein said layer has pre-determined pattern which incompletely covers said substrate; (c) establishing a distribution of particles of a first metal or alloy thereof on the layer of the inhibiting material and the pattern as obtained in step.

Abstract: A method of fabricating an airgap-containing interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material is provided. Specifically, a simplified method of fabricating single-damascene and dual-damascene airgap-containing low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating is provided.

Abstract: A method of forming a metal film and a metal wiring pattern is described a step of forming an organic film by applying and polymerizing an undercoat composition for forming a metal film containing an addition-polymerizable monomer having an acidic group and a polymerization initiator on a substrate or film, a step of converting the acidic group into a metal (M1) salt by treating the organic film with an aqueous solution containing a metal (M1) ion, a step of converting the metal (M1) salt into a metal (M2) salt by treating the organic film with an aqueous solution containing a metal (M2) ion having an ionization tendency lower than the metal (M1) ion, and a step of forming a metal film on the organic film surface by reducing the metal (M2) ion.

Abstract: A method for manufacturing a printed wiring board having one or more layers of a conductive pattern and an insulating pattern, including forming an insulating pattern on an insulating substrate; semi-hardening at least one of the insulating substrate and the insulating pattern; forming a conductive pattern on the insulating substrate and/or the insulating pattern, thereby providing a stack structure; performing a thermal treatment on the stack structure to fully harden the semi-hardened insulating substrate and/or insulating pattern; and firing the conductive pattern. In the method, the conductive pattern and the insulating pattern are simultaneously formed on the same layer using an inkjet process.

Abstract: Described are methods of making an electronic device, such as an RFID tag, including fabricating an antenna by depositing an electrically conductive polymer onto a substrate. The electrically conductive polymer is electrically connected to an electronic component, such as an IC chip or a diode. The electronic component may be placed on the substrate before or after the electrically conductive polymer is deposited. Once deposited, the electrically conductive polymer is cured. The electrically conductive polymer may be deposited in a number of ways, such using a mask having a desired pattern and applying the electrically conductive polymer to the mask, by screen printing the electrically conductive polymer or by printing the electrically conductive polymer using ink jet printing techniques.

Abstract: A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then activated by heat or exposure to light to polymerize the mixture. In an alternative embodiment, a vinyl ether resin is used, to which electrically conductive particles are added. The mixture is polymerized by exposure to light.

Abstract: To form a conductive region in a prepreg without opening a through hole in a fibrous body. A wiring substrate is provided, including: an organic resin layer and a fibrous body, wherein the fibrous body is impregnated with the organic resin layer; and a wiring with which the fibrous body is impregnated and which is formed by dissolving the organic resin layer. The wiring is exposed on both surfaces of the organic resin layer and penetrates the fibrous body so that the fibrous body is positioned in the through wiring. Further, a semiconductor device is provided by adhering an integrated circuit chip having a bump to the wiring substrate so that the bump is in contact with the wiring.

Abstract: An aqueous printable electrical conductor (APEC) is defined as a dispersion comprising metal powder (with specific surface properties) dispersed into an aqueous acrylic, styrene/acrylic, urethane/acrylic, natural polymers vehicle (gelatine, soy protein, casein, starch or similar) or in a film forming reactive fatty acids mixture without a binder resin. The aqueous printable dispersion can be applied to substrates through different printing processes such as flexography, gravure, screen, dry offset or others. Exemplary substrates include: (1) coated paper, (2) uncoated paper, and (3) a variety of plastics with treated and untreated surfaces. When printed at a thickness of 1-8 ?m, heating to cure is not required as the dispersion cures at ambient temperatures.

Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board, having an electronic component mounted thereon, in accordance with an embodiment of the present invention includes: a substrate having a circuit pattern and a pad formed on one side thereof; a solder resist layer formed on one side of the substrate so as to expose the pad; and a dam formed on the solder resist layer by an inkjet printing method and disposed at a position corresponding to where the electronic component is mounted so as to control a flow of an underfill solution injected between the substrate and the electronic component.

Abstract: The present invention relates to a process for making self-patterning substrates comprising the steps of providing electrically conductive traces on a substrate; pre-coating the substrate with at least a layer of complementary reactant electrically resistant reactant formulations; altering the conductivity of complementary reactant formulation selectively upon application of external source of energy and a self-patterning substrate using the said process.

Abstract: Disclosed herein is a multilayered printed circuit board, including: a build-up layer including a plurality of insulating layers and a plurality of circuit layers; an insulating resin layer, including bumps, formed on the outermost circuit layer of one side of the build-up layer; and a solder resist layer formed on the outermost layer of the other side of the build-up layer. The multilayered printed circuit board is manufactured by sequentially placing a build-up layer and a solder resist layer on one side of an insulating resin layer, the other side of which is provided with bumps. The present invention is advantageous in that the thickness of the multilayered printed circuit board is decreased, the production processes thereof is simplified, and the production efficiency is increased.

Abstract: The invention pertains to a material composition for packaging. The composition comprises (a) an epoxy resin and (b) a curing agent, wherein the mixing ratio of said epoxy resin to said curing agent is in the range of from 0.7 to 1.1. The invention also pertains to a method of using said material composition for packaging a light-sensitive component on a substrate.

Abstract: A multilayer printed wiring board is manufactured by a method in which a core substrate is provided, an insulation layer including a thermosetting resin material is formed over the core substrate, an uncured resin layer including a thermoplastic resin material is placed on the insulation layer, the uncured resin layer is cured to form a resin complex layer including a resin complex comprising the thermosetting resin material and the thermoplastic resin material, and a conductive circuit is formed over the resin complex layer.

Abstract: Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

Abstract: A conductive paste, a printed circuit board using the conductive paste, and a method of manufacturing the printed circuit board are disclosed. A conductive paste that includes conductive particles, a polymer, and a polymer foam, can reduce the number of printing repetitions, to simplify the manufacturing process, decrease process times, and improve reliability.

Abstract: A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.

Abstract: A dielectric composition which forms a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a cured resin material and a predetermined percentage by weight of particulate fillers, thus not including continuous fibers, semi-continuous fibers or the like as part thereof.

Abstract: A method of manufacturing a thin-film antenna is disclosed. A substrate is provided and coated with an organic material layer. After both of the substrate and organic material layer have been dried, a conductive layer is formed on both the substrate and the organic material layer. The organic material layer and the layer thereon are then removed so that the remaining conductive layer forms a thin-film antenna.

Abstract: An process of forming multilayer thin film heterostructures is disclosed and includes applying a solution including a first water-soluble polymer from the group of polyanionic species, polycationic species and uncharged polymer species onto a substrate to form a first coating layer on the substrate, drying the first coating layer on the substrate, applying a solution including a second water-soluble polymer from the group of polyanionic species, polycationic species and uncharged polymer species onto the substrate having the first coating layer to form a second coating layer on the first coating layer wherein the second water-soluble polymer is of a different material than the first water-soluble polymer, and drying the second coating layer on the first coating layer so as to form a bilayer structure on the substrate.