With Posttreatment Of Coating Or Coating Material Patents (Class 427/97.4)
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Patent number: 10782222Abstract: A soot particulate sensor has a ceramic support made from an aluminum silicate, which is provided with a conductor path made of an intermetallic compound.Type: GrantFiled: January 22, 2018Date of Patent: September 22, 2020Assignee: Bayerische Motoren Werke AktiengesellschaftInventors: Bernhard Mueller, Rudolf Held
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Patent number: 10612172Abstract: An embroidery machine with on-board electronics executing layout and alignment software provides for automated thread installation to establish textile-to-pad contact through the use of anisotropic conductive threads characterized by electrically conductive segments alternating with electrically insulating segments. Present embodiments provide for garments or other fabrics and textiles having flexible circuits integrated on a flexible substrate that bends and moves with the garment in a way not seen with stiff printed circuit boards, which may include multiple textile circuits attached to fabric to impart desired electronic features including connectivity to a printed circuit board external to a garment formed according to the present embodiments, as well as imparting electrical conductivity across seams of a garment sewn together from fabric, while maintaining electrical integrity of neighboring circuits on the same garment.Type: GrantFiled: October 24, 2017Date of Patent: April 7, 2020Assignee: University of Louisville Research Foundation, Inc.Inventor: Cindy Harnett
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Patent number: 10214657Abstract: A non-aqueous silver precursor composition contains at least 1 weight % of one or more (a) polymers that are certain cellulosic polymers; (b) reducible silver ions; and (c) an organic solvent medium consisting of: (i) a hydroxylic organic solvent having an ?-hydrogen atom and a boiling point at atmospheric pressure of 100-500° C., and, optionally, (ii) a nitrile-containing aprotic solvent or a carbonate-containing aprotic solvent different from the (i) organic solvent, each having a boiling point at atmospheric pressure of 100-500° C. The (b) reducible silver ions are present in an amount of 0.1-400 weight %, based on the total weight of the one or more (a) polymers. This composition can be used to form silver nanoparticles under silver ion reducing conditions and then applied to various substrates to provide silver nanoparticle patterns.Type: GrantFiled: March 13, 2017Date of Patent: February 26, 2019Assignee: EASTMAN KODAK COMPANYInventors: Deepak Shukla, Kevin M. Donovan, Jeffrey R. Gillmor
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Patent number: 9622985Abstract: The present invention provides a patch or patch preparation in which the anchoring property of a pressure-sensitive adhesive layer to a support is improved with no adverse effects on its pressure-sensitive adhesive properties such as adhesion, pressure-sensitive adhesiveness, and a cohesive strength. A support of the present invention is for a patch or patches preparation, and comprises a base material containing a plastic film and an undercoat agent layer laminated on the base material. The undercoat layer contains porous inorganic particles having an average particle diameter of from 1 ?m to 15 ?m. A patch and patch preparation of the present invention comprises the support and a pressure-sensitive adhesive layer placed on one surface of the support to be adjacent to the undercoat agent layer.Type: GrantFiled: September 20, 2013Date of Patent: April 18, 2017Assignee: NITTO DENKO CORPORATIONInventors: Naoko Urushihara, Satoshi Ameyama
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Patent number: 9555010Abstract: The present invention provides a patch or patch preparation in which the anchoring property of a pressure-sensitive adhesive layer to a support is improved with no adverse effects on its pressure-sensitive adhesive properties such as adhesion, pressure-sensitive adhesiveness, and a cohesive strength. A support of the present invention is for a patch or patches preparation, and comprises a base material containing a plastic film and an undercoat agent layer laminated on the base material. The undercoat layer contains porous inorganic particles having an average particle diameter of from 1 ?m to 15 ?m. A patch and patch preparation of the present invention comprises the support and a pressure-sensitive adhesive layer placed on one surface of the support to be adjacent to the undercoat agent layer.Type: GrantFiled: September 20, 2013Date of Patent: January 31, 2017Assignee: NITTO DENKO CORPORATIONInventors: Naoko Urushihara, Satoshi Ameyama
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Patent number: 9190322Abstract: A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.Type: GrantFiled: January 24, 2014Date of Patent: November 17, 2015Assignee: Infineon Technologies AGInventors: Martin Mischitz, Manfred Schneegans, Markus Heinrici
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Publication number: 20150125625Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed.Type: ApplicationFiled: November 7, 2013Publication date: May 7, 2015Applicant: Unimicron Technology Corp.Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang
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Publication number: 20150104562Abstract: A fully additive method for forming multilayer electrical interconnects for printed electronic and/or optoelectronic devices is disclosed. Electrical interconnects are fabricated by directly ink-jet printing a dielectric material with selective interconnection holes, and then ink jet printing conductive patterns and filling the interconnection holes with conductive material to form multilayer interconnects. A method for manufacturing a multilayer printed electronic system utilizing the invention is also disclosed. Other embodiments are described and claimed.Type: ApplicationFiled: October 10, 2013Publication date: April 16, 2015Applicant: OMEGA OPTICS, INC.Inventors: Harish Subbaraman, Ray T. Chen
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Patent number: 8986819Abstract: A non-catalytic palladium precursor composition is disclosed, including a palladium salt and an organoamine, wherein the composition is substantially free of water. The composition permits the use of solution processing methods to form a palladium layer on a wide variety of substrates, including in a pattern to form circuitry or pathways for electronic devices.Type: GrantFiled: October 16, 2013Date of Patent: March 24, 2015Assignee: Xerox CorporationInventors: Yiliang Wu, Ping Liu
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Publication number: 20150060393Abstract: A method of making an imprinted micro-wire structure includes providing a substrate, a first stamp, and a different multi-level second stamp. A curable bottom layer is provided over the substrate. One or more bottom-layer micro-channels) are imprinted in the curable bottom layer with the first stamp and a bottom-layer micro-wire formed in each bottom-layer micro-channel. A curable multi-layer is formed adjacent to and in contact with the cured bottom layer. First and second multi-layer micro-channels and a top-layer micro-channel are imprinted in the curable multi-layer with the multi-level second stamp. Either two bottom-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a top-layer micro-wire or two top-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a bottom-layer micro-wire.Type: ApplicationFiled: August 28, 2013Publication date: March 5, 2015Inventor: RONALD STEVEN COK
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Publication number: 20150060395Abstract: A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing a first stamp and a multi-level second stamp. A curable bottom layer and multi-layer are provided on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer. A multi-layer micro-channel and a top-layer micro-channel are imprinted in the multi-layer. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire extends from the central area into the edge area. The multi-layer micro-wire contacts the bottom-layer micro-wire in the edge area. The top-layer micro-wire is over the central area and is separate from the multi-layer micro-wire and the bottom-layer micro-channel. The bottom-layer micro-wire is electrically connected to the multi-layer micro-wire and is electrically isolated from the top-layer micro-wire.Type: ApplicationFiled: August 28, 2013Publication date: March 5, 2015Inventor: RONALD STEVEN COK
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Publication number: 20150065840Abstract: Improved stretchable printed circuit boards, and fabrication methods thereof, are described. The improved stretchable printed circuit boards include a serpentine conductive trace enclosed by stretchable dielectric material. The stretchable dielectric material has a serpentine shape itself, realized by crenulated edges. The crenulated edges reduce torsional strain on the conductive trace and are formed, for example, by cutting away sections of the stretchable dielectric material proximate segments of the serpentine conductive trace where the serpentine conductive trace changes direction.Type: ApplicationFiled: August 28, 2014Publication date: March 5, 2015Inventor: Matthew Bailey
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Publication number: 20150060394Abstract: A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing first, second, and third different stamps. A curable bottom, connecting layer, and top layer are formed on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer in the central area and the edge area, a connecting-layer micro-channel is imprinted in the connecting layer in the edge area over the bottom-layer micro-channel, an edge micro-channel is imprinted in the top layer in the edge area over the connecting-layer micro-channel, and top-layer micro-channels are imprinted in the top layer over the central area. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire in the central area is electrically connected to the edge micro-wire in the edge area and is electrically isolated from the top-layer micro-wire.Type: ApplicationFiled: August 28, 2013Publication date: March 5, 2015Inventor: RONALD STEVEN COK
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Patent number: 8961729Abstract: A method of manufacturing a touch panel is disclosed. The method includes providing a plurality of substrates, each having a size, providing a carrier including a plurality of grooves each having a size corresponding with the size of the substrates. The method also includes placing the plurality of substrates into the grooves, simultaneously forming a touch structure layer on each of the substrates, and separating substrates from the carrier.Type: GrantFiled: November 21, 2013Date of Patent: February 24, 2015Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.Inventors: Lijun Zhao, Jun Ma
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Patent number: 8963019Abstract: A circuit board and a manufacturing method thereof are provided. According to the method, a dielectric layer is formed on a dielectric substrate, and the dielectric layer contains active particles. A surface treatment is performed on a surface of the dielectric first conductive layer is formed on the activated surface of the dielectric layer. A conductive via is formed in the dielectric substrate and the dielectric layer. A patterned mask layer is formed on the first conductive layer, in which the patterned mask layer exposes the conductive via and a part of the first conductive layer. A second conductive layer is formed on the first conductive layer and conductive via exposed by the patterned mask layer. The patterned mask layer and the first conductive layer below the patterned mask layer are removed.Type: GrantFiled: August 9, 2012Date of Patent: February 24, 2015Assignee: Unimicron Technology Corp.Inventors: Cheng-Po Yu, Shang-Feng Huang, Chang-Ming Lee, Young-Sheng Bai
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Publication number: 20150010695Abstract: A method for making a nanowire-based electrode having homogenous optical property and heterogeneous electrical property is disclosed. The method comprises coating a first solution comprising a first material on to the substrate to form a layer of nanowire network; evaporating to remove the solvent in the metal nanowire film; printing a second solution comprising a chemical reagent on top of the formed metal nanowire network layer; and oxidizing the first material into a second material by the chemical reagent, wherein the first material and second material has a refractive index difference less than 0.05 and second material is less conductive than the first material.Type: ApplicationFiled: January 22, 2014Publication date: January 8, 2015Applicant: Nuovo Film, Inc.Inventor: Hakfei Poon
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Publication number: 20140375538Abstract: This disclosure provides systems, methods and apparatus for modulating light for a display. The system includes a light blocking layer including a reflective layer and a light absorbing layer. The light blocking layer is configured such that any conductive components therein underlie or cover less than a majority of the circuitry controlling the display elements incorporated into the display.Type: ApplicationFiled: June 19, 2013Publication date: December 25, 2014Inventors: Jianru Shi, Xiang-Dong Mi, Jignesh Gandhi
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Publication number: 20140321087Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.Type: ApplicationFiled: April 25, 2013Publication date: October 30, 2014Inventor: Qinglei Zhang
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Patent number: 8864894Abstract: There is provided a resist underlayer film forming composition for lithography for forming a resist underlayer film capable of being used as a hard mask or a bottom anti-reflective coating, or a resist underlayer film causing no intermixing with a resist and having a dry etching rate higher than that of the resist. A film forming composition comprising a silane compound having an onium group, wherein the silane compound having an onium group is a hydrolyzable organosilane having, in a molecule thereof, an onium group, a hydrolysis product thereof, or a hydrolysis-condensation product thereof. The composition uses as a resist underlayer film forming composition for lithography. A composition comprising a silane compound having an onium group, and a silane compound having no onium group, wherein the silane compound having an onium group exists in the whole silane compound at a ratio of less than 1% by mol, for example 0.01 to 0.95% by mol.Type: GrantFiled: August 13, 2009Date of Patent: October 21, 2014Assignee: Nissan Chemical Industries, Ltd.Inventors: Wataru Shibayama, Makoto Nakajima, Yuta Kanno
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Publication number: 20140293547Abstract: A circuit substrate has the following elements. A stacked circuit structure has a first surface and a second surface opposite thereto surface. A first patterned inner conductive layer is disposed on the first surface and has multiple pads. A first patterned outer conductive layer is disposed on the patterned inner conductive layer and has multiple conductive pillars, wherein each of the first conductive pillar is located on the corresponding first pad. The first dielectric layer covers the first surface, the first patterned inner conductive layer and the first patterned outer conductive layer, and has multiple first concaves, wherein the first concave exposes the top and side of the corresponding first conductive pillar. A semiconductor package structure applied the above circuit substrate and a process for fabricating the same are also provided here.Type: ApplicationFiled: May 21, 2013Publication date: October 2, 2014Applicant: VIA Technologies, Inc.Inventor: Chen-Yueh Kung
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Publication number: 20140290980Abstract: A touch screen comprises a glass substrate, a first conductive layer, an insulating adhesive layer and a second conductive layer. The first conductive layer is directly formed on the glass substrate and comprises first conductive pattern areas; the insulating adhesive layer is attached to the glass substrate, and one side of the insulating adhesive layer close to the glass substrate forms a first groove; the first conductive pattern area is received in the first groove and insulated from each other; one side of the insulating adhesive layer away from the glass substrate, is provided with a second groove; and the second conductive layer is received in the second groove, thus forming a plurality of second conductive pattern areas insulated with each other. The first conductive layer is directly formed on the glass substrate and made of a metal material, thus omitting an adhesive layer and saving the cost.Type: ApplicationFiled: August 15, 2013Publication date: October 2, 2014Applicant: SHENZHEN O-FILM TECH CO., LTDInventors: GENCHU TANG, Shengcai Dong, Wei Liu, Bin Tang
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Publication number: 20140293148Abstract: The present invention provides a conductive film that includes a substrate, a first matrix layer, a first conductive layer, a second matrix layer, a second conductive layer, a light-shielding layer, a first lead electrode and a second lead electrode. A first grid groove and a second grid groove are formed in the first matrix layer and the second matrix layer, respectively, and the first grid groove and the second grid groove are filled with conductive materials, to form the first conductive layer and the second conductive layer, respectively. Accordingly, the first matrix layer and the second matrix layer may provide protection for the first conductive layer and the second conductive layer, and thus can improve the production yield. Furthermore, the present invention also provides a method for making the conductive film and a touch screen including the conductive film.Type: ApplicationFiled: August 15, 2013Publication date: October 2, 2014Applicant: SHENZHEN O-FILM TECH CO., LTD.Inventors: GENCHU TANG, Shengcai Dong, Wei Liu, Bin Tang
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Patent number: 8846537Abstract: A mold having an open interior volume is used to define patterns. The mold has a ceiling, floor and sidewalls that define the interior volume and inhibit deposition. One end of the mold is open and an opposite end has a sidewall that acts as a seed sidewall. A first material is deposited on the seed sidewall. A second material is deposited on the deposited first material. The deposition of the first and second materials is alternated, thereby forming alternating rows of the first and second materials in the interior volume. The mold and seed layer are subsequently selectively removed. In addition, one of the first or second materials is selectively removed, thereby forming a pattern including free-standing rows of the remaining material. The free-standing rows can be utilized as structures in a final product, e.g., an integrated circuit, or can be used as hard mask structures to pattern an underlying substrate. The mold and rows of material can be formed on multiple levels.Type: GrantFiled: March 11, 2013Date of Patent: September 30, 2014Assignee: Micron Technology, Inc.Inventor: Gurtej S. Sandhu
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Publication number: 20140287163Abstract: A method of forming a Cu wiring in a trench or hole formed in a substrate is provided. The method includes forming a barrier film on the surface of the trench or hole, forming a Ru film on the barrier film, and embedding Cu in the trench or hole by forming a Cu film on the Ru film using PVD while annealing the substrate such that migration of copper into the trench or hole occurs.Type: ApplicationFiled: June 6, 2014Publication date: September 25, 2014Inventors: Tadahiro ISHIZAKA, Atsushi GOMI, Takara FUKUSHIMA, Osamu YOKOYAMA, Takashi SAKUMA, Chiaki YASUMURO, Hiroyuki TOSHIMA, Tatsuo HATANO, Yasushi MIZUSAWA, Masamichi HARA, Kenzi SUZUKI
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Patent number: 8840967Abstract: The present invention relates to a method for manufacturing a printed circuit board including a flame retardant insulation layer. The printed circuit board of the present invention exhibits excellent thermal stability and excellent mechanical strength, is suitable for imprinting lithography process, provides improved reliability by reducing coefficient of thermal expansion, and has excellent adhesion between circuit patterns and an insulation layer.Type: GrantFiled: September 16, 2011Date of Patent: September 23, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Choon Cho, Myeong-Ho Hong, Hwa-Young Lee, Hee-Sun Chun, Choon-Keun Lee
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Publication number: 20140248423Abstract: A method of inverse image flexographic printing includes transferring an insulating ink to a plurality of inverse printing patterns disposed on a flexo master. The insulating ink is transferred from the plurality of inverse printing patterns to a substrate. The insulating ink disposed on the substrate is cured. A catalytic ink is deposited on a plurality of exposed portions of the substrate. The catalytic ink deposited on the substrate is electroless plated.Type: ApplicationFiled: March 4, 2013Publication date: September 4, 2014Applicant: Uni-Pixel Displays, Inc.Inventors: Ed S. Ramakrishnan, Robert J. Petcavich
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Publication number: 20140242294Abstract: Method of manufacturing a resistive touch sensor circuit using a roll to roll process to print microscopic patterns on a single side of at least one flexible dielectric substrate using a plurality of flexo-masters to print the microscopic patterns which are then plated to form conductive microscopic patterns.Type: ApplicationFiled: October 24, 2012Publication date: August 28, 2014Applicant: UNIPIXEL DISPLAYS, INC.Inventors: Robert J. Petcavich, Ed S. Ramakrishnan, Daniel K. Van Ostrand, Reed Killion, Kevin J. Derichs
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Patent number: 8815332Abstract: An apparatus, comprising two conductive surfaces or layers and a nanostructure assembly bonded to the two conductive surfaces or layers to create electrical or thermal connections between the two conductive surfaces or layers, and a method of making same.Type: GrantFiled: August 9, 2012Date of Patent: August 26, 2014Assignee: Smoltek ABInventors: Mohammad Shafiqul Kabir, Andrzej Brud
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Patent number: 8802183Abstract: The system of the present invention includes a conductive element, an electronic component, and a partial power source in the form of dissimilar materials. Upon contact with a conducting fluid, a voltage potential is created and the power source is completed, which activates the system. The electronic component controls the conductance between the dissimilar materials to produce a unique current signature. The system can also measure the conditions of the environment surrounding the system.Type: GrantFiled: July 11, 2011Date of Patent: August 12, 2014Assignee: Proteus Digital Health, Inc.Inventors: Jeremy Frank, Peter Bjeletich, Hooman Hafezi, Robert Azevedo, Robert Duck, Iliya Pesic, Benedict Costello, Eric Snyder
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Publication number: 20140218637Abstract: A conductive film includes a substrate, a first conductive layer, a matrix layer, and a second conductive layer. The substrate includes a first surface and an oppositely arranged second surface. The first conductive layer is embedded in the substrate. The matrix layer is set on the first surface of the substrate. The matrix layer is formed by solidified jelly coating. The second conductive layer embedded in the matrix layer. The second conductive layer is insulated from the first conductive layer. Due to the capacitor formed between the first conductive layer and the second conductive layer, it just needs to attach the conductive film to a glass panel when the conductive film is adopted to manufacture a touch screen, without bonding two pieces of conductive films. In addition, the matrix layer, formed by solidifying the jelly painted on the substrate, is with a much smaller thickness than the substrate. Therefore, the touch screen using the conductive film has a smaller thickness.Type: ApplicationFiled: July 6, 2013Publication date: August 7, 2014Applicant: NANCHANG O-FILM TECH. CO., LTD.Inventors: Yulong Gao, Zheng Cui, Chao Sun
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Publication number: 20140168099Abstract: A touch panel and a method of manufacturing the same are provided. The touch panel comprises: a cover substrate comprising a visible area and a non-visible area, wherein the non-visible area is located in a peripheral area of the visible area; an electrode layer formed on the visible area and the non-visible area of the cover substrate; a conductive masking layer formed on the non-visible area and disposed on a part of the electrode layer that is located on the non-visible area; and a plurality of connecting wires formed on the conductive masking layer and electrically connected to the electrode layer through uniaxial conduction of the conductive masking layer. The present disclosure comprises a method of manufacturing the touch panel. Accordingly, product yield is increased and touch sensing precision is maintained.Type: ApplicationFiled: December 17, 2012Publication date: June 19, 2014Inventors: Yuh-Wen Lee, Xianbin Xu, Keming Ruan, Qiong Yuan
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Publication number: 20140160549Abstract: The invention relates to a colloidal electrolyte composition comprising a polyelectrolyte selected from one or more cationic polymers, a particulate phase forming a colloidal dispersion, and a binder system able to form a cross-linked network upon curing the electrolyte composition. Also, the invention relates to a method of preparation the colloidal electrolyte composition, to an electrochemical cell and to a method of preparation the electrochemical cell.Type: ApplicationFiled: April 5, 2012Publication date: June 12, 2014Applicant: ACREO SWEDISH ICT ABInventors: Mats Sandberg, Anurak Sawatdee, Jessica Åhlin
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Publication number: 20140159850Abstract: A method and device includes a first conductor formed on a first dielectric layer as a partial turn of a coil. A second conductor is formed on a second dielectric layer that covers the first dielectric layer and first conductor, the second conductor forming a partial turn of the coil. A vertical interconnect couples the first and second conductors to form a first full turn of the coil. The interconnect coupling can be enhanced by embedding some selective magnetic materials into the substrate.Type: ApplicationFiled: December 11, 2012Publication date: June 12, 2014Inventors: Mihir K. Roy, Mathew J. Manusharow, Harold Ryan Chase
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Publication number: 20140152588Abstract: The present invention relates to a flexible touch screen panel. A flexible touch screen panel includes a substrate, first sensing cells formed on the substrate and connected to each other in a first direction, second sensing cells formed on the substrate and connected to each other in a second direction intersected with the first direction, first connection patterns connecting the first sensing cells to each other in the first direction, and second connection patterns connecting the second sensing cells to each other in the second direction. The first connection patterns include at least one opening part.Type: ApplicationFiled: April 16, 2013Publication date: June 5, 2014Applicant: Samsung Display Co., Ltd.Inventors: Sung-Ku Kang, Byeong-Kyu Jeon, Hee-Woong Park
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Publication number: 20140126166Abstract: Disclosed herein is a method of forming a solder resist (SR) post, including: (A) forming an SR layer on a printed circuit board; (B) disposing a patterning film on an upper surface on the SR layer; (C) forming a plurality of openings in the patterning film or the SR layer; (D) filling SR ink in the openings and performing an exposure process to form a plurality of SR posts; (E) delaminating the patterning film; (F) removing an uncured portion of the SR ink on which the exposure process is performed; and (G) drying the plurality of SR posts.Type: ApplicationFiled: December 28, 2012Publication date: May 8, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Su Il Kim, Soon Jin Cho
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Publication number: 20140116753Abstract: There are provided a wiring board in which plating layers constituting wiring patterns are formed to have uniform thicknesses, and a method of manufacturing the wiring board. The wiring board includes an insulating layer; and wiring patterns formed on the insulating layer, wherein at least one of the wiring patterns is formed by stacking two or more plating layers.Type: ApplicationFiled: January 18, 2013Publication date: May 1, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Han Ul LEE, Yong Sam LEE, Suk Hwan AHN
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Publication number: 20140116613Abstract: A method of forming a thermal conductive pillar in a metal core printed circuit board comprises providing a substrate, depositing a dielectric layer on top surface of the substrate, depositing a conductive layer on top surface of the dielectric layer, forming a space in the metal core printed circuit board by selectively removing at least part of dielectric material from the dielectric layer, and depositing thermal conductive material in the space to form a thermal conductive pillar, wherein the thermal conductive pillar conducts heat generated by a device that is assembled with the metal core printed circuit board.Type: ApplicationFiled: October 26, 2012Publication date: May 1, 2014Applicant: Cofan USA, Inc.Inventor: Chang Han
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Publication number: 20140092027Abstract: The invention relates to a touch panel. The touch panel includes a plastic film substrate, whose two surfaces are provided in sequence with at least two undercoat layers and a patterned transparent conductive layer and further provided with a patterned metal circuit layer, respectively. The invention also relates to a simplified method for producing a touch panel, in which the conventional lamination process is eliminated, and the touch panel produced thereby has a reduced overall thickness and is free of the conventional image deterioration drawback. Moreover, the method generally pertains to a sheet-by-sheet process and is superior over the conventional roll-to-roll processes in which the thin layers tend to exfoliate due to the occurrence of uneven tension.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: AVCT OPTICAL ELECTRONIC CO., LTDInventor: avct Optical Electronic Co., Ltd
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Publication number: 20140090877Abstract: A printed wiring board includes an interlayer resin insulation layer, a pad structure formed on the interlayer resin insulation layer and positioned to mount a semiconductor device, and a solder-resist layer formed on the interlayer resin insulation layer and having an opening portion exposing a portion of the pad structure from the solder-resist layer. The opening portion of the solder-resist layer has a bottom surface such that the bottom surface of the opening portion is exposing an upper surface and a portion of a side surface of the pad structure.Type: ApplicationFiled: September 30, 2013Publication date: April 3, 2014Applicant: IBIDEN CO., LTD.Inventors: Fumitaka TAKAGI, Nobuhisa Kuroda, Mariko Kimura
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Publication number: 20140085840Abstract: Provided is an electronic circuit including a substrate having a flat device region and a curved interconnection region. A conduction line may extend along an uneven portion in the interconnection region and may be curved. The uneven portion and the conductive line may have a wavy shape. An external force applied to the electronic circuit may be absorbed by the uneven portion and the conductive line. The electronic device may not be affected by the external force. Therefore, functions of the electronic circuit may be maintained. A method of fabricating an electronic circuit according to the present invention may easily adjust areas and positions of the interconnection region and the device region.Type: ApplicationFiled: February 20, 2013Publication date: March 27, 2014Applicant: Electronics and Telecommunications Research InstituteInventor: Electronics and Telecommunications Research Institute
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Publication number: 20140076489Abstract: A method of manufacturing a touch panel is disclosed. The method includes providing a plurality of substrates, each having a size, providing a carrier including a plurality of grooves each having a size corresponding with the size of the substrates. The method also includes placing the plurality of substrates into the grooves, simultaneously forming a touch structure layer on each of the substrates, and separating substrates from the carrier.Type: ApplicationFiled: November 21, 2013Publication date: March 20, 2014Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.Inventors: Lijun ZHAO, Jun MA
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Publication number: 20140063822Abstract: According to one embodiment, a wiring board includes a base assuming a flat plate shape, a wiring pattern provided in a position on one surface of the base and apart from a peripheral edge of the base, a first metal layer provided on the opposite side of the base side of the wiring pattern, and a second metal layer configured to cover the first metal layer and a sidewall of the wiring pattern.Type: ApplicationFiled: December 10, 2012Publication date: March 6, 2014Applicant: Toshiba Lighting & Technology CorporationInventors: Akihiro SASAKI, Kazuo SHIMOKAWA, Takuya HONMA, Nobuhiko BETSUDA, Kiyoshi NISHIMURA
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Publication number: 20140057045Abstract: The disclosure disclosed herein is a method for altering the optical properties of high resolution printed conducting patterns by initiating a chemical reaction to a passivating layer on the patterns with optical properties differing from the untreated material. The electrical properties are maintained after this reacted, passivating, layer is formed.Type: ApplicationFiled: October 25, 2012Publication date: February 27, 2014Applicant: UNIPIXEL DISPLAYS, INC.Inventors: Ed S. Ramakrishnan, Danliang Jin
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Publication number: 20140057428Abstract: A layer of material having a low thermal conductivity is coated over a substrate. A film of conductive ink is then coated over the layer of material having the low thermal conductivity, and then sintered. The film of conductive ink does not absorb as much energy from the sintering as the film of conductive ink coated over the layer of material having the low thermal conductivity. The layer of material having the low thermal conductivity maybe a polymer, such as polyimide.Type: ApplicationFiled: November 7, 2013Publication date: February 27, 2014Applicant: APPLIED NANOTECH HOLDINGS, INC.Inventors: Zvi Yaniv, Mohshi Yang, Peter B. Laxton
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Publication number: 20140055405Abstract: A touch electrode device includes plural insulation bases disposed on a substrate, each insulation base having an undercut profile such that its top area is greater than its bottom area; plural first electrode lines disposed on the insulation bases respectively; and plural second electrode lines disposed on the substrate.Type: ApplicationFiled: November 14, 2012Publication date: February 27, 2014Applicant: HengHao Technology Co. LTDInventor: KUAN-YEN MA
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Publication number: 20140055688Abstract: Touch screen structures may have an on cell resistive touch sensor made up of a a polarizer film or analyzer. The polarizer film has a first high resolution grid pattern printed on it by at least one master plate and a second flexible, optically isotropic transparent substrate carrying a second high resolution pattern may also be used and assembled to the first pattern. The patterns are plated with conductive material and assembled so that the first and the second conductive patterns engage when the substrate is pressed.Type: ApplicationFiled: October 25, 2012Publication date: February 27, 2014Applicant: UNIPIXEL DISPLAYS, INC.Inventor: Robert J. Petcavich
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Publication number: 20140020938Abstract: A method of forming copper wiring includes: a wiring pattern formation step of depositing a first suspension onto a substrate to form a wiring pattern of the first suspension on the substrate, the first suspension including dispersed first copper particles having an average particle diameter that is not smaller than 100 nm; a drying step of drying the first copper particles at a temperature lower than 150° C.; a second suspension deposition step of depositing a second suspension onto the wiring pattern, the second suspension including dispersed second copper particles having an average particle diameter that is smaller than the average particle diameter of the first copper particles; a compaction step of reducing voids between the first and second copper particles; a heat application step of applying heat to the first and second copper particles; and a reducing treatment step of subjecting the first and second copper particles to a reducing treatment.Type: ApplicationFiled: September 20, 2013Publication date: January 23, 2014Applicant: Fujifilm CorporationInventor: Hiroshi MATAKI
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Publication number: 20140021851Abstract: As a substrate for an LED module and a method for manufacturing the same, they teach a substrate for an LED module and a method for manufacturing the same which including a base substrate, an insulating layer formed on a remaining region except a chip mounting region A in the base substrate, an electrode layer formed on the insulating layer, an oxide layer formed on the chip mounting region A of the base substrate and a high reflection layer formed on a top surface of the oxide layer.Type: ApplicationFiled: July 17, 2013Publication date: January 23, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Cheol Ho HEO
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Publication number: 20140020937Abstract: Fabrics with a multi-layered circuit of high reliability and a manufacturing method thereof are provided. The fabrics with the multi-layered circuit include: a base layer; a first conductive pattern which is formed on the base layer; a second conductive pattern which is formed to intersect with the first conductive pattern at least in part; and an insulating pattern which is formed on an intersection portion which is a region where the first conductive pattern and the second conductive pattern intersect.Type: ApplicationFiled: June 14, 2013Publication date: January 23, 2014Inventors: Young Hwan KIM, Hyuck Ki HONG, Dong Sun KIM, Tae Ho HWANG, Jae Gi SON
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Patent number: 8623450Abstract: For a method for producing a flexible circuit configuration in the form of a layer sequence of at least one insulating layer and at least one conductive layer, typically multiple insulating layers (N1, N2, N3, NF) and multiple structured conductive layers (L1, L2), the layer sequence for the flexible circuit configuration is deposited on a rigid substrate so that the adhesion of the layer sequence with respect to the substrate is less in an inner area, in which at least one, preferably multiple flexible circuit configurations are created, than in an edge area (RB) which surrounds the inner area (ZB). An intermediate layer can advantageously be deposited for this purpose in the edge area, which causes a stronger adhesion of the layer sequence over the edge area than the inner area, which is not provided with an intermediate layer.Type: GrantFiled: October 1, 2010Date of Patent: January 7, 2014Assignee: Cicor Management AGInventors: Ernst Feurer, Bruno Holl, Alexander Kaiser, Karin Ruess